共查询到19条相似文献,搜索用时 125 毫秒
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实时跟踪系统中的DSP软件优化方法 总被引:1,自引:0,他引:1
TI的TMS320C6x系列DSP具有独特的甚长指令字(VLIW)结构,DSP软件的执行效率在某种程度上决定了硬件功能的实现。在用DSP进行实时跟踪系统的设计时,软件的执行效率将直接影响整个系统的实时性。笔者归纳了基于DSP的实时跟踪系统中软件优化的方法,包括DSP关键字和内联函数的使用、数据打包处理、软件流水线以及编译器选项的设定。采用这些方法对DSP软件进行优化,解决了系统的弱实时性问题,同时也提高了整个系统的可靠性。 相似文献
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VelociTI体系结构及其软件开发 总被引:1,自引:0,他引:1
文章简要介绍了一种典型VLIW DSP结构-TL的VelociTTTM体系结构和软件开发的一般流程,并结合具体实例着重论述了在该体系结构下进行软件优化的主要方法。从这些典型例子中可以看出,在高速DSP系统下软件优化起着举足轻重的作用。 相似文献
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面向VLIW结构的高性能代码生成技术 总被引:1,自引:1,他引:0
DSP处理器通过采用VLIW结构获得了高性能,同时也增加了编译器为其生成汇编代码的难度.代码生成器作为编译器的代码生成部件,是VLIW结构能够发挥性能的关键.由此提出并实现了一种基于可重定向编译框架的代码生成器.该代码生成器充分利用VLIW的体系结构特点,支持SIMD指令,支持谓词执行,能够生成高度指令级并行的汇编代码,显著提高应用程序的执行性能. 相似文献
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由于DSP运算速度快,可实现指令乘法运算和变址运算,指定的重叠运行,超长指定字(VLIW)结构,不需要动态码再排序的硬件支持。DSP设计简单成本低,销售价格逐年降低,具有广泛的应用前景,非常适合在智能家居自动化系统中应用。 相似文献
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随着多媒体和宽带传输技术日益广泛的应用,传统的数字信号处理器(DSP)的运算速度已不适应,几种新一代的DSP结构被提出并用于实现高速运算,其中,比较成功的范例是超长指令字(VLIW)结构. 相似文献
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随着多媒体和宽带传输技术日益广泛的应用,传统的数字信号处理器(DSP)的运算速度已不适应,几种新一代的DSP结构被提出并用于实现高速运算,其中,比较成功的范例是超长指令字(VLIW)结构。 相似文献
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作为硅产品知识产权(SIP)平台解决方案和数字信号处理器(DSP)内核的授权厂商,CEVA公司推出首款用于4G无线基础设施应用的高性能向量DSP内核CEVA-XC323,相比现有基站侧VLIW DSP,CEVA-XC323在无线基站应用中的性能提升多达4倍, 相似文献
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基于SoC的DRM接收机ASIC设计 总被引:1,自引:1,他引:0
DRM是新一代的数字广播体制。针对DRM接收机的ASIC设计,提出了一种采用软硬件协同设计的SoC结构,给出了片上处理单元说明,SoC设计中的软硬件划分、协同设计和验证方法。最后给出了DRM接收机的性能。 相似文献
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Altera Stratix25DSP开发套件在数字信号处理系统设计实验教学中的应用 总被引:1,自引:0,他引:1
现场可编程门阵列FPGA的并行性和高度灵活性使得它相较于传统的DSP处理器在数字信号处理领域取得日益广泛使用。本文重点介绍Altera公司Stratix25DSP开发套件的硬件系统,简要介绍了与该开发套件对应的集成开发环境DSP Builder,并进一步讨论了在此套件基础上所开设的一系列DSP实验内容。从实验效果来看,该开发套件为设计者提供了一个完善的开发平台,大大简化了基于FPGA的DSP系统设计,是一套非常好用的进行数字信号处理系统设计实验教学及开发的工具。 相似文献
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Wolf W.H. 《Proceedings of the IEEE. Institute of Electrical and Electronics Engineers》1994,82(7):967-989
This paper surveys the design of embedded computer systems, which use software running on programmable computers to implement system functions. Creating an embedded computer system which meets its performance, cost, and design time goals is a hardware-software co-design problem-the design of the hardware and software components influence each other. This paper emphasizes a historical approach to show the relationships between well-understood design problems and the as-yet unsolved problems in co-design. We describe the relationship between hardware and software architecture in the early stages of embedded system design. We describe analysis techniques for hardware and software relevant to the architectural choices required for hardware-software co-design. We also describe design and synthesis techniques for co-design and related problems 相似文献
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Hardware/software co-design of the Stanford FLASH multiprocessor 总被引:1,自引:0,他引:1
Heinrich M. Ofelt D. Horowitz M.A. Hennessy J. 《Proceedings of the IEEE. Institute of Electrical and Electronics Engineers》1997,85(3):455-466
Hardware/software co-design is a methodology for solving design problems in systems with processors or embedded controllers where the design requirements mandate a functionality and performance level for the system, independent of the hardware and software boundary. In addition to the challenges of functional correctness and total system performance, design time is often a critical factor. To design MAGIC, the programmable memory and communication controller for the Stanford FLASH multiprocessor, the authors employed a hardware/software co-design methodology. This methodology allowed them to concurrently design the hardware and software thereby reducing design time while simultaneously ensuring that the design would meet ambitious performance goals. Serializing the hardware and software design would have lengthened the design time and significantly increased the amount of redesign when the tradeoffs between the hardware and software implementations became clear late in the design process. The co-design approach led them to build a series of hierarchical simulators that allowed them to begin design verification early and to reduce the level of effort required to ensure a functional design 相似文献
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This paper introduces an enhanced hardware/software co-design framework allowing the designer to introduce hardware fault detection properties in the system under consideration. By considering reliability requirements at system level, within a hw/sw co-design flow, it is possible to evaluate overheads and benefits of different solutions. System specification, hardware and software concurrent fault detection design methodologies and hw/sw partitioning are the three key factors taken into account. The paper discusses these aspects providing a complete overview of the reliability co-design project. 相似文献
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随着芯片集成度的飞速发展,集成电路的设计已经进入了片上系统(Soc,Systemonchip)的时代。传统的软硬件分开设计的方法已经不在适合Soc设计的需要,而软硬件协同设计技术很好解决了传统设计方法所不能解决的问题。软硬件划分方法是软硬件协同设计中的一个关键问题,从基于多目标的遗传算法出发,主要做了两方面的改进:一方面引入小生境技术,进一步优化了算法;另一方面是引入精英保持策略,保证了算法的收敛性。 相似文献