非有意掺杂LECSI GaAs中EL2分布特性的研究

测量比较了不同条件下热处理后非有意掺杂半绝缘ＬＥＣＧａＡｓ中ＥＬ２浓度及其分布的变化，为了分析这一变化，还检测了位错和Ａｓ沉淀的分布，在实验结果基础上，对ＥＬ２分布不均匀性的起源和热处理改善ＥＬ２分布均匀性的机理进行了讨论。     

热处理和淬火的未掺杂半绝缘LEC GaAs的均匀性

对未掺杂原生ＬＥＣＳＩＧａＡｓ单晶在５００～１１７０℃温度范围进行了单步、两步和三步热处理及淬火，研究了这种热处理对ＥＬ２分布的影响，并检测了位错和Ａｓ沉淀的变化。结果表明，６５０℃以上温度的热处理可以改善ＥＬ２分布均匀性，且在６５０～９５０℃温度范围的热处理中，ＥＬ２均匀性的改善与热处理后的降温速率无明显联系。此外，两步或三步热处理的样品中ＥＬ２分布甚至比单步热处理样品中更优。９５０℃以下的热处理和淬火对位错和Ａｓ沉淀无明显影响。但是１１７０℃热处理井淬火后位错密度增加大约３０％，Ａｓ沉淀消失。对经１１７０℃淬火的样品再进行８０Ｏ℃或９５０℃的热处理，Ａｓ沉淀重新出现。ＥＬ２分布的变化可能与点缺陷、位错和Ａｓ沉淀的相互作用有关。文中提出了这种相互作用的模型，利用该模型可解释不同条件热处理后ＥＬ２分布的变化。     

热处理改善未掺杂LEC GaAs中EL2分布均匀性机理的研究

根据ＥＬ２分布的热处理行为和Ａｓ沉淀分布特征的实验结果，讨论了Ａｓ沉淀对ＥＬ２分布的影响和热处理改善ＥＬ２分布均匀性的机理。     

InAlAs／InGaAs高电子迁移率晶体管的可靠性问题

研究了热处理对亚微米晶格匹配和应变的ＩｎＡｌＡｓ／ＩｎＧａＡｓ亚微米ＨＥＭＴ的影响。发现直流特性变差。ＩＤＳＳ从２９９ｍＡ／ｍｍ减到１８２ｍＡ／ｍｍ，Ｇｍ从５１３ｍＳ／ｍｍ减至２０９ｍＳ／ｍｍ，还测量出了微波参数的降低。ｆＴ和ｆｍａｘ分别减少超过３０％和２０％，一些证据表明，由于在沟道／缓冲层界面和内部额外陷阱的存在而引起的变化是导致这种参数改变的原因。测量出的欧姆接触电阻率从０．１９Ωｍｍ增加至     

InAs量子点的原子力显微镜测试结果分析

我们利用分子束外延（ＭＢＥ）技术在ＧａＡｓ（００１）衬底上生长１８个原子层的ＩｎＡｓ,形成了纳米尺寸的ＩｎＡｓ量子点．对ＩｎＡｓ量子点进行原子力显微镜（ＡＦＭ）测量,得到了量子点的高度和横向尺寸的统计分布以及量子点的测量形貌特征．并且对测量结果利用简单的模型进行了误差的分析     

掺In GaAs晶体中的EL2缺陷及其热处理

比较了掺Ｉｎ和非掺杂ＬＥＣ－ＧａＡｓ晶体中的ＥＬ２缺陷，分析了掺Ｉｎ量的不同与热处理过程的不同对ＬＥＣ－ＧａＡｓ晶体中ＥＬ２缺陷的影响。     

X和Ku波段GaAs MMIC低噪声放大器的测量及其研究

讨论了微波电性能测量在ＧａＡｓＭＭＩＣ研制和开发中的重要作用，研究了Ｘ和Ｋｕ波段ＧａＡｓＭＭＩＣＬＮＡ微波电性能测量及其测量系统设计所要注意的有关问题。给出了相关增益、噪声系数、输入和输出驻波比的测试结果，并介绍了这两个频段ＧａＡｓＭＭＩＣＬＮＡ的应用情况。     

InAlAs／InGaAs高电子迁移率晶体管的可靠性问题

研究了热处理对亚微米晶格匹配和应变的ＩｎＡｌＡｓ／ＩｎＧａＡｓ亚微米ＨＥＭＴ的影响。发现直流特性变差。Ｉ＿（ＤＳＳ）２９９ｍＡ／ｍｍ减到１８２ｍＡ／ｍｍ，Ｇ＿ｍ从５１３ｍＳ／ｍｍ减至２０９ｍＳ／ｍｍ，还测量出了微波参数的降低。ｆ＿Ｔ和ｆ＿（ｍａｘ）分别减少超过３０％和２０％，一些证据表明，由于在沟道／缓冲层界面和内部额外陷阶的存在而引起的变化是导致这种参数改变的原因。测量出的欧姆接触电阻率从０．１９Ωｍｍ曾加至０．２６Ωｍｍ。在一种测试样品中，所有器件的欧姆接触周围都形成了凝聚物，ＸＥＤＳ分析表明，它们中含有Ｇｅ，Ｎｉ和Ｏ。     

热处理改善未掺杂LECGaAs中EL2分布均匀性的机理研究

本文以热处理方法研究了ＬＥＣＳＩ－ＧａＡｓ中ＥＬ２径向分分布变化规律，着重研究了不同的热处理后冷却方式对ＥＬ２分布均匀性改善程度的影响，讨论了ＬＥＣＧａＨｓ中ＥＬ２分布不均匀性的起源及热处理改善ＥＬ２分布均匀性的机理．     

PtTi阻挡层对AuTi／AuGe：Ni／GaAs系统热稳定性及欧姆接触特性的影响

用俄歇电子能谱和电阻测试法研究了ＰｔＴｉ阻挡层与ＡｎＴｉ／ＡｕＧｅ：Ｎｉ／ＧａＡｓ系统热稳定性的影响及欧姆接触特性的退化。结果表明，系统在２５０℃以下热处理是稳定的，它具有良好的欧姆接触特性；在更高的温度下，发现阻挡层下面的Ｔｉ扩散穿过接触层并消耗接触层的ＧａＡｓ，在欧姆接触层下形成Ｔｉ－Ｇａ－Ａｓ／ＧａＡｓ接触。接触电阻Ｒｃ迅速增加，由原始的几欧增大到几百欧。在３２０℃热处理时，系统的欧姆接触消失变成整流接触特性。这是由于系统存在着非理想配比界面区而造成的。     

Effects of electric fields on annealing of radiation damage in MOSFET's

Radiation damage inp-channel MOS devices by 1.5 MeV electrons has been studied by thermal annealing in conjunction with electric fields between the metallic gate and the substrate. Both positive and negative gate biases retard the process of annealing. Annealing with negative gate bias reveals 1) that during thermal annealing the majority of the electrons that recombine with the positive charge in the oxide originate from the conduction band of the silicon, and 2) that during irradiation a great number of ionized electrons that remain in the oxide do not recombine with the holes, but are trapped in weakly bound states. The effect of positive bias on annealing of radiation damage is obscured by the positive charge induced due to positive bias-temperature treatment alone. No effect of drain-to-source potential on annealing has been observed.     

Effect of the Structure and Valence State on the Properties of VO2 Thin Films

VO2 thin films with good switching properties were prepared by controlling the annealing time and the annealing temperature in a vacuum system.The structural,optical and electrical properties of the samples were cahracterized by using XRD,XPS,UV-VIS and electrical measurements.The witching parameters of VO2 thin film were investigated too.The results indicate that before and after phase transition the resistance of VO2 thin films changes aobut three orders of magnitude,the variation of film transmittance of 40% has been carried out with the absorptivity switching velocity of about 0.2607/min at 900 nm.The structural property of samples has been improved but the phase-transition properties have been decreased by increasing the annealing time and annealing temperature.The valence of V ions and the structure of samples have great effect on phase transition properties of VO2 thin films.Discussion on the effecs of annealing time and annealing temperature on the phase-transition temperature and hysteresis width shows that the best reasonable annealing tiem and annealing temperatre can be achieved.     

Effect of final annealing on hot-electron-induced MOSFET degradation

The effect of the post metallization final annealing step on hot-electron-induced device degradation in MOSFET's with various drain/source structures has been studied. It is shown that the hydrogen ambient during the final annealing enhances the hot-electron-induced degradation rate. By performing the final annealing in the nitrogen ambient, the device reliability can be significantly improved without sacrificing any of the device performances.     

Measurement of the increase in the SHG coefficient of proton-exchanged LiNbO/sub 3/ after annealing using a grating diffraction technique

The effect of limited levels of annealing on the second harmonic generation (SHG) coefficient (d/sub 33/) of proton-exchanged LiNbO/sub 3/ has been determined by measuring nonphasematched SHG in a diffraction grating structure. The effect of annealing is to partially restore the intrinsic nonlinearity of the proton-exchanged layer.<>     

多变量离子注入型量子阱混杂效应

为实现InP基单片集成光电子器件和系统,对InGaAsP/InGaAsP分别限制异质结多量子阱激光器结构展开量子阱混杂(QWI)技术研究。在不同能量P离子注入、不同快速热退火(RTA)条件以及循环退火下,研究了有源区量子阱混杂技术,实验结果采用光致发光(PL)谱进行表征。实验结果表明:在不同变量下皆可获得量子阱混杂效果,其中退火温度影响最为显著,且循环退火可进一步提高量子阱混杂效果;PL谱蓝移随着退火温度、退火时间和注入能量的增大而增大,退火温度对蓝移的影响最大,在注入剂量为1×10^14 ion/cm2,注入能量为600keV,750℃二次退火150s时获得最大蓝移量116nm。研究结果为未来基于QWI技术设计和制备单片集成光电子器件和系统奠定了基础。     

42Sn58Bi—96.5Sn3.5Ag系焊点疲劳性能的研究

本文研究了热处理时间对不同组分的４２Ｓｎ５８Ｂｉ－９６．５Ｓｎ３．５Ａｇ焊料疲劳性能的影响,研究发现适当的热处理时间能提高焊点的机械强度,延长焊点的疲劳寿命。     

退火方式和气氛对SIMOX材料质量的影响

本文较为详细地研究了退火程序、退火气氛和注入方式对ＳＩＭＯＸ材料质量的影响，结果表明，采用二重或三重注入并在Ａｒ＋０．５％Ｏ２中退火，可以获得光滑平整的Ｓｉ／ＳｉＯ２界面和高质量的表面硅层。     

Effects of RF annealing on the excess charge centers in MIS dielectrics

Excess fixed charge and surface states in various MIS structures have been successfully removed by the RF annealing technique. Important processing parameters that are pertinent to a successful anneal have been defined. A qualitative model is proposed to describe the annealing mechanisms, and to account for the experimental results. It is thought to be a cooperative effect involving the RF field, the plasma radiation, and the induced wafer temperature.     

Regular and anomalous-type conversion of p-CdTe during Cd-rich annealing

The kinetics of the p-to-n conversion and effect of the anomalous n-to-p reconversion of p-CdTe during annealing at 400–700°C under Cd-rich overpressure have been investigated. The p-to-n conversion is related to diffusion of Cd interstitials together with gettering of foreign fast diffusing acceptors to the center of the sample. The propagation of the n-type layer during annealing at 500°C was found to be significantly slower then the standard square-root dependence on annealing time. The anomalous n-to-p reconversion of the converted n-type sample was observed after sufficient long time annealing at 600°C.