42"PDP平板显示器扫描驱动IC及其生产工艺的实现

在自主研发国内BCD高压工艺的同时,设计并实现了一款用于42″数字电视PDP平板显示屏的扫描驱动芯片.该芯片及其制作工艺不仅实现了Bipolar,CMOS和高压功率DMOS器件的良好兼容（BCD工艺）,而且采用工艺与电路设计互相匹配的交互方式完成了高低电平位移电路和高压输出驱动电路及其器件的设计,有效提高了芯片的性能,减小了芯片的面积.测试结果表明该芯片功能正常,性能良好,各项技术参数基本达到国外同类产品指标.在低压5V和高压160V的情况下工作,完全满足42″PDP显示系统的需求.     

Resonant pole inverter to drive the data electrodes of AC plasma display panel

This paper proposes the use of a resonant pole inverter (RPI) as the control circuit to drive the data electrodes of an ac plasma display panel (PDP). This new application of RPI simplifies the circuit design by using fewer components, and has lower power losses than conventional driver circuits. The circuit employs two resonant MOSFETs and zero-voltage-switching technique to generate an asymmetric pulse train with moderate rising and falling time to drive the data electrodes of a PDP. The circuit also recovers the reactive energy from the PDP, like conventional energy recovery circuits. Power losses are further reduced by adding a dc offset voltage to the pulse train. The power consumptions of different driving circuits are assessed. The proposed circuit is tested on a dual-scan 42-in SVGA ac plasma display panel and is found to be practical.     

Low cost bulk-silicon CDMOS technology and enhanced dv/dt high voltage driver circuit for PDP data driver IC

In this paper, a 256-channel data driver IC for plasma display panels (PDPs) is proposed. A new low cost 0.5 μm bulk-silicon CDMOS (CMOS and DMOS) technology is developed, resulting in the improvement of input data frequency up to 120 MHz and reduction of die cost about 20% compared with the conventional one. A novel high voltage driver circuit is also presented to optimize dv/dt of the output signal from 1.2 to 0.2 V/ns. The proposed circuit can avoid unwanted turning on of the pLEDMOS transistors in output stage and cut down the power dissipation by 12% compared with the conventional one. The application results show rising and falling times of the output stage are 45 and 84 ns, respectively.     

基于PDP驱动技术的行扫描芯片浪涌电压抑制方法

分析了等离子体显示器中行扫描芯片的浪涌电压产生机理。结合浪涌电压产生机理从PDP驱动技术的角度提出抑制浪涌电压的理论方案,并以实验室PDP模组为实验载体,通过修改控制板驱动代码来实现该方案。通过实测新方案的波形,并观察PDP屏显示的静态图像与动态图像,验证了该方案可以有效抑制行扫描芯片的浪涌电压。该方案使得芯片的制造成本降低,从而缩减了整个PDP系统的成本。     

采用电容延时和反馈的抑制毛刺复位接口电路

针对手机用TFT-LCD驱动控制芯片的应用环境具有高噪声、毛刺持续时间长的特点,提出一种采用电容充放电延时和反馈技术的抑制毛刺复位接口电路。该电路可以消除持续时间长达数微秒的单个毛刺。另外,通过自动选择不同的充放电路径,可实现不同的延迟时间,从而可以消除毛刺的累积效益。设计的复位接口电路已经成功应用于176RGB×220分辨率、26万色手机用TFT-LCD驱动控制芯片。采用0.18μmCMOS中压工艺的HSPICE仿真以及工程样片流片结果表明,所设计的复位接口电路的性能完全满足TFT-LCD驱动控制芯片的复杂应用环境要求,并且具有面积开销较小的特点。     

An efficient driving method for a high-voltage CMOS driver IC

An efficient driving method for a high-voltage CMOS driver integrated circuit (IC) is proposed. It utilises an auxiliary circuit to reduce the voltage across the data driver IC when its output stages change their status. The auxiliary circuit can reduce the power consumption and relieve the thermal problems of the driver ICs. Moreover, it has load adaptive characteristics. Power consumption was reduced by 46% at one dot on/off image pattern.     

AC型PDP驱动芯片的研究

主要介绍应用于PDP驱动电路中的高耐压驱动芯片(地址和数据驱动芯片)，简要说明PD驱动电路的主要原理及驱动芯片的应用，重点介绍高耐压部分的工作原理及结构。     

An advanced sustaining technology for plasma display panel using voltage-balancing method

A cost-effective plasma display panel (PDP) sustainer employing current injection method (CIM) for energy recovery is proposed. Using a voltage-balancing technique, driver cost can be reduced by about 20%-30% compared with that of the conventional H-bridge driver by using low-voltage switches. The energy recovery performance can be improved by the current that is built up before the energy recovery operation. This buildup current is utilized to change the polarity of the panel electrode and provides additional variable to determine pulse slopes. Experimental results show that the voltage stress of switches connected in series is identically clamped to sustain voltage during sustain operation and that light is emitted more stably by independent control of the rising and falling slopes using CIM. Therefore, the proposed sustainer is expected to be suitable for a low-cost PDP sustaining driver requiring stable discharge characteristics.     

Three-Level Capacitor Clamping Single Sustaining Driver With Dual Energy Recovery Path for Low Cost AC Plasma Display Panel

This paper proposes a novel single sustaining driver with half the device voltage stresses for plasma display panel (PDP). Since proposed driver lowers the voltage stress of sustain switches by series-connected configuration of switches and clamping capacitor between switches, it uses half voltage rating of sustain switches and, thus, reduces the conduction loss of power switches compared with those of the conventional single sustaining driver. Despite device count possibly increasing, by using low voltage switches and capability to produce zero voltage level in sustaining inverter, the circuit cost does not increase compared with the conventional. In addition, the proposed driver has two energy recovery inductors that are utilized to separate the energy recovery path. This feature reduces the power loss of energy recovery circuit (ERC), which gives an improvement in system efficiency. A comparative analysis and experimental results are presented to show the validity of the proposed single sustaining driver.     

A Cost-Effective Sustain Power Conversion Scheme for Plasma Display Panels

This paper presents a cost-effective sustain power conversion scheme for the plasma display panel (PDP). A new energy-recovery (ER) circuit is proposed for a low-cost sustain driver. As a parallel-resonant type ER circuit, it can recover the energy stored in the PDP without the interconnection of the sustaining and scanning electrodes. It has a simple structure and fewer power devices, providing a lower cost of production. In addition, a high efficiency sustain power supply is proposed to provide a constant sustain voltage for the sustain driver. It achieves zero-current turn-off of the output diode, alleviating the diode reverse-recovery problems. The sustain power efficiency is increased by reducing the switching power loss. Therefore, the cost and power consumption of the PDP can be improved. The proposed circuits are theoretically analyzed in detail. The experimental results based on a 32-in PDP are presented to confirm the validity of the proposed circuits.     

一种PDP扫描驱动芯片的HV-PMOS的研究和实现

对一种适用于106.68cm PDP扫描驱动IC的HV-PMOS器件进行了分析研究。通过使用TCAD软件对HV-PMOS进行了综合仿真,得到了器件性能最优时的结构参数及工艺参数。HV-PMOS器件及整体扫描驱动IC在杭州士兰集成电路公司完成流片。PCM(Process control module)片上的HV-PMOS击穿电压达到了185V,阈值为6.5V。整体扫描驱动芯片的击穿电压达到了180V,满足了设计要求。     

高亮LED驱动芯片HV9931的应用

文中介绍了一款高亮LED驱动芯片HV9931,对HV9931的特点及性能作了详细说明,用Cuk变换器为主电路,以HV9931为控制芯片,设计了一款高亮LED驱动电路,给出了实验结果。该电路能在较宽的输入电压范围内保持输出电流的稳定,实现了LED的可靠照明。     

Design to suppress return-back leakage current of charge pump circuit in low-voltage CMOS process

A new charge pump circuit has been proposed to suppress the return-back leakage current without suffering the gate-oxide reliability problem in low-voltage CMOS process. The four-phase clocks were used to control the charge-transfer devices turning on and turning off alternately to suppress the return-back leakage current. A test chip has been implemented in a 65-nm CMOS process to verify the proposed charge pump circuit with four pumping stages. The measured output voltage is around 8.8 V with 1.8-V supply voltage to drive a capacitive output load, which is better than the conventional charge pump circuit with the same pumping stages. By reducing the return-back leakage current and without suffering gate-oxide overstress problem, the new proposed charge pump circuit is suitable for applications in low-voltage CMOS IC products.     

平板显示器响应特性的分析和测量

动态图像的显示质量是平板显示器的一个重要指标,通过讨论液晶显示器和等离子体显示器不同的性能参数,提出了一种能够精确采集多种灰度条件下的响应曲线的电路设计方案并通过PSPICE模拟对其进行了验证.为了将测量的结果与人眼感知的亮度相互对应,采用标准的亮度计对采集电路的输出进行了校准,并进而得出了被测PDP最高亮度时的荧光粉响应曲线.实验证明该电路在精确度、带宽和信噪比等方面符合采集系统的要求.     

一种高转换速率衬底电位选择电路的设计

本文基于0.5μm 5V DPTM CMOS工艺设计了一款用于LED驱动芯片的衬底电位选择电路。该电路采用峰值电流镜作为偏置,使其在低电压下能够正常工作,并运用源端输入带正反馈的比较器,使得电路具有一定的迟滞和高的转换速率,最后巧妙的设计了输出级,使输出结果尽可能的与芯片中的最高电压相等。仿真结果显示,比较器的转换速率为55.7V/μs,并且具有0.2V的迟滞,满足设计要求。     

Method of dissipating heat generated in high-voltage CMOS driver IC

A method of dissipating the heat generated in a high-voltage CMOS driver IC, which is designed for use with a flat panel display, is proposed. It utilises a charge pump circuit to reduce the voltage across the driver IC when its output stages change their status. It can reduce the power consumption and relieve the thermal problems of driver ICs.     

双环功率控制的突发模式激光驱动器

设计了一款应用于无源光网络（PON）的突发模式激光驱动器及其双环功率控制电路。提出一种电荷补偿和动态偏置电路,减小了激光驱动器电流上升和下降时间,提高了输出电流能力;提出一种双环功率控制的反馈电路,解决了平均功率和消光比随温度变化的问题。基于0.18m RF CMOS工艺完成流片,激光驱动器芯片面积为1 600m800m。测试结果表明,激光驱动器的输出偏置电流和调制电流分别可达90 mA。激光驱动器突发响应开启时间小于2 ns,关断时间小于1 ns,发送数据速率高达2.5 Gbit/s,抖动大小为41 ps。激光驱动器输出平均光功率稳定性为0.26 dB,消光比稳定性为1 dB。该激光驱动器满足了PON系统对激光器的输出功率和稳定性要求。     

A 500-MHz CRT video driver using a linear array

A 500-MHz monolithic video driver integrated circuit (IC) for next-generation leading CRT (cathode ray tube) displays with 4 Mpixels or more is presented. The IC has a 320-mA output current amplifier, a video gain controller, a buffered input multiplexer, and a sample-and-hold bias circuit. Using new open-loop amplifier architecture and novel complementary-bipolar circuitry design, the driver IC with bandwidth f_B of 500 MHz is fabricated. It is economically implemented by a 2.5-μm commercially available linear array with a transistor f_T of 4 GHz. Its f _B/f_T ratio (a figure of merit of the driver circuit design) is three times larger than that of the latest conventional design. The driver IC and power transistors are intended to realize a high-output (50·V_p-p), wideband (300 MHz) CRT video amplifier characterized by good output voltage stability (<1%) without high-voltage output feedback for DC restoration     

A code-pattern-driven digital background calibration technique for SAR ADCs

The article presents the buck converter for the application on headlights of vehicle with chip-level design. The LED components are used as for lighting source, which near/far lights are controlled with high-current switching circuit in the chip. The level-shift circuit and its current driver is proposed to control the input of high-voltage power MOS. The bypass method is presented to reduce the transient time as load current changes suddenly. The input voltage widely ranges from 8 to 21 V while keeping a stable output voltage with 6 V. The chip current can output from 20 to 1500 mA with excellent regulation. This chip had been implemented with TSMC0.25 µm HV- process, and the size of the circuit layout is about 8.6 mm², where includes power switch and far/near lighting switches. Measurements show that peak efficiency can achieve 86.3%. The power regulation is excellent, where the load regulation is only 0.3%, and the line regulation is only 0.5%.

     

An energy-recovery sustaining driver with discharge currentcompensation for AC plasma display panel

A novel driver with discharge current compensation is proposed to drive an AC plasma display panel (PDP). This proposed circuit uses resonance between the inductor and the AC PDP to avoid abrupt charging/discharging. The four switches of the full bridge are all operated with zero-voltage-switching turn-on. In addition, an 8-in AC PDP equipped with the proposed driving circuit, operating at 100 kHz, is investigated. With the discharge current compensation, the experimental results show that the proposed driver can maintain the AC PDP to light at lower voltage (129 V)