Finite element analysis for grinding of wire-sawn silicon wafers: a designed experiment

Silicon is the primary semiconductor material used to fabricate microchips. The quality of microchips depends directly on the quality of starting silicon wafers. A series of processes are required to manufacture high quality silicon wafers. Surface grinding is one of the processes used to flatten the wire-sawn wafers. A major issue in grinding of wire-sawn wafers is the reduction and elimination of wire-sawing induced waviness. This paper presents the results of a finite element analysis for grinding of wire-sawn silicon wafers. In this investigation, a four-factor two-level full factorial design is employed to reveal the main effects as well as the interaction effects of four factors (wafer thickness, waviness wavelength, waviness height and grinding force) on effectiveness of waviness reduction. The implications of this study to manufacturing are also discussed.     

Fine grinding of silicon wafers

Silicon wafers are used for the production of most microchips. Various processes are needed to transfer a silicon crystal ingot into wafers. As one of such processes, surface grinding of silicon wafers has attracted attention among various investigators and a limited number of articles can be found in the literature. However, no published articles are available regarding fine grinding of silicon wafers. In this paper, the uniqueness and the special requirements of the silicon wafer fine grinding process are introduced first. Then some experimental results on the fine grinding of silicon wafers are presented and discussed. Tests on different grinding wheels demonstrate the importance of choosing the correct wheel and an illustration of the proper selection of process parameters is included. Also discussed are the effects of the nozzle position and the flow rate of the grinding coolant.     

Grinding induced subsurface cracks in silicon wafers

Silicon wafers are used for production of most microchips. Various processes are needed to transfer a silicon crystal ingot into wafers. To ensure high surface quality, the damage layer generated by each of the machining processes (such as lapping and grinding) has to be removed by its subsequent processes. Therefore it is essential to assess the subsurface damage for each machining process. This paper presents the observation of subsurface cracks in silicon wafers machined by surface grinding process. Based on cross-sectional microscopy methods, several crack configurations are identified. Samples taken from different locations on the wafers are examined to investigate the effects of sample location on crack depth. The effects of grinding parameters such as feedrate and wheel rotational speed on the depth of subsurface crack have been studied by a set of factorial design experiments. Furthermore, the relation between the depth of subsurface crack and the wheel grit size is experimentally determined.     

ELID grinding of silicon wafers: A literature review

Silicon wafers are the most widely used substrates for fabricating integrated circuits. There have been continuous demands for higher quality silicon wafers with lower prices, and it becomes more and more difficult to meet these demands using current manufacturing processes. In recent years, research has been done on electrolytic in-process dressing (ELID) grinding of silicon wafers to explore its potential to become a viable manufacturing process. This paper reviews the literature on ELID grinding, covering its set-ups, wheel dressing mechanism, and experimental results. It also discusses the technical barriers that have to be overcome before ELID grinding can be used in manufacturing.     

Fine grinding of silicon wafers: designed experiments

Silicon wafers are the most widely used substrates for semiconductors. The falling price of silicon wafers has created tremendous pressure to develop cost-effective processes to manufacture silicon wafers. Fine grinding possesses great potential to reduce the overall cost for manufacturing silicon wafers. The uniqueness and the special requirements of fine grinding have been discussed in a paper published earlier in this journal. As a follow-up, this paper presents the results of a designed experimental investigation into fine grinding of silicon wafers. In this investigation, a three-variable two-level full factorial design is employed to reveal the main effects as well as the interaction effects of three process parameters (wheel rotational speed, chuck rotational speed and feed-rate). The process outputs studied include grinding force, spindle motor current, cycle time, surface roughness and grinding marks.     

An experimental investigation into soft-pad grinding of wire-sawn silicon wafers

Silicon is the primary semiconductor material used to fabricate microchips. A series of processes are required to manufacture high-quality silicon wafers. Surface grinding is one of the processes used to flatten wire-sawn wafers. A major issue in grinding of wire-sawn wafers is reduction and elimination of wire-sawing induced waviness. Results of finite element analysis have shown that soft-pad grinding is very effective in reducing the waviness. This paper presents an experimental investigation into soft-pad grinding of wire-sawn silicon wafers. Wire-sawn wafers from a same silicon ingot were used for the study to ensure that these wafers have similar waviness. These wafers were ground using two different soft pads. As a comparison, some wafers were also ground on a rigid chuck. Effectiveness of soft-pad grinding in removing waviness has been clearly demonstrated.     

Fine grinding of silicon wafers: effects of chuck shape on grinding marks

Silicon wafers are used for production of most microchips. Various processes are needed to transfer a silicon ingot into wafers. With continuing shrinkage of feature sizes of microchips, more stringent requirement is imposed on wafer flatness. Fine grinding of silicon wafers is a patented technology to produce super flat wafers at a low cost. Six papers on fine grinding were previously published in this journal. The first paper discussed its uniqueness and special requirements. The second one presented the results of a designed experimental investigation. The third and fourth papers presented the mathematical models for the chuck shape and the grinding marks, respectively. The fifth paper developed a mathematical model for the wafer shape and the sixth paper studied machine configurations for spindle angle adjustments. This paper is a follow up of the above-mentioned work. A mathematical model to predict the depth of grinding marks for any chuck shape will be first developed. With the developed model, effects of the chuck shape (as well as the wheel radius) on the depth of grinding marks will be studied. Finally, results of pilot experiments to verify the model will be discussed.     

Grinding wheels for manufacturing of silicon wafers: A literature review

Grinding is an important process for manufacturing of silicon wafers. The demand for silicon wafers with better quality and lower price presents tremendous challenges for the grinding wheels used in the silicon wafer industry. The stringent requirements for these grinding wheels include low damage on ground surfaces, self-dressing ability, consistent performance, long wheel lives, and low prices. This paper presents a literature review on grinding wheels for manufacturing of silicon wafers. It discusses recent development in abrasives, bond materials, porosity formation, and geometry design of the grinding wheels to meet the stringent requirements.     

A study on surface grinding of 300 mm silicon wafers

Most of today's IC chips are made from 200 mm or 150 mm silicon wafers. It is estimated that the transition from 200 mm to 300 mm wafers will bring a die cost saving of 30–40%. To meet their customers' needs, silicon wafer manufacturers are actively searching for cost-effective ways to manufacture 300 mm wafers with high quality. This paper presents the results of a study on surface grinding of 300 mm silicon wafers. In this study, a three-factor two-level full factorial design is employed to reveal the main effects as well as the interaction effects of three process parameters (wheel rotational speed, chuck rotational speed and feedrate). The process outputs studied include spindle motor current, surface roughness, grinding marks and depth of subsurface cracks.     

A grinding-based manufacturing method for silicon wafers: generation mechanisms of central dimples on ground wafers

Silicon wafers are the fundamental building blocks for most integrated circuits. The lapping-based manufacturing method currently used to manufacture the majority of silicon wafers will not be able to meet the ever-increasing demand for flatter wafers and lower prices. A grinding-based manufacturing method has been investigated experimentally to demonstrate its potential to manufacture flat silicon wafers at a lower cost. It has been demonstrated that the site flatness on the ground wafers (except for a few sites at the wafer center) could meet the stringent specifications for future silicon wafers. This paper, as a follow up, addresses one of the reasons for the poor flatness at the wafer center: central dimples on ground wafers. A finite element model is developed to illustrate the generation mechanisms of central dimples. Then, effects of influencing factors (including Young's modulus and Poisson's ratio of the grinding wheel segment, dimensions of the wheel segment, grinding force, and chuck shape) on the central dimple sizes are studied. Pilot experimental results will be presented to substantiate the predicted results from the finite element model. This provides practical guidance to eliminate or reduce central dimples on ground wafers.     

Waviness removal in grinding of wire-sawn silicon wafers: 3D finite element analysis with designed experiments

Silicon wafers are used to fabricate more than 90% of integrated circuits. Surface grinding has been used to flatten wire-sawn silicon wafers. A major issue in grinding of wire-sawn wafers is that conventional grinding cannot effectively remove the waviness induced by wire-sawing process. Soft-pad grinding is a promising method to effectively remove waviness. This paper presents the results of three-dimensional (3D) finite element analysis of soft-pad grinding of wire-sawn silicon wafers. In this investigation, a four-factor two-level full factorial design is employed to reveal main effects as well as interaction effects of four factors (Young’s modulus, Poisson’s ratio, and thickness of the soft pad, and waviness wavelength of the wafer) on the effectiveness of waviness reduction. Implications of this study to manufacturing are also discussed.     

Origin,modeling and suppression of grinding marks in ultra precision grinding of silicon wafers

A phenomenon commonly encountered in grinding of silicon wafers is the grinding marks, which are difficult to remove by subsequent polishing process, and have been a great obstacle to the manufacture of silicon wafers with higher flatness. In this paper, the grinding marks formation mechanism was clarified, a grinding marks formation model and an angular wavelength model were developed, and a grinding marks suppression method was proposed. A series of grinding experiments were carried out to verify the developed models and investigate the effect of the wafer rotational speed, the wheel rotational speed, the infeed rate, the axial run out of the cup wheel and the spark out time. The results show that: (1) grinding marks are waviness generated on silicon wafers caused by non-uniform material removal circumferentially due to the axial run out of the cup wheel; (2) grinding marks present multiple angular wavelengths characteristics; (3) the angular wavelength of grinding marks is a one-variable function of the rotational speed ratio of the wheel to the wafer; and (4) grinding marks could be suppressed significantly by properly selecting the rotational speed ratio.     

Fine grinding of silicon wafers: a mathematical model for the wafer shape

Over 90% of semiconductors are built on silicon wafers. The fine grinding process has great potential to produce very flat wafers at a low cost. Four papers on fine grinding have been previously published by the authors. The first paper discussed its uniqueness and special requirements. The second one presented the results of a designed experimental investigation. The third and fourth papers presented mathematical models for the chuck shape and the grinding marks, respectively. As a follow up, this paper develops a mathematical model for the wafer shape. After the model is described, its practical applications in wafer manufacturing are discussed.     

An experimental study of flat fixed abrasive grinding of silicon wafers using resin-bonded diamond pellets

The purpose of this paper is to investigate the effect of the diamond grain size, the wheel rotation speed, the table rotation speed, and the applied pressure in the vertical flat grinding on the surface roughness of silicon wafers using Taguchi orthogonal array design. Besides, the pits and resistivity on the wafers were studied as well. The experiment results showed that the diamond grain size and the wheel rotation speed of the vertical flat grinding for the roughness of wafers obtained are the relatively larger significant contribution. When the smaller diamond grit size, the faster wheel rotation speed, the faster table rotation speed, and the smaller applied pressure in the flat grinding are employed, the traces produced by the grains are denser and the chip thickness and the depth of cut were smaller, which cause the silicon wafer to produce the higher degree of the ductile grinding. This will lead the wafer surface to produce the smaller amount and size of the pits, thereby generating the lower surface roughness. In addition, the center site of the wafer obtained is the smaller amount and size of the pits than the outer of the wafer, which produces the better surface roughness and the lower resistivity.     

超声振动辅助研磨单晶碳化硅晶片工艺研究

针对传统研磨方法加工单晶碳化硅晶片存在的材料去除率低、磨料易团聚等问题,本文提出超声振动辅助研磨方法,并探究不同工艺参数（转速、磨料质量分数、抛光压力、磨料粒径）对单晶碳化硅晶片研磨效率和表面质量的影响规律。试验结果和理论分析表明:超声振动有效提高了单晶碳化硅晶片研磨的材料去除率;在研磨盘转速为50 r/min,磨料质量分数为2.5%,压力为0.015 MPa,磨料粒径为0.5 μm时超声振动对材料去除率的提升效果最明显,分别提升23.4%,33.8%,72.3%,184.2%。同时,通过对研磨过程中表面粗糙度的追踪检测,能确定不同粒径磨料超声振动辅助研磨的最佳时间。      

金刚石线锯电解磨削切割多晶硅片的试验研究

基于金刚石线锯切割系统,开展了金刚线电解磨削切割多晶硅片试验。结果表明:电解磨削复合加工方法在机械磨削的同时复合了阳极氧化和腐蚀,在硅片表面产生了机械损伤缺陷和电化学腐蚀缺陷。酸制绒时腐蚀反应在两种类型缺陷处顺利进行,形成均匀致密的绒面结构,有效降低硅片表面反射率,有利于后续电池片光电转换效率的提高。     

Fine grinding of silicon wafers: a mathematical model for grinding marks

The majority of today’s integrated circuits are constructed on silicon wafers. Fine-grinding process has great potential to improve wafer quality at a low cost. Three papers on fine grinding were previously published in this journal. The first paper discussed its uniqueness and special requirements. The second one presented the results of a designed experimental investigation. The third paper developed a mathematical model for the chuck shape, addressing one of the technical barriers that have hindered the widespread application of this technology: difficulty and uncertainty in chuck preparation. As a follow up, this paper addresses another technical barrier: lack of understanding on grinding marks. A mathematical model to predict the locus of the grinding lines and the distance between two adjacent grinding lines is first developed. With the developed model, the relationships between grinding marks and various process parameters (wheel rotational speed, chuck rotational speed, and wheel diameter) are then discussed. Finally, results of pilot experiments to verify the model are discussed.     

Residual stress analysis on silicon wafer surface layers induced by ultra-precision grinding

Grinding residual stresses of silicon wafers affect the performance of IC circuits. Based on the wafer rotation ultra-precision grinding ma-chine, the residual stress distribution along grinding marks and ground surface layer depth of the ground wafers are investigated using Raman microspectroscopy. The results show that the ground wafer surfaces mainly present compressive stress. The vicinity of pile-ups between two grinding marks presents higher a compressive stress. The stress value of the rough ground wafer is the least because the material is removed by the brittle fracture mode. The stress of the semi-fine ground wafer is the largest because the wafer surface presents stronger phase trans-formations and elastic-plastic deformation. The stress of the fine ground wafer is between the above two. The strained layer depths for the rough, semi-fine, and fine ground wafers are about 7.6 m, 2.6 m, and 1.1 m, respectively. The main reasons for generation of residual stresses are phase transformations and elastic-plastic deformation.     

Fine grinding of silicon wafers: machine configurations for spindle angle adjustments

This paper addresses an important aspect of silicon wafer fine grinding: machine design. For any commercially available wafer grinders, spindle angle adjustments based on the wafer shape ground is almost inevitable in order to achieve flat wafers. However, there has been no commonly accepted guidance for the design of machine configurations to ensure the easiest adjustment. Practitioners doing spindle angle adjustments have been frustrated by the difficulties of achieving the adjustments on commercial wafer grinders. This paper first illustrates such difficulties with a machine configuration frequently cited in the literature. It then demonstrates the potential ease of spindle angle adjustments with a proposed machine configuration. Next, it shows mathematically that the proposed configuration (specifically, a pair of the axes for spindle angle adjustments) is uniquely determined once the wheel diameter and wafer diameter are known. It also shows that the proposed configuration is the best in terms of ease in spindle angle adjustments. The spindle angle adjustments will be more difficult with any other configurations deviating from the proposed one.     

Ultra-precision grinding

Ultra-precision grinding is primarily used to generate high quality and functional parts usually made from hard and difficult to machine materials. The objective of ultra-precision grinding is to generate parts with high surface finish, high form accuracy and surface integrity for the electronic and optical industries as well as for astronomical applications. This keynote paper introduces general aspects of ultra-precision grinding techniques and point out the essential features of ultra-precision grinding. In particular, the keynote paper reviews the state-of-the-art regarding applied grinding tools, ultra-precision machine tools and grinding processes. Finally, selected examples of advanced ultra-precision grinding processes are presented.