模拟集成电路宏模型计算机辅助自动建立

本文提出一种新的模拟集成电路宏模型计算机辅助自动建立方法，通用性强，宏模型精度高。     

基于符号分析和统计分析的宏模型自动建立方法

符号分析和统计分析是自动建立宏模型的常用方法．本文综合了这两种方法，提出一种新的宏模型自动建立方法，克服了分别利用以上两种方法建立宏模型的缺陷，使建立的宏模型具有更高的精度本文结出了应用新方法建立宏模型的实例，并与SPICE模拟结果进行了比较，以说明新方法的有效性．     

实用集成运算放大器宏模型的研究

本文提出了一个新的通用运算放大器（简称运放）宏模型，它几乎能精确地模拟运放的全部特性，其中的等效输入噪声、温度响应和电源电压抑制比等特性的模拟，则是以前发表的同类模型所不具备的。它不仅可模拟大、中、小信号激励的线性或非线性响应，并且对双极型、双极－场效应管混合型和ＭＯＳ型运放都适用。此外，对输入级电流饱和特性也作了精确地模拟；推导出了其频域分析中的解析表达式。     

模拟集成电路宏模型计算机辅助自动建立

本文提出一种新的模拟集成电路宏模型计算机辅助自动建立方法,通用性强、宏模型精度高。文中详细描述了建立过程,给出相应的软件流程,并对建立过程中的一些关键算法进行了探讨和创新。最后给出利用新方法建立二级运放宏模型的实例。     

Spice仿真的模拟宏模型生成

正如缩写Spice(Simulation Pro-gram with Integrated Circuit Emphasis)所建议的那样,此程序可用来帮助集成电路(IC)的设计。然而,人们很快发现在晶体管级试图仿真几个IC时存在问题。收敛和速度是两个必须克服的主要障碍。在Spice程序的开发中早就认识到这种问题,因而加州大学伯克利分校的研究人员(Boyle,Cohn.Pederson和Solomon)推出一种新的方法来模拟包含很多IC的电路。此方法是用一个运放宏模型的开发来证明的。     

一种改进的运算放大器小信号建模方法及验证

以经典的频率特性模型为基础，针对两级运算放大器结构进行分析，提出一种改进的运算放大器小信号宏模型建立方法。给出一种模型可信度评估机制，并采用BSIM3V3MOSFET模型，对改进的运放小信号建模方法进行仿真验证。与经典建模方法对比结果表明，此方法模型符合度达到99.8%，易于软件集成，可有效缩短仿真时间。     

基于符号分析和统计分析和宏模型自动建立方法

在采用等效电量关系法对开关电容DC-DC变换器进行分析的基础上，研究了脉冲宽度调制(PWM)和频率调制(FM)的关系.得出开关电容DC-DC变换器的统一等效电路并指出对开关电容DC-DC变换器，无论采取什么控制方法，都是能耗控制，因此级联低压差线性稳压器是一种最佳的控制方式.     

外部光注入半导体激光器的大信号宏模型

本文给出了外部光注和半导体激光器（ＬＤ）的大信号非线性宏模型，使得对外部光注入ＬＤ的特性可以用通用电路分析软件进行分析，运用此模型对外部光注入ＬＤ的双稳和动态调制特性进行了分析，模型的分析结果与已报导的理论和实验基本一致。     

真空三极管的Pspice宏模型的精确化

介绍了应用于Pspice仿真的真空三极管的两种宏模型及其数学模型，并应用Matlab最优化及曲线拟合这种新方法对模型参数进行计算，且使用此模型对应用于中性束诊断系统的大功率负高压脉冲电源中的大功率三极管进行了研究。     

集成电路宏模型综述

本文对集成电路宏模型的发展作了综述。集成电路宏模型是分析和设计大型网络的一种有效方法。文中叙述了它的概念、基本假设和建模方法。着重讨论了数字、模拟和数-模混合集成电路宏模型,并指出了尚待解决的问题。     

An X‐Band Carbon‐Doped InGaP/GaAs Heterojunction Bipolar Transistor MMIC Oscillator

This paper addresses a fully‐integrated low phase noise X‐band oscillator fabricated using a carbon‐doped InGaP heterojunction bipolar transistor (HBT) GaAs process with a cutoff frequency of 53.2 GHz and maximum oscillation frequency of 70 GHz. The oscillator circuit consists of a negative resistance generating circuit with a base inductor, a resonating emitter circuit with a microstrip line, and a buffering resistive collector circuit with a tuning diode. The oscillator exhibits 4.33 dBm output power and achieves ?127.8 dBc/Hz phase noise at 100 kHz away from a 10.39 GHz oscillating frequency, which benchmarks the lowest reported phase noise achieved for a monolithic X‐band oscillator. The oscillator draws a 36 mA current from a 6.19 V supply with 47.1 MHz of frequency tuning range using a 4 V change. It occupies a 0.8 mm × 0.8 mm die area.     

单片机控制的PTCR热敏电阻器阻-温特性测试系统

介绍一种用ＭＣＳ－５１单片机控制的ＰＴＣＲ热敏电阻器阻－温特性测试系统，其中分压取样电阻器采用模拟开关进行切换。测试系统由样品室、模拟开关、Ｒ－Ｖ变换器、信号放大器、Ａ／Ｄ转换器、Ｄ／Ａ转换器、记录仪、单片机和打印机等部分组成，样品室内设有加热电炉和热电偶等部件。     

Virtual impedance control for a regional dynamic voltage restorer

A dynamic voltage restorer (DVR) can be installed in a middle-voltage (MV) power grid, to concurrently protect a cluster of sensitive loads from voltage sags. To further improve its efficiency and reduce the difficulty in its implementation, a novel control strategy for operating such a DVR as a virtual impedance in series with sensitive loads is proposed in this paper. In addition to its usual function of compensating for voltage sags, such a DVR can also operate as a virtual inductance, to function as a fault current limiter (FCL) during a downstream fault, or a virtual capacitance, to function as a series compensator (SC) to compensate the voltage loss along the feeder line during heavy load. Based on a dual-loop control design, strategies for operating a DVR as a series virtual inductance and a virtual capacitance are proposed, and methods for tuning the parameter values and a stability analysis of the whole system are presented. The feasibility and effectiveness of the proposed method are verified by simulations using the PSCAD software, and experimental results obtained using a prototype DVR are presented.     

Delay Analysis of All-Optical Packet-Switching Ring and Bus Communications Networks

We study the delay performance of all-optical packet communication networks configured as ring and bus topologies employing cross-connect switches (or wavelength routers). Under a cross-connect network implementation, a packet experiences no (or minimal) internal queueing delays. Thus, the network can be implemented by high speed all-optical components. We further assume a packet-switched network operation, such as that using a slotted ring or bus access methods. In this case, a packet's delay is known before it is fed into the network. This can be used to determine if a packet must be dropped (when its end-to-end delay requirement is not met) at the time it accesses the network. It also leads to better utilization of network capacity resources. We also derive the delay performance for networks under a store-and-forward network operation. We show these implementations to yield very close average end-to-end packet queueing delay performance. We note that a cross-connect network operation can yield a somewhat higher queueing delay variance levels. However, the mean queueing delay for all traffic flows are the same for a cross-connect network operation (under equal nodal traffic loading), while that in a store-and-forward network increases as the path length increases. For a ring network loaded by a uniform traffic matrix, the queueing delay incurred by 90% of the packets in a cross-connect network may be lower than that experienced in a store-and-forward network. We also study a store-and-forward network operation under a nodal round robin (fair queueing) scheduling policy. We show the variance performance of the packet queueing delay for such a network to be close to that exhibited by a cross-connect (all-optical) network.     

Identification of the source of an interferer by comparison with known carriers using a single satellite

We describe a method for identifying the source of a satellite interferer using a single satellite. The technique relies on the fact that the strength of a carrier signal measured at the downlink station varies with time due to a number of factors, and we use a quantum‐inspired algorithm to compute a “signature” for a signal, which captures part of the pattern of variation that is a characteristic of the uplink antenna. We define a distance measure to numerically quantify the degree of similarity between two signatures, and by computing the distances between the signature for an interfering carrier and the signatures of the known carriers being relayed by the same satellite at the same time, we can identify the antenna that the interferer originated from, if a known carrier is being relayed from it. As a proof of concept, we evaluate the performance of the technique using a simple statistical model applied to measured carrier data.     

Optical and electrical characteristics of GaN vertical light emitting diode with current block layer

A GaN vertical light emitting diode(LED)with a current block layer(CBL)was investigated.Vertical LEDs without a CBL,with a non-ohmic contact CBL and with a silicon dioxide CBL were fabricated.Optical and electrical tests were carried out.The results show that the light output power of vertical LEDs with a non-ohmic contact CBL and with a silicon dioxide CBL are 40.6%and 60.7%higher than that of vertical LEDs without a CBL at 350 mA,respectively.The efficiencies of vertical LEDs without a CBL,with a non-ohmic contact CBL and with a silicon dioxide CBL drop to 72%,78%and 85.5%of their maximum efficiency at 350 mA,respectively. Moreover,vertical LEDs with a non-ohmic contact CBL have relatively superior anti-electrostatic ability.     

A 3.1 to 5 GHz CMOS Transceiver for DS‐UWB Systems

This paper presents a direct‐conversion CMOS transceiver for fully digital DS‐UWB systems. The transceiver includes all of the radio building blocks, such as a T/R switch, a low noise amplifier, an I/Q demodulator, a low pass filter, a variable gain amplifier as a receiver, the same receiver blocks as a transmitter including a phase‐locked loop (PLL), and a voltage controlled oscillator (VCO). A single‐ended‐to‐differential converter is implemented in the down‐conversion mixer and a differential‐to‐single‐ended converter is implemented in the driver amplifier stage. The chip is fabricated on a 9.0 mm² die using standard 0.18 µm CMOS technology and a 64‐pin MicroLead Frame package. Experimental results show the total current consumption is 143 mA including the PLL and VCO. The chip has a 3.5 dB receiver gain flatness at the 660 MHz bandwidth. These results indicate that the architecture and circuits are adaptable to the implementation of a wideband, low‐power, and high‐speed wireless personal area network.     

片上螺旋带中央抽头对称电感的新解析参数提取方法

我们提出了一种针对硅基有中心抽头的片上螺旋电感的参数提取的新的解析函数方法.通过建立一系列闭合解析公式,模型参数町以通过一系列引入分块的线性特征函数方法来提取出.通过基于0.18μmCMOS工艺的测量数据的验证,同时与传统的方法进行比较,我们的方法可以在宽频带内实现电感的高精度仿真.     

MEMS红外探测器响应时间测量方法研究

传统地,MEMS红外探测器响应时间的测量需要基于黑体辐射源、斩波器、水冷装置等设备搭建一套复杂的测量系统,然而斩波器的遮挡区域和透光区域具有一定的面积,其按某频率工作时会消耗一定的时间,而测试所得的器件响应时间无法排除斩波器的工作耗时,导致测试结果存在较大误差,所测响应时间为14.46ms。为解决这一问题,提出了一种以钛宝石激光器为辐射光源,利用声光调制器构建纳秒级激光脉冲,MEMS红外探测器响应激光脉冲的作用输出脉冲电信号,很好地规避了测量系统中设备工作耗时引入的时间参数,所测响应时间仅为3.13ms。由此可见,传统方法中斩波器工作耗时引入的时间误差甚至超过器件响应时间的300%,充分证明了此方法可以有效解决这一问题,进而为MEMS红外探测器以及其它光学探测器性能参数的测试与计量提供了一种新的方法。     

一种新颖全差分光电集成接收机的标准CMOS实现

提出一种新颖的全差分光电集成接收机,它包含了全差分光电探测器和相应的差分接收电路,其中全差分光电探测器的作用是实现入射光信号到全差分光生电流信号的转换.采用特许3.3 V、0.35μm标准CMOS工艺,实现了一种相应的宽带、高灵敏度全差分光电集成接收机.测试结果表明:对于850 nm的入射光,集成全差分光电探测器的差分跨阻前置放大器(TIA)的工作速率可达到500 Mbit/s,而整个光接收机的带宽则达到了1.098 5 GHz;在10-12的误码率条件下,灵敏度可达到-12.3 dBm.