钒受主能级在n型4H-SiC中的深能级瞬态傅里叶谱和光致发光

借助深能级瞬态傅里叶谱研究了钒离子注入在SiC中引入的深能级陷阱.掺人的钒在4H-SiC中形成两个深受主能级,分别位于导带下0.81和1.02eVt处,其电子俘获截面分别为7.0 × 10-16和6.0×10-16cm2.对钒离子注入4H-SiC样品进行低温光致发光测量,同样发现两个电子陷阱,分别位于导带下0.80和1.6eV处.结果表明,在n型4H-SiC掺入杂质钒可以同时形成两个深的钒受主能级,分别位于导带下0.8±0.01和1.1±0.08eV处.     

钒掺杂形成半绝缘6H-SiC的补偿机理

研究了钒掺杂生长半绝缘6H-SiC的补偿机理.二次离子质谱分析结果表明,非故意掺杂生长的6H-SiC中,氮是主要的剩余浅施主杂质.通过较深的钒受主能级对氮施主的补偿作用,得到了具有半绝缘特性的SiC材料.借助电子顺磁共振和吸收光谱分析,发现SiC中同时存在中性钒(V4+)和受主态钒(V3+)的电荷态,表明掺入的部分杂质钒通过补偿浅施主杂质氮,形成受主态钒,这与二次离子质谱分析结果相吻合.通过对样品进行吸收光谱和低温光致发光测量,发现钒受主能级在6H-SiC中位于导带下0.62eV处.     

钒掺杂形成半绝缘6H-SiC的补偿机理

研究了钒掺杂生长半绝缘6H-SiC的补偿机理.二次离子质谱分析结果表明,非故意掺杂生长的6H-SiC中,氮是主要的剩余浅施主杂质.通过较深的钒受主能级对氮施主的补偿作用,得到了具有半绝缘特性的SiC材料.借助电子顺磁共振和吸收光谱分析,发现SiC中同时存在中性钒(V4 )和受主态钒(V3 )的电荷态,表明掺入的部分杂质钒通过补偿浅施主杂质氮,形成受主态钒,这与二次离子质谱分析结果相吻合.通过对样品进行吸收光谱和低温光致发光测量,发现钒受主能级在6H-SiC中位于导带下0.62eV处.     

退火对离子注入GaN产生的深能级的影响

我们最近报道了大剂量Al+注入原生GaN后对其光学性质的影响。表明Al+的注入可能产生了某种深能级电子陷阱 ,由于电子陷阱俘获导带电子 ,导致发光猝灭。而经一定条件的退火处理 ,可使深的电子陷阱发生变化 ,因而与缺陷间的跃迁相关的黄色荧光可得到一定程度的恢复。由于注入样品的电阻率高达 1 0 1 2 Ω·cm ,因此不能用已有的常规方法测量。我们为此发展了一种称为“光增强电流谱”(PSCS)新方法 ,用于测量高阻样品中的深能级。研究发现 ,在经过快速退火处理的样品中 ,不能消除由于注入产生的准连续深能级带 ;而在某种常规条件退火的样品中 ,发现了 5个位于导带下 1 .77eV ,1 .2 4eV ,1 .1 6eV ,0 .90eV和 0 .86eV的深电子陷阱 ,它们都是Al+注入经退火后形成的稳定结构。实验发现退火使注入产生的准连续深能级带转变为独立的深能级结构 ,虽不能使GaN的本征发光得到恢复 ,但对黄色荧光的恢复是有利的。此研究有助于了解退火处理对离子注入的GaN的电学结构与发光产生的影响。PSCS的意义在于它适用于测量一切高阻半导体样品中与非辐射跃迁相联系的深陷阱能级 ,而不仅仅适用于测量Al+注入GaN产生的深陷阱能级     

微重力条件下生长GaAs单晶的电学和光学性质研究

用多种实验手段分别对地面和太空生长的掺Te砷化镓单晶的电学、光学均匀性和深能级行为进行了实验研究.初步结果表明:在太空进行再生长的GaAs单晶电子浓度比原地面生长的籽晶小一个数量级,电子浓度由地面晶体到太空晶体的过渡是陡变的;DLTS测量发现太空单晶中存在两个电子陷阱,分别位于导带下0.27eV和0.60eV处,深能级密度为浅施主N_D的10~(-3)-10~(-4);少子注入未观察到空穴陷阱;用太空GaAs单晶为衬底制备的25个单异质结(SH)二极管,具有一致的I-V和发光特性,这反映了太空晶体的均匀性优于地面晶体.此外,还对太空生长GaAs单晶电子浓度降低的可能原因、深能级行为以及太空生长高质量晶体的前景作讨论.     

氧化锌纳米颗粒缺陷能级发光特性研究

报道了在室温下用荧光光谱仪和飞秒脉冲激光激发诱导光致发光．获得氧化锌纳米颗粒(平均直径约为10nm)缺陷发光光谱的实验，验证了氧化锌纳米颗粒缺陷能级的位置。锌填隙缺陷在距离导带底0．4eV处产生浅施主能级．锌空位缺陷在价带顶0．3eV处产生浅受主能级，氧锌替位缺陷在价带顶1．08eV处产生深受主能级，在导带底1．56eV处有氧空位缺陷引起的深杂质能级产生．氧填隙缺陷在价带顶1．35eV处产生深受主能级。     

界面陷阱分布对SiC MOSFET准静态C-V特性的影响

为了分析4H-SiC/SiO₂固定电荷和界面陷阱对MOSFET准静态电容-电压(C-V)特性曲线的影响机制，对不同栅氧氮退火条件下的n沟道4H-SiC双注入MOSFET(DIMOSFET)进行了氧化层中可动离子、界面陷阱分布和准静态C-V特性曲线的测试，并结合仿真探讨了测试频率、固定电荷、4H-SiC/SiO₂界面陷阱分布对准静态C-V特性曲线的影响。实验和仿真结果表明：电子和空穴界面陷阱分别影响准静态C-V曲线的右半部分和左半部分；界面陷阱的E₀、E_s、N₀(E₀为陷阱能级中心与导带底能级或价带顶能级之差，E_s为陷阱能级分布的宽度，N₀为陷阱能级分布的密度峰值)对准静态C-V曲线的影响是综合的；当E₀为0 eV,E_s为0.2 eV,电子和空穴捕获截面均为1×10^-18 cm²,电子和空穴界面陷阱的N₀分...     

用深能级瞬态谱法测量GaAS MESFET中的深能级

本文介绍了用深能级瞬态谱(DLTS)法测量GaAs MESFET的深能级杂质和缺陷。在有源层中一般没有测到深能级杂质和缺陷,但在有源层与缓冲层界面附近测到了多个空穴陷阱和电子陷阱。其中空穴陷阱的能级有0.41eV、0.53eV、0.68eV、0.91eV;电子陷阱的能级有0.30eV、0.44eV、0.84eV。并对部分陷阱的性质作了初步的讨论。     

n-InP中深能级的研究

本文主要利用夹有薄氧化层、势垒高度约为0.65eV的Au/InP肖特基势垒来研究未掺VPE n-InP、未掺及轻掺Fe InP体材料中的深能级.共测到七个电子陷阱和两个空穴陷阱,对其中两个电子陷阱进行了详细的研究.我们在掺Fe晶体中测到一个电子发射激活能为0.69eV的电子陷阱,考虑到其中包含有0.050eV的俘获势垒,则能级值应为0.64eV,这与用Hall方法在掺Fe半绝缘材料中发现的0.65eV能级较一致,所以我们认为该能级与铁有关.另外在所有的材料中都存在0.62eV的电子陷阱,估计该能级与本征缺陷有关.     

In_(0.53)Ga_(0.47)As/InP异质结的深能级

我们报道关于用液相外延生长的In_(0.53)Ga_(0.47)As/InP异质结雪崩光电二极管中的深能级。使用导纳光谱学和静态电容-电压枝术鉴别并研究了两个电子能级。发现一个能级仅位于InP层中,是激活能∈_(1A)=0.20±0.02ev的类似受主能级,其体密度为N_(1A)≈10~(15)cm~(-3)。该陷阱密度在In_(0.53).Ga_(0.47)As/InP异质界面上急剧升高到该区域内的背景载流子浓度的10倍左右。由于能带之间的排斥,在低温下陷阱的填充使得在异质界面上导带不连续从△∈_(?)=0.19ev降低到0.03ev。而第二个陷阱仅呈现In_(0.53)Ga_(0.47)As特性,其激活能∈_(tB)=0.16±0.01ev,体密度在3×10~(13)cm~(-3)和8×10~(13)cm~(-3)之间。     

Study of trapping phenomenon in 4H-SiC MESFETs: dependence on substrate purity

This work demonstrates that the "purity", meaning the low density of electron traps in a semi-insulating (SI) SiC substrate, can be crucial for the electrical characteristics of 4H-SiC MESFETs. Structures realized on two types of SI substrates have been investigated. The first kind is vanadium doped substrates grown by the classical Physical Vapor Transport (PVT) sublimation technique. The second kind are extremely low vanadium content SI substrates grown by the high temperature CVD (HTCVD) technique. For all the transistors, I/sub d/-V/sub ds/ measurements have been performed as a function of temperature. Different parasitic effects have been observed on the static output characteristics in the case of PVT substrates. Frequency dispersion measurements of the transconductance and drain-source output conductance, have next been realized. The results give clear evidence of the presence of deep traps in the transistors realized on PVT substrates. Those traps have an activation energy of 1.05 eV and a capture cross section between 10/sup -18/ cm/sup -2/ and 10/sup -19/ cm/sup -2/. They are most probably related to vanadium. The correlation between the presence of these traps and the parasitic effects on the output characteristics is discussed and the trap localization in the structure is established. In the case of HTCVD very low vanadium substrates, no parasitic effect have been observed and the presence of traps was not detected by the different characterization techniques.     

Native levels and degradation in GaAs0.6P0.4 LEDs

The native level structure in Te-doped GaAs_0.6P_0.4 LED's has been studied by transient capacitance techniques. The presence of deep electron traps at 0.56 and 0.38 eV below the conduction band, and hole traps at 0.65 and 0.41 eV above the valence band has been shown. Several shallow levels and a residual IR emission are also present. Forward bias degradation has been investigated and related to the native level and IR radiation evolution.     

Trap characterization in buried-gate n-channel 6H-SiC JFETs

We present a detailed characterization of deep traps present in buried gate, n-channel 6H-SiC JFETs, based on transconductance measurements as a function of frequency. Four different deep levels have been identified, which are characterized by activation energies of 0.16, 0.18, 0.28, and 0.54 eV. Furthermore, based on the transconductance frequency dispersion features (upward or downward dispersion), we have been able to infer that three deep levels (0.16, 0.18 and 0.54 eV) are hole traps localized in the p-gate layer and one (0.28 eV) is an electron trap localized in the n-channel     

A Study of Deep Defect Levels in Semi-Insulating SiC Using Optical Admittance Spectroscopy

Optical admittance spectroscopy (OAS), supported by electron paramagnetic resonance (EPR) measurements, is used to identify the controversial vanadium acceptor levels in vanadium-doped semi-insulating (SI) 4H-SiC and 6H-SiC. The V^3+/4+ levels for the cubic site are likely located at E _c − 0.67 ± 0.02 eV and E _c − 0.70 ± 0.02 eV in 6H-SiC and E _c − 0.75 ± 0.02 eV in 4H-SiC. A peak at 0.87 ± 0.02 eV in the 6H-SiC is tentatively assigned to the same transition at the hexagonal site and the associated transition in 4H-SiC is thought to occur near 0.94 eV. All assignments are supported by the observation of V³⁺ in the EPR spectrum.     

The effect of post-implantation annealing temperature on the deep states present in SIMOX MOSFET’s as observed using enhancement mode current DLTS

The effect of various post-implantation annealing temperatures on the deep states present in SIMOX transistors is studied using enhancement mode current DLTS. Two electron traps were detected at 0.45 eV and 0.33 eV below the conduction band edge; both were removed by post-implantation annealing at a temperature of 1275° C. The ability to anneal these states suggests that they are due to the presence of defect structures which are themselves removed during this annealing. Hole traps were also detected at 0.47 eV and 0.38 eV above the valence band edge; however these traps were not removed by high temperature annealing. It is believed that these hole traps are related to the presence of iron contamination.     

Determination of shallow defect levels using thermally stimulated current in implant-layer/substrate junctions of GaAs MESFETs

Thermally stimulated current measurements have been made using test samples of np- junctions formed by ion-implantation on semi-insulating substrates. The results of measurements demonstrate that in spite of a high-value series resistance of the substrate these junctions can be used for rapid identification of shallow electron traps. The trap energy levels determined for the test samples are at 0.13eV and 0.29eV below the bottom of the conduction band possibly arising due to implantation damage or induced by thermal processes.     

Deep centers in neutron-transmutation-doped gallium arsenide

Three electron traps at 0.21, 0.27 and 0.68 eV below the conduction band edge and a hole trap at around 0.11 eV above the valence band edge have been observed in neutron-transmutation-doped liquid-phase-epitaxial GaAs. All four levels are undetectable after a heat treatment at 600°C for 5 min.