一种基于频率响应屏蔽技术的FIR滤波器设计新方法

提出了一种设计高效窄过渡带宽FIR滤波器的新方法。该方法以传统的频率响应屏蔽(FRM)方法为基础,通过选择特定的原型滤波器来降低合成的数字FIR滤波器的复杂度。本文研究了该方法的原理、实现结构和设计方法,并通过设计实例证明了此方法的有效性。     

FBAR建模及用于MIMO终端的滤波器设计

薄膜体声波谐振器(FBAR)是优良的射频频率器件.用基本Mason模型对FBAR器件进行建模,并分析阐述了FBAR射频滤波器的结构和设计方法.在此模型和设计方法基础上,对多输入多输出(MIMO)的1900MHz个人通信服务(PCS)频段和800 MHz蜂窝(Cellular)频段终端的FBAR射频多工滤波器进行了设计和性能分析.滤波器用ADS软件进行仿真和优化,仿真结果表明,本设计比Avago公司主流产品ACFM-7101性能要好,特别是带内纹波.     

用FPGA实现IIR数字滤波器

数字滤波器是数字信号处理的关键组件之一，主要由加(减)法器、乘法器、延迟模块等部分组成。按单位脉冲响应长度，数字滤波器可分为无限脉冲响应滤波器和有限脉冲响应滤波器两类，分别称为IIR滤波器和FIR滤波器。本文以设计二阶无限脉冲响应滤波器IIR滤波器为例，选用ALTERA公司的FLEXl0KA系列FPGA，表述从单元设计、逻辑综合、布局布线到仿真验征的设计流程。     

新型微带带通滤波器设计

提出一种新型微带带通滤波器设计,它是由带有J-变频器的零阶谐振ZOR(zeroth-order resonant)系统构成.零阶谐振系统以互补分裂谐振环和一系列沟道组成的左手材料LHM(Left-Handed Material)为基本单元,在传统设计的基础上进行改进,得到适合具有严格设计要求的滤波器设计使用模型,并给出此零阶谐振系统的共振频率和导纳斜率参数的确定方法.实验表明,该微带带通滤波器的模拟量与测量之间存在最佳关系,并具有高选择性能、对称的响应曲线以及良好的通带带宽控制性能.     

遗传算法在滤波器设计中的应用

遗传算法是一种模拟自然界生物进化的搜索算法,简单易行、鲁棒性强.介绍了遗传算法在频率抽样法滤波器设计中的应用;用遗传算法确定过渡带样本值,解决了传统方法(查表法)不能保证数据是最优的问题;并给出了FIR数字高通、带通滤波器设计的两个例子,实验结果表明通过遗传算法设计的FIR滤波器性能较查表法得到了改善.     

粒子群优化算法在FIR数字滤波器设计中的应用

本文针对有限脉冲响应(FIR)数字滤波器的设计实质上是一个多参数优化问题,提出了一种用粒子群优化算法(PSO)设计FIR数字滤波器的方法.首先将滤波器的设计问题转化为滤波器参数的优化问题,然后利用粒子群优化算法对整个参数空间进行高效并行搜索以获得参数的最优化.FIR数字低通、带通滤波器设计实例证明了该方法的有效性和优越性.     

光格型FIR增益均衡滤波器设计

为了避免传统的经验方法设计增益均衡滤波器(GEF)的主观性和不确定性,将电子学格型有限冲激响应(FIR)数字滤波的概念和算法移植到光学格型滤波器,提出一种基于掺Er光纤放大器(EDFA)自发增益(ASE)谱的频率采样设计法和光格型GEF的设计方案。该滤波器由数个各种分光比的波导耦合器经由具有单位时延差的光波导级连构成。分析了根据目标传递函数求解光格型阵列参数的算法,进而针对实际的ASE谱设计了40阶的GEF,在1527～1564nm波段内的增益平坦波动小于±0.4dB,并具有线性相频响应特性和互易性。     

一种可变带宽FRM滤波新结构

设计窄过渡带FIR滤波器的一种非常有效的方法是采用频率响应屏蔽技术(FRM).但是如果过渡带要求过窄,经典FRM滤波器各子滤波器的阶数会变得很高.据此,本文提出一种可变带宽镜像半带滤波FRM滤波新结构,通过增加两个镜像半带滤波器,将原型滤波器及其互补滤波器的镜像分别分成奇偶两部分,使得原型滤波器和屏蔽滤波器的设计更加灵活,并降低了滤波器的计算复杂度,达到了设计高效窄过渡带滤波器的目的.理论分析和实例均验证了该结构的有效性.     

基于嵌入式微计算机6811的IIR数字滤波器设计

无限脉冲响应(IIR)数字滤波器在很多领域中有着广阔的应用。本文用Butterworth法、切比雪夫1法法、切比雪夫2法通过MATLAB仿真软件对几种给定性能的IIR数字滤波器进行了仿真设计,并用基于MOTOROLA公司的M68HC11单片机进行了硬件设计实现,表明数字滤波器具有灵活、方便、功能强的特点。     

软件无线电中高速FIR内插成型滤波器的设计和实现

从设计原理和软件实现两个方面对软件无线电中的FIR(有限长单位脉冲响应)内插成型滤波器的设计与实现的方法进行了分析：以降低滤波运算量，提高性能，减少数据缓存量与输出延迟为目标，采用基于子滤波器时分处理的多相滤波器的设计方法。在此基础上，运用切比雪夫逼近法来计算内插滤波器的频响，并针对具体的数字无线电台的内插滤波器的几种实现方案进行了比较。     

Design of High-Order Extrapolated Impulse Response FIR Filters with Signed Powers-of-Two Coefficients

Expensive multiplication operations can be replaced by simpler additions and hardwired shifters so as to reduce power consumption and area size, if the coefficients of a digital filter are signed power-of-two (SPT). As a consequence, FIR digital filters with SPT coefficients have been widely studied in the last three decades. However, most approaches for the design of FIR filters with SPT coefficients focus on filters with length less than 100. These approaches are not suitable for the design of high-order filters because they require excessive computation time. In this paper, an approach for the design of high-order filters with SPT coefficients is proposed. It is a two-step approach. Firstly, the design of an extrapolated impulse response (EIR) filter is formulated as a standard second-order cone programming (SOCP) problem with an additional coefficient sensitivity constraint for optimizing its finite word-length effect. Secondly, the obtained continuous coefficients are quantized into SPT coefficients by recasting the filter-design problem into a weighted least squares (WLS) sequential quadratic programming relaxation (SQPR) problem. To further reduce implementation complexity, a graph-based common subexpression elimination (CSE) algorithm is utilized to extract common subexpressions between SPT coefficients. Simulation results show that the proposed method can effectively and efficiently design high-order SPT filters, including Hilbert transformers and half-band filters with SPT coefficients. Experiment results indicate that 0.81N∼0.29N adders are required for 18-bit N-order FIR filters (N=335∼3261) to meet the given magnitude response specifications.     

全相位DFT数字滤波器的设计与实现

本文提出了全相位数据空间的概念,并基于DFT/IDFT滤波导出了一种新型的零相位滤波器——全相位DFT(APDFT)数字滤波器.本文给出了它的脉冲响应与相应的DFT滤波响应向量之间的正、反变换公式,证明了这种滤波器的一些重要性质.APDFT方法兼有窗函数法和频率采样法的优点,是一种设计FIR滤波器的新方法.理论分析和模拟实验证实,其总体性能优于传统方法.APDFT数字滤波器除可用通常的卷积结构实现外,也可用一种直接频域网络实现.本文给出了这种网络结构及其简化算法.这种网络具有实时自设计功能.它可以构成时变系统用于滤波器传递函数实时可变的场合,可以方便地集成为一个长度和频响均可编程的通用零相位数字滤波器,而且还可用于实现严格互补子带滤波.     

Design of M‐Channel IIR Uniform DFT Filter Banks Using Recursive Digital Filters

In this paper, we propose a method for designing a class of M‐channel, causal, stable, perfect reconstruction, infinite impulse response (IIR), and parallel uniform discrete Fourier transform (DFT) filter banks. It is based on a previously proposed structure by Martinez et al. [1] for IIR digital filter design for sampling rate reduction. The proposed filter bank has a modular structure and is therefore very well suited for VLSI implementation. Moreover, the current structure is more efficient in terms of computational complexity than the most general IIR DFT filter bank, and this results in a reduced computational complexity by more than 50% in both the critically sampled and oversampled cases. In the polyphase oversampled DFT filter bank case, we get flexible stop‐band attenuation, which is also taken care of in the proposed algorithm.     

基于神经网络的4型FIR滤波器的优化设计

详细讨论了4型线性相位滤波器的幅频特性与正弦基函数神经网络算法的关系,分析了神经网络系统的稳定条件,给出了FIR滤波器优化设计实例。根据4型FIR滤波器的幅频响应特性,构造出一个相应的神经网络模型,并建立了FIR线性相位数字滤波器的神经网络算法。该算法通过训练神经网络权值,使设计的数字滤波器与希望得到的FIR线性相位滤波器的幅频响应之间的误差平方和最小化,从而获得FIR线性相位数字滤波器的脉冲响应。计算机仿真表明了该算法的有效性和优异性能。     

自积分式脉冲磁场传感器的补偿研究

自积分式磁场传感器用于脉冲场测量时，普遍存在低频失真问题，本文提出一种数字滤波的方案对传感器的低频特性进行补偿。滤波器采用无限冲激响应滤波器的形式，并以系统辨识的方法直接在时域进行设计，应用结果表明，该滤波器能有效地修复失真波形，使传感器的响应特性得到显著改善。     

Design techniques for high-speed multirate multistage FIR digital filters

This paper presents architecture design techniques for implementing both single-rate and multirate high-speed finite impulse response (FIR) digital filters, with emphasis on the multirate multistage interpolated FIR (IFIR) digital filters. Well-known techniques to achieve high-speed and low-power applications for the single-rate digital FIR architecture are summarized, followed by the introduction of variable filter order selection, optimal filter decomposition, memory-saving and mirror symmetric filter pairs techniques which offer further gains in both performance and complexity reduction for the multirate multistage digital FIR architecture. A filter design example with TSMC 0.25?µm standard cell for 64-QAM baseband demodulator shows that the area is reduced by 39% for low-complexity application. Moreover, for high-speed application, the chip can operate at 714?MHz. Finally, a designed decimator which is used in the CDMA cellular shows that the area is reduced by 70% as compared with conventional approach.     

A simple and efficient design of variable fractional delay FIR filters

In this paper, a simple and efficient approach for designing one-dimensional variable fractional delay finite impulse response digital filters is proposed. Two matrix equations, based respectively on the weighted least-squares function of the optimum fixed fractional delay filter and the filter coefficient polynomial fitting, are formulated in tandem to form the design algorithm, which only has the computation complexity comparable with that of designing fixed finite impulse response digital filters. A design example is also given to justify the effectiveness and advantages of the proposed design method.     

基于频域滤波数字均衡器的设计

为了解决多频段数字均衡滤波器处理过程中数据计算量的问题,通过对数字均衡器设计的分析,将数字音频信号进行频域滤波处理,最终设计出一种高效的数字均衡滤波器。通过将数字信号在频域中进行傅里叶变换,提出了一种基于快速傅里叶变换原理的算法,该算法中码位倒置和蝶形运算方法的处理与通常的快速傅里叶变换相比,更有效地减少了数据的运算量,减少了数据处理的时间。结果表明,使用该种算法设计的数字均衡滤波器与传统的时域滤波方法相比,具有很好的实时处理效果。     

Digital filter design techniques in the frequency domain

Digital filtering is the process of spectrum shaping using digital components as the basic elements. Increasing speed and decreasing size and cost of digital components make it likely that digital filtering, already used extensively in the computer simulation of analog filters, will perform, in real-time devices, the functions which are now performed almost exclusively by analog components. In this paper, using the z-transform calculus, several digital filter design techniques are reviewed, and new ones are presented. One technique can be used to design a digital filter whose impulse response is like that of a given analog filter; other techniques are suitable for the design of a digital filter meeting frequency response criteria. Another technique yields digital filters with linear phase, specified frequency response, and controlled impulse response duration. The effect of digital arithmetic on the behavior of digital filters is also considered.     

基于均匀信道化滤波器组的研究与设计

信道化作为软件无线电系统和宽带数字接收机的关键技术之一,而多相滤波结构的信道化处理技术和滤波器组的设计一直是研究难点。根据多相滤波结构,本文给出一种有限冲激响应滤波器的设计方法,然后根据均匀信道化的要求设计出均匀滤波器组,设计出的原型滤波器能够无失真采样滤波并能重构。利用等波纹设计的同时,使优化所得通带波纹数量级达到10-3,衰减达到-100dB。利用MATLAB设计及仿真表明,该设计是可靠的,可作为高速率滤波器设计的方法。