基于CMOS数字工艺的低噪声传感器接口电路

设计了一种应用于超低频率的低噪声MEMS传感器接口电路。该电路利用斩波技术降低1/f噪声,并利用MOS电容替代模拟无源元件等方法,使之与数字工艺相兼容。采用CSMCCMOS 0.5μm 2P3MCMOS工艺,实现了增益为36dB的读出电路。该电路的等效输入噪声功率谱密度为13μV/(Hz)~1/2,3阶交调失真为-33.6dB。电路的功耗为10mW。     

一种用于天文望远镜的低噪声CCD读出电路

设计了一种用于天文望远镜的低噪声电荷耦合器件(Charge Coupled Devices,CCD)读出电路.该读出电路主要包括电容增益电路、单端转差分电路、双斜率积分电路以及缓冲器电路.CCD读出电路采用SMIC 0.18μm1P6M CMOS工艺实现.后仿真结果表明,在电源电压3.3V,输入信号67kHz,输出信号80mV峰值时,输出信号动态范围86dB,等效输入噪声2.523nV/Hz1/2,整体功耗1.25mW.     

Ka波段单片低噪声放大器

利用0.25 μm GaAs PHEMT工艺设计并制作了一种Ka波段低噪声放大器芯片.提出了适用于低噪声放大器的PHEMT器件特征.电路采用四级级联结构.利用微带电路实现输入、输出和级间匹配.通过对电路增益、噪声系数和驻波比等指标进行多目标优化,确定了器件参数.该放大器测试结果为:26.5～36 GHz频段内增益大于20 dB;多数测试点噪声系数小于3 dB,其中34 GHz频点噪声仅为1.94 dB;芯片面积2.88 mm×1 mm.     

一种用于电容式MEMS麦克风的读出电路

在分析电容式MEMS麦克风工作原理的基础上,提出了一种用于电容式MEMS麦克风的读出电路.该读出电路包括低极点频率的高通滤波器和低噪声单位增益缓冲器,高通滤波器用来读出MEMS麦克风在声压作用下产生的小信号,单位增益缓冲器用来隔离高通滤波器和后续信号处理电路,并提供较大的驱动能力.仿真结果表明,当电源电压在1.2～3.6V之间时,读出电路都可以正常工作,且静态电流小于60 μA,等效输入噪声为5.2 μV,电压增益大于-1.56 dB(83.6％).由于消除了失调电压的影响,电路可以处理幅度范围为50 μV～200 mV的小信号(参考X-FAB 0.35 μm CMOS工艺).     

CZT探测器低噪声读出电路设计

采用TSMC 0.35 μm CMOS工艺,设计了CZT探测器低噪声读出电路链和一款多通道能量读出ASIC,该电路将应用于8×8 CZT像素探测器的能量读出.给出了系统框图及低噪声能量读出电路链,分析了低噪声技术策略.实验结果表明,能量分辨范围为20 keV～4 MeV,等效噪声电荷(ENC)小于150个电子,电荷转电压增益为9.2 V/pC,非线性度小于3％,多通道串扰小于10个电子,满足设计需求.     

超高增益低噪声红外焦平面读出电路研究

高增益探测对InGaAs焦平面探测器在微光夜视条件下成像有重要意义。设计了一款InGaAs焦平面用的高增益低噪声64×64元读出电路。读出电路输入级采用CTIA模式(电容负反馈放大),通过计算发现输入级运算放大器热噪声是主要噪声源,采用单端替代差分运放将输入级噪声降低26%。同时,研究积分电容和增益、满阱容量、噪声的关系,将积分电容降低到1 fF,实现了超高增益和低噪声探测。读出电路采用0.18mm工艺设计,像元中心距为30mm。经过PEX(寄生参数提取)参数提取,实际积分电容为0.94 fF,经过测试芯片整体功耗低至24.1 m W,电路噪声电子数为4.37e。     

一种用于电容型体硅微陀螺的低噪声读出电路芯片

读出电路位于微传感器系统信号通路的最前端,是决定系统性能的关键因素。本文针对音叉式体硅微陀螺的具体应用,提出了一种低噪声电容读出电路,芯片采用斩波技术降低了电路的低频1/f噪声、失调电压以及参考电压失配的影响,提高了读出电路的分辨率和动态范围;提出一种噪声电荷转移的分析方法,用于分析和预测读出电路的噪声性能;建立一种简化的微陀螺传感器仿真模型,用于模拟读出电路对微传感器的响应。读出电路在0.35 m 2P4 M 标准CMOS工艺下设计流片,并与微传感器进行了联合应用,芯片面积为22.5 mm2,在5 V电源电压,100 kHz的时钟频率下,实现了4 aF的电容分辨率和94 dB的动态范围。     

低噪声、低功耗微电容读出ASIC设计

针对差分电容式微电子机械系统(MEMS)加速度计,设计了一种低噪声、低功耗微电容读出专用集成电路(ASIC)。电路采用开关电容结构,使用相关双采样(CDS)技术降低电容-电压(C-V)转化电路的低频噪声和偏移电压。通过优化MEMS表头噪声匹配、互补金属氧化物半导体(CMOS)开关和低噪声运算放大器来降低频带内的混叠热噪声。采用电源开关模块和门控时钟技术来降低电路功耗,同时集成自检测电路和温度传感器。采用混合CMOS工艺进行流片加工,测试结果表明,优化后ASIC的电容分辨率为槡1.203 aF/Hz,系统分辨率为0.168 mg(量程2 g),芯片功耗约为2 mW。同时,该ASIC还具有很好的上电特性和稳定性。     

2×8低噪声InGaAs/InP APD读出电路设计

对In0.53Ga0.47As/InP雪崩光电二极管(APD)探测器进行了特性分析.以大阵列研究为基础,结合器件特性设计了一个2×8低噪声读出电路(ROIC),电路主要由电容反馈互阻放大器(CTIA)和相关双采样(CDS)电路单元构成,并对读出电路的时序、积分电容等进行了设计.电路采用0.6 μm CMOS工艺流片,芯片面积为2 mm×2 mm,电荷存储能力为5×107个,功耗小,噪声低,设计达到预期要求.     

微光CMOS图像传感器读出电路研究

高性能的信号读出电路是微光CMOS图像传感器的重要组成部分,如何降低读出电路噪声,提高读出电路输出信号的信噪比成为读出电路设计的重点。本文设计了一种高增益低噪声的电容反馈跨阻放大器CTIA（Capacitive Trans impedanceAmplifier）与相关双采样电路CDS （Correlated Double Sampling）相结合的微光探测器读出电路。在CTIA电路中,采用T网络电容实现fF级的积分电容,并通过增益开关控制,来达到对微弱光信号的高增益低噪声读出。采用CSMC公司的0.5μm标准CMOS工艺库对电路进行流片,测试结果表明：在光电流信号为20~300 pA范围内,积分时间为20μs,该电路功能良好,信噪比（SNR）达到10,能应用于微光CMOS图像传感器。     

An auto-ranging photodiode preamplifier with 114 dB dynamic range

A low noise photodiode preamplifier integrated circuit with auto-ranging gain capability has been designed, fabricated, and tested. When connected to a 25 pF input capacitance, the four-channel device has an input referred noise below 0.5 fC, which is just 3 dB above the minimum kTC noise. The preamp chip is designed to handle a full-scale charge input of 210 pC and has a 114 dB dynamic range. The device achieves a linearity specification of 0.01% of input reading ±0.25 ppm of full scale with a sample period of 1 ms. The chip consumes 135 mW and is 5.8 mm×7.4 mm in size     

A low noise interface circuit design of micro-machined gyroscope

The analyses of MEMS gyroscope interface circuit on thermal noise, 1/f noise and phase noise are made in this paper. A closed-loop differential driving circuit and a low-noise differential detecting circuit based on the high frequency modulation are designed to limit the noise. The interface chip is implemented in a standard 0.5 μ m CMOS process. The test results show that the resolution of sensitive capacity can reach to 6.47 × 10^-20 F at the bandwidth of 60 Hz. The measuring range is ± 200°/s and the nonlinearity is 310 ppm. The output noise density is 5.8°/(h·√Hz). The angular random walk (allen-variance) is 0.092°/√h and the bias instability is 2.63°/h.     

Design and Optimization of a Low-Noise Voltage Reference Using Chopper Stabilization Technique

A low-noise voltage reference is presented to enhance resolution of MEMS capacitive accelerometer and reduce system noise,in which the circuit uses Chopper stabilization (CHS) technique for the suppression of low-frequency noise.A 3.7V voltage reference chip is fabricated in a 0.5-μm CMOS process.Compared with the voltage reference without using CHS,the proposed design is much more superior in low-noise performance.Experimental results indicate that the output noise of reference voltage VRP can reach 0.121μV/sqrt(Hz) at the vicinity of 3Hz.     

宽范围可调MEMS集成滤波器的设计与制作

基于MEMS平面螺旋电感和MEMS可调平行板电容设计并制作了一种宽可调范围的集成可调带通滤波器。理论分析并计算了可调滤波器电感和可调电容的取值范围,利用HFSS设计得到各元件结构参数,并使用AnsoftDesigner分析软件对可调滤波器电路进行了模拟仿真。设计得到的可调滤波器中心频率调节范围为400～700MHz,可调率达75%,实现了宽范围可调,3dB相对带宽范围为5%～10%,插入损耗小于5dB,芯片尺寸为20mm×6mm×0.4mm。给出了一套基于MEMS平面工艺的MEMS集成可调滤波器的制作流程,实现了MEMS集成可调滤波器的工艺制作及测试。测试结果表明,获得的可调滤波器实现了通带频率宽范围可调。     

一种基于0.35 μm CMOS工艺的单片集成微机械陀螺仪接口电路

本文介绍了一种用于读取角速度信号的单片集成微机械陀螺仪接口电路,该接口电路采用了相关双采样技术以抑制1/f噪声和运算跨导放大器的失调.为了方便系统仿真和测试,本文设计了一种微机械陀螺仪的等效电路.该接口电路采用0.35 μm CMOS工艺设计并制造,芯片总面积为1.09mm×0.87mm.后仿真结果表明,该接口电路能达到0.58aF的电容分辨精度,动态范围达99.7dB.测试结果表明,接口电路系统增益为26.6mV/fF,在3.5V电源电压下系统总功耗为20.4mW.     

A novel MEMS inertial sensor with enhanced sensing capacitors

A novel MEMS inertial sensor with enhanced sensing capacitors is developed. The designed fabricated process of the sensor is a deep RIE process, which can increase the mass of the seismic to reduce the mechanical noise, and the designed capacitance sensing method is changing the capacitance area, which can reduce the air damping between the sensing capacitor plates and reduce the requirement for the DRIE process precision, and reduce the electronic noise by increasing the sensing voltage to improve the resolution. The design and simulation are also verified by using the FEM tool ANSYS. The simulated results show that the transverse sensitivity of the sensor is approximately equal to zero. Finally, the fabricated process based on silicon-glass bonding and the preliminary test results of the device for testing grid capacitors and the novel inertial sensor are presented. The testing quality factor of the testing device based on the slide-film damping effect is 514, which shows that the enhanced capacitors can reduce mechanical noise. The preliminary testing result of the sensitivity is 0.492 pf/g.     

Design and Analysis of a Performance-Optimized CMOS UWB Distributed LNA

In this paper, the systematic design and analysis of a CMOS performance-optimized distributed low-noise amplifier (DLNA) comprising bandwidth-enhanced cascode cells will be presented. Each cascode cell employs an inductor between the common-source and common-gate devices to enhance the bandwidth, while reducing the high-frequency input-referred noise. The noise analysis and optimization of the DLNA accurately accounts for the impact of thermal noise of line terminations and all device noise sources of each CMOS cascode cell including flicker noise, correlated gate-induced noise and channel thermal noise on the overall noise figure. A three-stage performance-optimized wideband DLNA has been designed and fabricated in a 0.18-mum SiGe process, where only MOS transistors were utilized. Measurements of the test chip show a flat noise figure of 2.9 dB, a forward gain of 8 dB, and input and output return losses below -12 dB and -10 dB, respectively, across the 7.5 GHz UWB band. The circuit exhibits an average IIP3 of -3.55 dBm. The 872 mum times 872 mum DLNA chip consumes 12 mA of current from a 1.8-V DC voltage.     

一个新型的大检测电容结构的MEMS惯性传感器研究

A novel MEMS inertial sensor with enhanced sensing capacitors is developed. The designed fabricated process of the sensor is a deep RIE process, which can increase the mass of the seismic to reduce the mechanical noise, and the designed capacitance sensing method is changing the capacitance area, which can reduce the air damping between the sensing capacitor plates and reduce the requirement for the DRIE process precision, and reduce the electronic noise by increasing the sensing voltage to improve the resolution. The design and simulation are also verified by using the FEM tool ANSYS. The simulated results show that the transverse sensitivity of the sensor is approximately equal to zero. Finally, the fabricated process based on silicon-glass bonding and the preliminary test results of the device for testing grid capacitors and the novel inertial sensor are presented. The testing quality factor of the testing device based on the slide-film damping effect is 514, which shows that the enhanced capacitors can reduce mechanical noise. The preliminary testing result of the sensitivity is 0.492pf/g.     

用于脑电信号记录的低噪声低功耗放大器

为了满足脑电信号(EEG)记录阵列的应用需求,设计了一种全差分的低噪声、低功耗放大器电路.该电路利用亚阈值区晶体管作为伪电阻,与输入电容和反馈电容形成高通通路,有效抑制了输入信号的直流失调电压,无需片外隔直电容,实现了电路的全集成.放大器中的跨导放大器(OTA)采用亚阈值晶体管进行设计,实现了较大的输出摆幅、良好的功耗和噪声性能.放大器电路采用SMIC 130 nm 1P8M混合信号工艺实现,芯片面积0.6 mm2.测试结果表明,在电源电压0.6V时,放大器可处理信号带宽为10 Hz～7 kHz,等效输入噪声的均方根值为3.976 μV,噪声有效因子为3.658,总功耗仅为2.4 μW.     

Noise and mismatch optimization for capacitive MEMS readout

This paper presents a high precision CMOS readout circuit for a capacitive MEMS gyroscope. A continuous time topology is employed as well as the chopper noise cancelling technique. A detailed analysis of the noise and mismatch of the capacitive readout circuit is given. The analysis and measurement results have shown that thermal noise dominates in the proposed circuit, and several approaches should be used for both noise and mismatch optimization. The circuit chip operates under a single 5 V supply, and has a measured capacitance resolution of 0.2 aF/√Hz. With such a readout circuit, the gyroscope can accurately measure the angular rate with a sensitivity of 15.3 mV/°/s.