An effective suboptimal power loading scheme in OFDM-based cognitive radio systems

Orthogonal frequency division multiplexing (OFDM) is an attractive modulation candidate for Cognitive Radio (CR) networks. Effective and reliable subcarrier power allocation in OFDM-based Cognitive Radio (CR) networks is a challenging problem. This paper focuses on the power allocation for OFDM-based Cognitive Radio (CR) networks. Our objective is to maximize the total transmission rates of Secondary Users (SU) by adjusting the power of subcarrier while the interference introduced to the Primary User (PU) is within a certain range and the total power of subcarrier is not beyond the total power constraint. We investigate the optimal power allocation algorithm for OFDM-based Cognitive Radio (CR) based on convex optimization theory. Then, because of high complexity of the optimal power allocation algorithm, we propose an effective suboptimal power loading scheme. Theory analysis and simulation results show that the performance of the suboptimal power allocation algorithm is close to the performance of the optimal power allocation algorithm, while the complexity of the suboptimal power allocation algorithm is much lower.     

铁路5G-R基站太阳能供电架构及应用

针对铁路5G专用移动通信(5G-R)系统基站布置密集、单体功耗高的特点,结合铁路无线通信的需求,研究采用太阳能(PV)为5G-R系统基站的射频拉远单元(RRU)设备供电的方案。对比分析5G-R系统RRU设备日用电规律及太阳能电池日发电规律,确定了采用太阳能结合储能与外电源的供电体系,通过比较几种太阳能电池与外电源组合供电架构的经济性与可靠性,推荐采用直流侧切换的供电架构,并进一步提出了采用直流侧智能配电的太阳能供电方案。本研究在保证5G-R系统运行安全可靠的同时,通过采用太阳能供电方式降低了铁路5G-R系统对外电源的需求。     

基于GaN 的3. 4~ 3. 6 GHz 高增益Doherty 功率放大器

基于两级功率放大器架构,设计了一款平均输出功率为37 dBm(5 W)的高增益Doherty 功率放大器。 该器件通过增加前级驱动功率放大器提高Doherty 功率放大器的增益,采用反向Doherty 功率放大器架构,将λ/4 波 长传输线放置在辅助功放后端,相位补偿线放置在主功放前端,并使主功放输出匹配网络采用双阻抗匹配技术实现 阻抗变换,如此可扩宽功率放大器的工作带宽。连续波测试结果显示:3. 4~3. 6 GHz 工作频段内,饱和输出功率在 44. 5 dBm 以上,功率饱和工作点PAE 在43. 9%以上;在平均输出功率(37 dBm,5 W)工作点,回退量大于7. 5 dB,功 率附加效率PAE 为36. 8%以上,功率增益在31 dB 以上。     

Linearised HBT MMIC power amplifier with partially RF coupled active bias circuit for W-CDMA portable terminals applications

A highly linear MMIC power amplifier for wideband code-division multiple-access (W-CDMA) portable terminals has been devised and implemented with a new integrated on-chip lineariser. The proposed lineariser, consisting of an InGaP/GaAs heterojunction bipolar transistor (HBT) active bias circuit partially coupled to RF input power together with a feedback capacitor, effectively improves gain compression with little insertion power loss and no additional die area. The optimised lineariser improves maximum output power (P1 dB) by 2 dB and adjacent channel leakage power ratio (ACLR) by 4 dB, and the implemented HBT MMIC power amplifier exhibits a P1 dB of 30 dBm, a power gain of 30 dB, a power added efficiency of 42% at the maximum output power under an operation voltage of 3.4 V, and an ACLR of -34 dBc at 27 dBm of output power.     

High linearity 5.2-GHz power amplifier MMIC using CPW structure technology with a linearizer circuit

A built-in linearizer was applied to improve the linearity in a 5.2-GHz power amplifier microwave monolithic integrated circuit (MMIC), which was undertaken with 0.15-μm AlGaAs/InGaAs D-mode PHEMT technology.The power amplifier (PA) was studied taking into account the linearizer circuit and the coplanar waveguide (CPW) structures. Based on these technologies, the power amplifier, which has a chip size of 1.44 × 1.10 mm~2, obtained an output power of 13.3 dBm and a power gain of 14 dB in the saturation region. An input third-order intercept point (IIP_3) of-3 dBm, an output third-order intercept point (OIP_3) of 21.1 dBm and a power added efficiency (PAE) of 22% were attained, respectively. Finally, the overall power characterization exhibited high gain and high linearity, which illustrates that the power amplifier has a compact circuit size and exhibits favorable RF characteristics. This power circuit demonstrated high RF characterization and could be used for microwave power circuit applications at 5.2 GHz.     

PCS/W-CDMA dual-band MMIC power amplifier with a newly proposed linearizing bias circuit

A personal communications service/wide-band code division multiple access (PCS/W-CDMA) dual-band monolithic microwave integrated circuit (MMIC) power amplifier with a single-chip MMIC and a single-path output matching network is demonstrated by adopting a newly proposed on-chip linearizer. The linearizer is composed of the base-emitter diode of an active bias transistor and a capacitor to provide an RF short at the base node of the active bias transistor. The linearizer enhances the linearity of the power amplifier effectively for both PCS and W-CDMA bands with no additional DC power consumption, and has negligible insertion power loss with almost no increase in die area. It improves the input 1-dB gain compression point by 18.5 (20) dB and phase distortion by 6.1/spl deg/ (12.42/spl deg/) at an output power of 28 (28) dBm for the PCS (W-CDMA) band while keeping the base bias voltage of the power amplifier as designed. A PCS and W-CDMA dual-band InGaP heterojunction bipolar transistor MMIC power amplifier with single input and output and no switch for band selection is embodied by implementing the linearizer and by designing the amplifier to have broad-band characteristics. The dual-band power amplifier exhibits an output power of 30 (28.5) dBm, power-added efficiency of 39.5 % (36 %), and adjacent channel power ratio of -46 (-50) dBc at the output power of 28 (28) dBm under 3.4-V operation voltage for PCS (W-CDMA) applications.     

QoS guarantee and power distribution for soft handoff connections in cellular CDMA downlinks

A two-phase power distribution scheme for supporting quality-of-service (QoS) and best effort traffic is proposed. We first formulate the power distribution for QoS traffic as an optimization problem so that the number of simultaneously transmitting connections is maximized. Optimum power distribution is difficult to implement in practice due to both the computational complexity and the requirement for global information about the mobile station (MS) locations, connection channel conditions, and traffic load in the system. We then propose a heuristic scheme of power distribution for soft handoff (SHO) connections. The full scheme includes an initial power distribution (IPD) and a power distribution adjustment (PDA). IPD allocates BS power resource based on the channel condition of each individual connection, while PDA further coordinates the power distribution between neighboring base stations (BSs) in order to accommodate more connections. The proposed power distribution scheme can achieve a capacity close to that of the optimum power distribution, while providing much higher transmission throughput for best effort data traffic. The proposed power distribution scheme can be applied to existing SHO schemes for efficient BS power resource usage. The scheme does not require global information, and its implementation can be further simplified by performing IPD only with slight performance degradation.     

Joint power allocation and subcarrier pairing in OFDM-based cooperative relaying system

This paper proposes rate-maximized (MR) joint subcarrier pairing (SP) and power allocation (PA) (MR-SP&PA),a novel scheme for maximizing the weighted sum rate of the orthogonal-frequency-division multiplexing (OFDM) relaying system with a decode-and-forward (DF) relay.MR-SP&PA is based on the joint optimization of both SP and power allocation with total power constraint,and formulated as a mixed integer programming problem in the paper.The programming problem is then transformed to a convex optimization problem by using continuous relaxation,and solved in the Lagrangian dual domain.Simulation results show that MR-SP&PA can maximize the weighted sum rate under total power constraint and outperform equal power allocation (EPA) and proportion power allocation (PCG).     

指令cache体系结构级功耗控制策略研究

 随着工艺尺寸缩小及处理器频率提高,功耗问题已成为当代微处理器设计面临的主要挑战.传统的指令cache(I-Cache)功耗控制策略一般只单独降低指令cache的动态或者静态功耗.提出的两种改进的功耗控制策略,基于昏睡指令cache体系结构,能够更有效地同时降低指令cache的动态和静态功耗.一种称作"使用双预测端口路预测器的多路路预测策略",另一种称作"基于分阶段访问cache的按需唤醒预测策略",分别用于处理器前端流水线级数保持不变和可以增加额外前端流水线级数两种情形.实验结果表明:与传统的策略相比,提出的两种策略具有更优的能量效率,可以在不显著影响处理器性能的前提下,更有效地降低指令cache和处理器的功耗.     

基于快速傅立叶变换的在线电网谐波分析仪

在用电设备中广泛使用各种电力电子器件,往往会引起供电电网电压波形发生畸变,即谐波污染,会带来许多危害。在线电网谐波分析仪就是为了监测电力谐波污染而设计的。其整个设计过程采用模块化设计的思想。系统硬件主要包括电源模块,传感器前端电路模块,TMS320F2812数字信号处理器(DSP)主电路板模块。系统软件主要包括人机界面(HMI)程序模块,模数转换(ADC)程序模块,快速傅立叶变换(FFT)程序模块。     

Multiinput converter with power factor correction, maximum power point tracking, and ripple-free input currents

A multiinput converter for photovoltaic (PV) power system applications with power factor correction (PFC), maximum power point tracking (MPPT), and ripple-free input currents (RFIC) is proposed in this paper. With phase-shifted pulse-width-modulation (PWM) control, the multiinput converter can draw power from the utility line and PV arrays individually or simultaneously and deliver it to the load. In addition, an almost unity power factor for the utility line and an MPPT for PV arrays can also be achieved. Moreover, the upper power switches of each input-stage circuit in the proposed converter are operated with zero-current-switching (ZCS) at turn-off transition and the lower ones are operated with zero-voltage-switching (ZVS) at turn-on transition. Hence, the switching losses of the power switches can be reduced. Experimental measurements are demonstrated to verify the performance of the proposed multiinput converter.     

A 3-V monolithic SiGe HBT power amplifier for dual-mode (CDMA/AMPS)cellular handset applications

A dual-mode (CDMA/AMPS) power amplifier has been successfully implemented by using a monolithic SiGe/Si heterojunction bipolar transistor (HBT) foundry process for cellular handset (824-849 MHz) applications. The designed two-stage power amplifier satisfies both CDMA and AMPS requirements in output power, linearity, and efficiency. At V _cc=3 V,the power amplifier shows an excellent linearity (first ACPR<-44.1 dBc and second ACPR<-57.1 dBc) up to 28 dBm of output power for CDMA applications. Under the same bias condition, the power amplifier also meets AMPS handset requirements in output power (up to 31 dBm) and linearity (with second and third harmonic to fundamental ratios lower than -37 dBc and -55 dBc, respectively). At the maximum output power level, the worst power-added efficiencies (PAEs) are measured to be 36% for CDMA and 49% for AMPS operations. The power amplifier also tolerates severe output mismatch (VSWR>12:1) up to V _cc=4 V, with spurs measured to be <-22 dBc in CDMA outputs at two specific tuning angles, but with no spur in AMPS outputs at any tuning angle     

下一代移动通信LTE中功率放大器芯片设计

基于0.18μm SiGe BiCMOS工艺,设计了一种应用于下一代移动通信3GPP LTE TDD2.6 GHz频段(Band38)的射频功率放大器(PA)芯片。射频功率放大器采用共发射极3级级联的全差分结构,提高了输出电压摆幅,减小了功率晶体管的集电极电流,且降低了寄生的键合线电感。在预放大级和中间放大级、功率级中分别设计了电阻偏置和有源偏置两种偏置电路以提高线性度性能,并通过MOS开关管实现功率控制功能。测试结果表明:在2.57～2.62 GHz工作频段内,正向增益S21大于30.5 dB,输入回波损耗S11和输出回波损耗S22分别均小于-13 dB,功率增益大于31 dB,输出1 dB压缩点功率达28.6 dBm,功率附加效率为18%。     

一种带功率检测的TD-SCDMA锗硅功率放大器

设计了一个用于TD-SCDMA的锗硅异质结双极晶体管(SiGe HBT)功率放大器。该放大器使用3.3 V电源,内部实现了包括级间匹配网络等的全电路片上集成。对于码分多址环境,功率放大器提供28 dBm的功率输出,实现34.8%的功率附加效率(PAE),另外,在28 dBm的输出功率下,邻道功率泄漏比(ACPR)小于-35 dBc。该功率放大器同时包括动态控制偏置电路和完全集成的功率检测器。     

26 GHz高回退效率Doherty功率放大器

针对功率回退时主路功率放大器不能有效进入饱和状态导致Doherty功率放大器回退效率低的问题,通过降低主路功率放大器的供电电压,实现了高回退效率,同时增大辅路功放管的尺寸弥补了电路的总输出功率。基于0. 1μm GaAs pHMET工艺,设计了一个26 GHz两级非对称的Doherty功率放大器。仿真结果表明,在26 GHz时增益达到16 dB,功放的饱和输出功率为27. 4 dBm,峰值功率附加效率(PAE)为40. 7%,输出功率回退7 dB时PAE仍达到38%,与传统Doherty功率放大器相比具有更高的回退效率,版图的尺寸为3. 2 mm×2. 2 mm。     

高效率GaAs/InGaAsHFET功率放大器

研制成 Ga As/ In Ga As异质结功率 FET(HFET) ,该器件是在常规的高 -低 -高分布 Ga As MESFET的基础上 ,在有源层的尾部引入 i-In Ga As层。采用 HFET研制的两级 C波功率放大器 ,在 5 .0～ 5 .5 GHz带内 ,当Vds=5 .5 V时 ,输出功率大于 3 2 .3 1 d Bm(0 .1 77W/ mm ) ,功率增益大于 1 9.3 d B,功率附加效率 (PAE)大于3 8.7% ,PAE最大达到 49.4% ,该放大器在 Vds=9.0 V时 ,输出功率大于 3 6.65 d Bm(0 .48W/ mm) ,功率增益大于 2 1 .6d B,PAE典型值 3 5 %     

Effect of jammer power on the performance of adaptive arrays

The effect of jammer power on the performance of adaptive arrays is studied. It is shown that the output signal-to-interference-plus-noise ratio (SINR) of an adaptive array is a function of jammer power. In the presence of a wide-band jammer, the output SINR of the array decreases with an increase in jammer power and eventually goes to zero. Unlike continuous wave (CW) jammers, a wide-band jammer does not go through power inversion. Instead, as the jammer power is increased, the interference-to-noise ratio (INR) at the array output shows oscillations. For large jammer power, the output INR increases with an increase in jammer power.     

Application of the current-injected modeling approach toquasi-resonant converters

This paper describes how the current-injected (CI) method, which has been applied only to pulse-width modulation (PWM) DC-DC power converters, can be extended to quasi-resonant (QR) power converters. The methodology for extending this small-signal modeling approach is described in detail. It is also shown that QR dynamic models are easy to obtain since they are derived directly from PWM power converter models. These new models result in a unified block diagram from which zero-voltage-switching (ZVS) or zero-current-switching (ZCS) transfer functions of the basic topologies, such as buck, boost, and buck-boost operated in half-wave (HW) or full-wave (FW) modes, are found. As an application of this method, a ZVS boost power converter and ZCS boost power converter were fabricated and tested. In addition, small-signal models of these power converters were derived with the help of the state-space averaging (SSA) method. The agreement of the CI method simulations with the experimental results for the two QR power converters is comparable or better than that of the SSA method     

大功率测控装备交流用电特性分析

针对近年来大功率卫星测控通信装备(TT&C)在供配电环节出现的各种问题,首先,阐述供配电网、用电设备为保证电能质量需要遵守的相关标准,详细分析交流供电系统瞬时功率的波动特性;然后,以某型精密跟踪脉冲雷达为例,侧重分析大功率TT&C 装备交流电能的使用方式和特性,说明各类型交流电能使用方式及耐受供电电压跌落的能力,纠正TT&C 装备必须始终保持交流供电零中断不全面认识;最后,提出大型TT&C 装备电源分系统设计阶段的基本要求和TT&C 装备交付用户时需要向供电系统提交的技术性能参数,从而确保科学合理地设计供配电系统,实现TT&C 装备的安全可靠运行。     

Photovoltaic Power Conditioning System With Line Connection

A photovoltaic (PV) power conditioning system (PCS) with line connection is proposed. Using the power slope versus voltage of the PV array, the maximum power point tracking (MPPT) controller that produces a smooth transition to the maximum power point is proposed. The dc current of the PV array is estimated without using a dc current sensor. A current controller is suggested to provide power to the line with an almost-unity power factor that is derived using the feedback linearization concept. The disturbance of the line voltage is detected using a fast sensing technique. All control functions are implemented in software with a single-chip microcontroller. Experimental results obtained on a 2-kW prototype show high performance such as an almost-unity power factor, a power efficiency of 94%, and a total harmonic distortion (THD) of 3.6%.