共查询到20条相似文献,搜索用时 62 毫秒
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在双极电路生产中,总希望在正片上较为准确地测定外延层的电阻率.一般说来,三探针测试适用于N/N~+、P/P~+型结构的外延层的电阻率的测试;四探针适用于N/P型结构的外延层的电阻率测试.双极电路所使用的外延片,在外延之前已作有局部埋层,这就不能完好地满足三、四探针的测试条件,如果用三、四探针测试这类外延片的电阻率,总会产生不同程度的误差. 相似文献
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一、概述全自动四探针电阻率测试装置是为硅单晶电阻率标准量值传递而研制的,但也可以作为一般硅单晶片的电阻率测试用.该装置已于去年十月通过国家鉴定.以后又经过半年多的应用考察,取得了满意的结果.故作如下介绍,仅供参考. 相似文献
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用直排四探针方法测试硅抛光片的电阻率时 ,减少表面复合和增大测试电流故意引进注入使电阻率减少 ,根据电导率与少数载流子寿命成正指数增加的关系 ,求得少子寿命 相似文献
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用直排四探针方法测试硅抛光片的电阻率时,减少表面复合和增大测试电流故意引进注入使电阻率减少,根据电导率与少数载流子寿命成正指数增加的关系,求得少子寿命. 相似文献
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采用四探针与C-V两种测试仪器,对同一参数的外延片电阻率进行测试,测试结果表明,用四探测针试外延陪片和C-V测试处延片,测得的外延电阻率存在差异。分析造成差异的原因,得出了符合要求的校正系数。 相似文献
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IDDT Testing versus IDDQ Testing 总被引:6,自引:0,他引:6
IDDQ testing has progressed to become a worldwide accepted test method to detect CMOS IC defects. However, it is noticed that observing the average transient current can lead to improvements in real defect coverage, which is referred to IDDT testing. This letter presents a formal procedure to identify IDDT testable faults, and to generate input vector pairs to detect the faults based on Boolean process. It is interesting to note that those faults may not be detected by IDDQ or other test methods, which shows the significance of IDDT testing. 相似文献
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Julien Botella Jean-Philippe Delahaye Eddie Jaffuel Bruno Legeard Fabien Peureux 《Journal of Signal Processing Systems》2016,85(1):113-128
Time-to-market and implementation cost are high-priority considerations in the automation of digital hardware design. Nowadays, digital signal processing applications are implemented into fixed-point architectures due to its advantage of manipulating data with lower word-length. Thus, floating-point to fixed point conversion is mandatory. This conversion is translated into optimizing the integer word length and fractional word length. Optimizing the integer word-length can significantly reduce the cost when the application is tolerant to a low probability of overflow. In this paper, a new selective simulation technique to accelerate overflow effect analysis is introduced. A new integer word-length optimization algorithm that exploits this selective simulation technique is proposed to reduce both implementation cost and optimization time. The efficiency of our proposals is illustrated through experiments, where selective simulation technique allows accelerating the execution time of up to 1200 and 1000 when applied on Global Positioning System and on Fast Fourier Transform part (FFT) of Orthogonal Frequency Division Multiplexing chain respectively. Moreover, applying the optimization algorithm on the FFT part leads to a cost reduction between 17 to 22 % with respect to interval arithmetic and an acceleration factor of up to 617 with respect to classical max-1 algorithm. 相似文献
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AD转换器在数字测试仪上测试实现的探讨 总被引:2,自引:0,他引:2
近年来,出现越来越多的数模混合器件,或内部包含有模拟电路诸如AD转换器,DA转换器或滤波器的μCPU或ASIC数字器件。在纯数字测试系统上实现AD转换器的测试,对测试上述的包含一部分模拟电路的数字器件有十分重要的意义。本文以T3347A为例,介绍在纯数字测试系统上实现AD转换器的测试。 相似文献
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《Solid-State Circuits, IEEE Journal of》1979,14(3):609-613
The testability of microprocessors has become a very important question, especially for device manufacturers. Defining a set of worst case input vectors to exhaustively test still presents one of the major testing problems. This paper discusses a test strategy for microprocessors where the internal logic is separated into two types: data logic and control logic. This approach can be used to ease the definition of the test vectors A practical example is presented in the form of a test program for the SAB 8080 A microprocessor. The worst case functional pattern that was created lasts only 130 ms when run at 2.5 MHz. 相似文献
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电磁兼容测试结果与检测实验室可靠性程度直接相关,检测实验室自身质量是保证电磁兼容测试结果准确性先决条件,检测实验室测试系统相符性则成为电磁兼容系统性能评估中需要考虑的关键内容和重要指标。因此,检测实验室测试系统相符性比对是实现电磁兼容系统评估研究的基础工作之一。本文首先针对电磁兼容检测实验室测试系统相符性比对的特点,结合自己几年来的测试实践论述了电磁兼容检测实验室测试系统相符性对比方案,然后提出了具体的案例同时进行了详细的分析,最后总结出了影响电磁兼容检测实验室测试系统相符性因素,整个案例和分析过程及结果可作为电磁兼容检测实验室测试系统相符性比对的手段和依据,具有重要的现实指导意义。 相似文献
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传统上讲,符合性测试主要用于电信产业,而互操作性测试主要用于国际互联网络。这两种测试方法存在各自的优点和缺点,结合使用两种方法,能够使测试过程的效果达到最大化;同时还介绍了欧洲电信标准研究院(ETSI)的标准化活动。 相似文献
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Quasi-Random Testing 总被引:2,自引:0,他引:2
Our paper proposes an implementable procedure for using the method of quasi-random sequences in software debug testing. In random testing, the sequence of tests (if considered as points in an -dimensional unit hypercube) will give rise to regions where there are clusters of points, as well as underpopulated regions. Quasi-random sequences, also known as low-discrepancy or low-dispersion sequences, are sequences of points in such a hypercube that are spread more evenly throughout. Based on the observation that program faults tend to lead to contiguous failure regions within a program's input domain, and that an even spread of random tests enhances the failure detection effectiveness for certain failure patterns, we examine the use of quasi-random sequences as a replacement for random sequences in automated testing. Because there are only a small number of quasi-random sequence generation algorithms, and each of them can only generate a small number of distinct sequences, the applicability of quasi-random sequences in testing real programs is severely restricted. To alleviate this problem, we examine the use of two types of randomized quasi-random sequences, which are quasi-random sequences permuted in a nondeterministic fashion in such a way as to retain their low discrepancy properties. We show that testing using randomized quasi-random sequences is often significantly more effective than random testing. 相似文献