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1.
设计了一种新型无运放带隙基准源。该电路使用负反馈的方法,避免了运放的使用,从而消除了运放带隙基准电路中运放的失调电压对基准源精度的影响,同时还提升了电源抑制比,且降低了功耗。该新型电路比传统无运放带隙基准电路具有更高的精度和电源抑制比。该设计基于SMIC 0.35μm标准CMOS工艺在Candence Specture环境下进行仿真,电源电压采用3.3 V,温度范围为-55~125℃,电源抑制比为82 d B,功耗仅有0.06 m W。  相似文献   

2.
对带隙基准电压源的温度系数和功耗进行了分析研究,采用与绝对温度成正比(PTAT)的电流和与绝对温度互补(CTAT)的电流加权和技术,同时采用放大器工作在亚阈值区技术及运放失调补偿技术,基于0.4μm的CMOS工艺设计了一个低温度系数、低功耗的基准电压电路。通过电源电压、工作温度及工艺角对基准电压影响的仿真,结果表明该带隙基准源典型的温度系数为2×10~(-6)/℃,功耗为5.472μW,基准电压为1.32 V,电源抑制比为83.5 dB,实现了低温度系数、低功耗特性,且电路工作稳定。  相似文献   

3.
一种新型无运放CMOS带隙基准电路   总被引:1,自引:0,他引:1  
冯树  王永禄  张跃龙 《微电子学》2012,42(3):336-339
介绍了带隙基准原理和常规的带隙基准电路,设计了一种新型无运放带隙基准电路。该电路利用MOS电流镜和负反馈箝位技术,避免了运放的使用,从而消除了运放带隙基准电路中运放的失调电压和电源抑制比等对基准源精度的影响。该新型电路比传统无运放带隙基准电路具有更高的精度和电源抑制比。基于0.18μm标准CMOS工艺,在Cadence Spectre环境下仿真。采用2.5V电源电压,在-40℃~125℃温度范围的温度系数为6.73×10-6/℃,电源抑制比为54.8dB,功耗仅有0.25mW。  相似文献   

4.
《电子与封装》2017,(2):13-16
设计了一种工作在亚阈值区无运放结构的CMOS带隙基准电压电路。通过使用线性区工作的MOS管取代传统电阻,使电路工作在亚阈值区,结合无运放设计,极大地降低了功耗。采用0.35μm CMOS工艺,在室温27℃、工作电压3 V的条件下进行仿真,输出基准电压1.2086 V,偏差在4 m V内,工作电流仅为1.595μA,功耗仅为4.785μW。在-50℃到120℃的温度范围内温度系数为17.3×10-6/℃。该带隙基准电压电路具有低功耗、宽温度范围、面积小等特点。  相似文献   

5.
提出了一种新颖的可用于AC/DC控制芯片中的基准电压源电路。此电路以PTAT(proportional to absolutetemperature)电流为偏置电流,利用二极管连接的MOS晶体管迁移率和阈值电压的温度系数可相互补偿的特性,产生与温度无关的栅源电压。该电路结构简单,既无启动电路也无运放,避免了运放失调对基准源的影响,设计采用CSMC0.5μm BCD工艺。仿真结果表明,该基准电压源具有较低的温度系数和高电源电压抑制比,可作为AC/DC控制芯片中迟滞比较器的参考源。  相似文献   

6.
传统带隙基准源电路采用PNP型三极管来产生ΔVbe,此结构使运放输入失调电压直接影响输出电压的精度。文章在对传统CMOS带隙电压基准源电路原理的分析基础上,提出了一种综合了一阶温度补偿和双极型带隙基准电路结构优点的高性能带隙基准电压源。采用NPN型三极管产生ΔVbe,消除了运放失调电压影响。该电路结构简洁,电源抑制比高。整个电路采用SMIC 0.18μmCMOS工艺实现。通过Cadence模拟软件进行仿真,带隙基准的输出电压为1.24V,在-40℃~120℃温度范围内其温度系数为30×10-6/℃,电源抑制比(PSRR)为-88 dB,电压拉偏特性为31.2×10-6/V。  相似文献   

7.
从带隙基准原理出发,通过对传统的带隙基准电路中的反馈环路进行了改进,设计了一种带启动电路的带隙基准电压源。带隙基准电压源电路具有结构简单、功耗低、电压抑制比高以及温度系数低等特点。采用TSMC 0.13μm工艺对电路进行流片,管芯面积为100μm×94μm。测试结果显示,电源电压1V时,在-30~120℃范围内温度系数为6.6×10-6/℃,功耗仅1.8μW;电源电压从0.76V变化到2V,输出电压偏差仅1.52mV,电源抑制比达58dB。  相似文献   

8.
在分析常规带隙基准电路的基础上,设计了一种带曲率补偿可调节的带隙基准电压电路,并且具有良好的温度系数。电路设计和仿真工具使用Cadence的Spectre。采用SMIC标准0.25μmCMOS工艺。电路中包含的运放为两级放大电路,开环增益为85dB。带隙基准电压电路采用并联电阻的简单电路实现了有效的曲率补偿,在2.5V工作电压下,-25~125℃,TC=3.10ppm/℃,功耗为0.859mW。电路也可以在1.2V电压下工作,-25~125℃,TC=5.34ppm/℃,功耗为0.36mW。  相似文献   

9.
为了改善传统带隙基准中运放输入失调影响电压精度和无运放带隙基准电源抑制差的问题,设计了一款基于0.35μm BCD工艺的自偏置无运放带隙基准电路。提出的带隙基准源区别于传统运放箝位,通过负反馈网络输出稳定的基准电压,使其不再受运算放大器输入失调电压的影响;在负反馈环路与共源共栅电流镜的共同作用下,增强了输出基准的抗干扰能力,使得电源抑制能力得到了保证;同时采用指数曲率补偿技术,使得所设计的带隙基准源在宽电压范围内有良好的温度特性;且采用自偏置的方式,降低了静态电流。仿真结果表明,在5 V电源电压下,输出带隙基准电压为1.271 V,在-40~150℃工作温度范围内,温度系数为5.46×10-6/℃,电源抑制比为-87 dB@DC,静态电流仅为2.3μA。该设计尤其适用于低功耗电源管理芯片。  相似文献   

10.
在对传统带隙基准源基本原理分析的基础上,提出了一种适用于单片集成AC/DC变换器的带隙基准电路。该电路采用无运放的带隙结构, 避免了运放失调电压对基准源的影响。基于LITEON 1μm HV BiCMOS工艺,Hspice仿真结果表明,该基准源产生1.238V的基准电压,电源抑制比高达60dB,在-40℃-140℃温度范围内,基准电压仅变化3.9mV,温度系数为16.6×10^-6/℃, 完全满足AC/DC变换器对其性能的要求。  相似文献   

11.
Waveguide multilayer optical card (WMOC) is a novel storage device of three-dimensional optical information. An advanced readout system fitting for the WMOC is introduced in this paper. The hardware mainly consists of the light source for reading, WMOC, motorized stages addressing unit, microscope imaging unit, CCD detecting unit and PC controlling & processing unit. The movement of the precision motorized stage is controlled by the computer through Visual Basic (VB) language in software. A control panel is also designed to get the layer address and the page address through which the position of the motorized stages can be changed. The WMOC readout system is easy to manage and the readout result is directly displayed on computer monitor.  相似文献   

12.
IntroductionNanoimprint Lithography is a well-acknowl-edged low cost, high resolution, large area pattern-ing process. It includes the most promising methods,high-pressure hot embossing lithography (HEL) [2],UV-cured imprinting (UV-NIL) [3] and micro contactprinting (m-CP, MCP) [4]. Curing of the imprintedstructures is either done by subsequent UV-lightexposure in the case of UV-NIL or by cooling downbelow the glass transition temperature of the ther-moplastic material in case of HEL…  相似文献   

13.
The collinearly phase-matching condition of terahertz-wave generation via difference frequency mixed in GaAs and InP is theoretically studied. In collinear phase-matching, the optimum phase-matching wave hands of these two crystals are calculated. The optimum phase-matching wave bands in GaAs and lnP are 0.95-1.38μm and 0.7-0.96μm respectively. The influence of the wavelength choice of the pump wave on the coherent length in THz-wave tuning is also discussed. The influence of the temperature alteration on the phase-matching and the temperature tuning properties in GaAs crystal are calculated and analyzed. It can serve for the following experiments as a theoretical evidence and a reference as well.  相似文献   

14.
Composition dependence of bulk and surface phonon-polaritons in ternary mixed crystals are studied in the framework of the modified random-element-isodisplacement model and the Bom-Huang approximation. The numerical results for Several Ⅱ - Ⅵ and Ⅲ- Ⅴ compound systems are performed, and the polariton frequencies as functions of the compositions for ternary mixed crystals AlxGa1-xAs, GaPxAS1-x, ZnSxSe1-x, GaAsxSb1-x, GaxIn1-xP, and ZnxCd1-xS as examples are given and discussed. The results show that the dependence of the energies of two branches of bulk phonon-polaritons which have phonon-like characteristics, and surface phonon-polaritons on the compositions of ternary mixed crystals are nonlinear and different from those of the corresponding binary systems.  相似文献   

15.
A doping system consisting of NPB and PVK is employed as a composite hole transporting layer (CHTL). By adjusting the component ratio of the doping system, a series of devices with different concentration proportion of PVK : NPB are constracted. The result shows that doping concentration of NPB enhances the competence of hole transporting ability, and modifies the recombination region of charge as well as affects the surface morphology of doped film. Optimum device with a maximum brightness of 7852 cd/m^2 and a power efficiency of 1.75 lm/W has been obtained by choosing a concentration proportion of PVK : NPB at 1:3.  相似文献   

16.
An insert layer structure organic electroluminescent device(OLED) based on a new luminescent material (Zn(salen)) is fabricated. The configuration of the device is ITO/CuPc/NPD/Zn(salen)/Liq/LiF/A1/CuPc/NPD/Zn(salen)/Liq/LiF/A1. Effective insert electrode layers comprising LiF(1nm)/Al(5 nm) are used as a single semitransparent mirror, and bilayer cathode LiF(1 nm)/A1(100 nm) is used as a reflecting mirror. The two mirrors form a Fabry-Perot microcavity and two emissive units. The maximum brightness and luminous efficiency reach 674 cd/m^2 and 2.652 cd/A, respectively, which are 2.1 and 3.7 times higher than the conventional device, respectively. The superior brightness and luminous efficiency over conventional single-unit devices are attributed to microcavity effect.  相似文献   

17.
Due to variable symbol length of digital pulse interval modulation(DPIM), it is difficult to analyze the error performances of Turbo coded DPIM. To solve this problem, a fixed-length digital pulse interval modulation(FDPIM) method is provided. The FDPIM modulation structure is introduced. The packet error rates of uncoded FDPIM are analyzed and compared with that of DPIM. Bit error rates of Turbo coded FDPIM are simulated based on three kinds of analytical models under weak turbulence channel. The results show that packet error rate of uncoded FDPIM is inferior to that of uncoded DPIM. However, FDPIM is easy to be implemented and easy to be combined, with Turbo code for soft-decision because of its fixed length. Besides, the introduction of Turbo code in this modulation can decrease the average power about 10 dBm, which means that it can improve the error performance of the system effectively.  相似文献   

18.
It is a key problem to accurately calculate beam spots' center of measuring the warp by using a collimated laser. A new method, named double geometrical center method (DGCM), is put forward for the first time. In this method, a plane wave perpendicularly irradiates an aperture stop, and a charge couple device (CCD) is employed to receive the diffraction-beam spots, then the geometrical centers of the fast and the second diffraction-beam spots are calculated respectively, and their mean value is regarded as the center of datum beam. In face of such adverse instances as laser intension distributing defectively, part of the image being saturated, this method can still work well. What's more, this method can detect whether an unacceptable error exits in the courses of image receiving, processing and calculating. The experimental results indicate the precision of this method is high.  相似文献   

19.
DUV lithography, using the 248 nm wavelength, is a viable manufacturing option for devices with features at 130 nm and less. Given the low kl value of the lithography, integrated process development is a necessary method for achieving acceptable process latitude. The application of assist features for rule based OPC requires the simultaneous optimization of the mask, illumination optics and the resist.Described in this paper are the details involved in optimizing each of these aspects for line and space imaging.A reference pitch is first chosen to determine how the optics will be set. The ideal sigma setting is determined by a simple geometrically derived expression. The inner and outer machine settings are determined, in turn,with the simulation of a figure of merit. The maximum value of the response surface of this FOM occurs at the optimal sigma settings. Experimental confirmation of this is shown in the paper.Assist features are used to modify the aerial image of the more isolated images on the mask. The effect that the diffraction of the scattering bars (SBs) has on the image intensity distribution is explained. Rules for determining the size and placement of SBs are also given.Resist is optimized for use with off-axis illumination and assist features. A general explanation of the material' s effect is discussed along with the affect on the through-pitch bias. The paper culminates with the showing of the lithographic results from the fully optimized system.  相似文献   

20.
From its emergence in the late 1980s as a lower cost alternative to early EEPROM technologies, flash memory has evolved to higher densities and speedsand rapidly growing acceptance in mobile applications.In the process, flash memory devices have placed increased test requirements on manufacturers. Today, as flash device test grows in importance in China, manufacturers face growing pressure for reduced cost-oftest, increased throughput and greater return on investment for test equipment. At the same time, the move to integrated flash packages for contactless smart card applications adds a significant further challenge to manufacturers seeking rapid, low-cost test.  相似文献   

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