LGA焊点形态对焊点寿命影响的有限元分析

通过Surface Evolver软件对LGA焊点进行了三维形态预测,利用有限元数值模拟对LGA焊点在热循环条件下寿命进行了分析。研究了热循环条件下LGA焊点的应力应变分布规律,随着焊点远离元件的中心位置焊点所受到的等效应力、等效应变和塑性应变能密度逐渐增大,从而得出处于外面拐角的焊点最先发生失效的结论。基于塑性应变范围和Coffin-Manson公式计算了焊点热疲劳寿命;找出了LGA焊点形态对焊点寿命的影响规律,模板厚度一定时PCB焊盘尺寸小于上焊盘时LGA焊点的热疲劳寿命与PCB焊盘尺寸成正比,大于上焊盘时成反比,大约相等时焊点寿命最大。当PCB焊盘和模板开孔尺寸固定时,通过增大模板厚度来增加焊料体积在一定程度上可提高LGA焊点的热疲劳寿命,但是模板厚度增大到一定值时LGA焊点寿命会逐渐降低。     

BGA焊点的形态预测及可靠性优化设计

制定了BGA(球栅阵列)焊点的形态预测以及可靠性分析优化设计方案，对完全分布和四边分布的两种BGA元件，通过改变下焊盘的尺寸得到不同钎料量的焊点，并对其形态进行了预测，建立了可靠性分析的三维力学模型。采用有限元方法分析了元件和焊点在热循环条件下的应力应变分布特征，预测了不同种类和不同形态的BGA焊点的热疲劳寿命，由此给出了最佳的上下焊盘比例范围。     

CSP封装Sn-3.5Ag焊点的热疲劳寿命预测

对芯片尺寸封装(CSP)中Sn-3.5Ag无铅焊点在热循环加速载荷下的热疲劳寿命进行了预测.首先利用ANSYS软件建立CSP封装的三维有限元对称模型,运用Anand本构模型描述Sn-3.5Ag无铅焊点的粘塑性材料特性;通过有限元模拟的方法分析了封装结构在热循环载荷下的变形及焊点的应力应变行为,并结合Darveaux疲劳寿命模型预测了无铅焊点的热疲劳寿命.     

CSP封装Sn-3.5Ag焊点的热疲劳寿命预测

对芯片尺寸封装(CSP)中Sn-3.5Ag无铅焊点在热循环加速载荷下的热疲劳寿命进行了预测.首先利用ANSYS软件建立CSP封装的三维有限元对称模型,运用Anand本构模型描述Sn-3.5Ag无铅焊点的粘塑性材料特性;通过有限元模拟的方法分析了封装结构在热循环载荷下的变形及焊点的应力应变行为,并结合Darveaux疲劳寿命模型预测了无铅焊点的热疲劳寿命.     

片式元件焊点的热循环应力应变模拟技术研究

采用ANSYS软件,以0402片式元件焊点为对象,系统探讨了焊点热应变损伤的有限元仿真方法,分析了焊点在热循环过程中的应力应变响应,并基于修正的Coffin-Manson方程,预测了焊点的热疲劳寿命。结果显示:焊点应力集中区域和应变最大区域均位于焊点与PCB焊盘的交界面,基于应变失效原则,推断焊点裂纹将在此界面萌生和扩展,直至失效。指出了焊点有限元热应变损伤模拟技术的不足及未来的研究方向。     

面向智能电表的贴片电容焊盘尺寸设计

随着智能电表的广泛应用,小型化印制电路板组件(PCBA)的应用需求日益增大,希望在保证组件小尺寸和更高可靠性的同时保证高生产效率。本文基于电子组装行业标准设计了1210表面贴装电容的两种焊盘尺寸,并采用剪切强度试验和有限元仿真分析进行了焊接结构强度和热疲劳寿命对比分析。剪切强度测试结果表明电容本体为其焊接结构的力学薄弱环节,参考IPC7351标准设计的焊盘尺寸的焊接结构强度更优;基于修正的Coffin-Manson模型对焊点的热疲劳寿命进行预测,发现参考IPC7351标准设计的焊盘尺寸模型中焊点寿命略低。本研究结果可以为实现印制电路板组件(PCBA)的智能制造提供焊盘设计技术支撑。     

片式元件与基板间隙对无铅焊点可靠性的影响

采用非线性有限元方法,讨论了片式元件与基板的间隙对Sn-2.5Ag-0.7Cu无铅钎料焊点的应力分布和热疲劳寿命的影响。结果表明,当间隙高度为0.1~0.2mm时,焊点薄弱处——元件底部拐角处、焊根的顶部和底部以及焊趾顶部具有较低的应力,此时预测得到焊点的热疲劳寿命也最长。这一结果对于焊点几何形态的设计及优化具有指导意义。     

微连接焊点热循环可靠性的研究进展

介绍了国内外关于微连接焊点热循环可靠性的研究进展。热循环的作用会使焊点内部组织粗化、IMC长大和变厚和锡基无铅焊料重结晶等,诱发焊点中裂纹的萌生与扩展。主流观点认为,焊点的失效是一种疲劳与蠕变相结合的机制。分析了对未来无机械应力作用的单一焊点样品进行热循环实验的意义。影响焊点热循环寿命的因素有焊料成分、焊盘UBM层、焊...     

无铅PBGA组装的有限元分析与寿命预测

本文采用粘塑性hyperbolic-sine本构方程描述了Sn95．5Ag3．8Cu0．7焊料的材料模式。使用通用有限元软件模拟了PBGA（Plastic Ball Grid Array）封装器件焊球阵列在-55℃-125℃热循环作用下应力应变的分布。并采用修正后的热疲劳寿命预测coffin—Masson公式分析预测了该焊料焊点的热疲劳寿命。     

随机振动加载条件下QFN焊点的优化设计

采用基于最小能量原理和有限元数值分析方法的Surface Evolver软件，建立了四方扁平无引脚器件（QFN：Quad Flat No-lead）焊点三维形态预测模型；选取焊盘长度、焊盘宽度、焊料体积和间隙高度作为四个关键因素，采用水平正交表设计了9种不同的QFN焊点工艺参数水平组合，建立了这9种焊点的三维形态预测模型，得到了不同工艺参数水平组合下的QFN焊点形态；分析在随机振动加载条件下，焊盘长度、焊盘宽度、焊料体积和间隙高度四个工艺参数的改变对QFN焊点的应力应变的影响；通过对因子趋势图分析表明：在随机振动加栽下焊盘长度和焊盘宽度对焊点应力应变影响较大，间隙高度和焊料体积对应力应变影响较小；使QFN焊点应变值最小的参数细合为：焊盘长度为0．8mm；焊盘宽度为0．37mm；间隙高度为0．15mm；焊料体积为0.014mm^3。     

Comprehensive board-level solder joint reliability modeling and testing of QFN and PowerQFN packages

For quad flat non-lead (QFN) packages, board-level solder joint reliability during thermal cycling test is a critical issue. In this paper, a parametric 3D FEA sliced model is established for QFN on board with considerations of detailed pad design, realistic shape of solder joint and solder fillet, and non-linear material properties. It has the capability to predict the fatigue life of solder joint during thermal cycling test within ±34% error. The fatigue model applied is based on a modified Darveaux’s approach with non-linear viscoplastic analysis of solder joints. A solder joint damage model is used to establish a connection between the strain energy density (SED) per cycle obtained from the FEA model and the actual characteristic life during thermal cycling test. For the test vehicles studied, the maximum SED is observed mostly at the top corner of peripheral solder joint. The modeling predicted fatigue life is first correlated to thermal cycling test results using modified correlation constants, curve-fitted from in-house QFN thermal cycling test data. Subsequently, design analysis is performed to study the effects of 17 key package dimensions, material properties, and thermal cycling test condition. Generally, smaller package size, smaller die size, bigger pad size, thinner PCB, higher mold compound CTE, higher solder standoff, and extra soldering at the center pad help to enhance the fatigue life. Comparisons are made with thermal cycling test results to confirm the relative trends of certain effects. Another enhanced QFN design with better solder joint reliability, PowerQFN, is also studied and compared with QFN of the same package size.     

Reliability Analysis of Lead-Free Solder Castellations

In this paper, the reliability of lead-free solder castellations is considered. The newly developed stress-dependent Engelmaier's solder fatigue model is utilized in this task. Based on this model, it is possible to interpret the thermal cycling test results. A very good agreement between the test results and the lifetime predictions is obtained. Using the lifetime prediction model, optimal solder castellation shape is investigated. Based on the findings, the fatigue life can be improved by up to 30% simply by solder pad length optimization. Further increment in lifetime length can be expected if the solder joint shape is optimized with the help of modeling tools presented here. Understanding how the crack propagates in solder material is vital if optimal lifetime behavior is expected.     

Board level solder joint reliability analysis of stacked die mixed flip-chip and wirebond BGA

Stacked die BGA has recently gained popularity in telecommunication applications. However, its board level solder joint reliability during the thermal cycling test is not as well-studied as common single die BGA. In this paper, solder joint fatigue of lead-free stacked die BGA with mixed flip-chip (FC) and wirebond (WB) interconnect is analyzed in detail. 3D fatigue model is established for stacked die BGA with considerations of detailed pad design, realistic shape of solder ball, and non-linear material properties. The fatigue model applied is based on a modified Darveaux’s approach with non-linear viscoplastic analysis of solder joints. Based on the FC–WB stack die configuration, the critical solder ball is observed located between the top and bottom dice corner, and failure interface is along the top solder/pad interface. The modeling predicted fatigue life is first correlated to the thermal cycling test results using modified correlation constants, curve-fitted from in-house lead-free TFBGA46 (thin-profile fine-pitch BGA) thermal cycling test data. Subsequently, design analyzes are performed to study the effects of 20 key design variations in package dimensions, material properties, and thermal cycling test conditions. In general, thinner PCB and mold compound, thicker substrate, larger top or bottom dice sizes, thicker top die, higher solder ball standoff, larger solder mask opening, smaller PCB pad size, smaller thermal cycling temperature range, longer ramp time, and shorter dwell time contribute to longer fatigue life. SnAgCu is a common lead-free solder, and it has much better board level reliability performance than eutectic solder based on modeling results, especially low stress packages.     

Board level solder joint reliability analysis and optimization of pyramidal stacked die BGA packages

Due to requirements of cost-saving and miniaturization, stacked die BGA has recently gained popularity in many applications. However, its board level solder joint reliability during the thermal cycling test is not as well-studied as common single die BGA. In this paper, solder joint fatigue of wirebond stacked die BGA is analyzed in detail. 3D fatigue model is established for stacked die BGA with considerations of detailed pad design, realistic shape of solder ball, and non-linear material properties. The fatigue model applied is based on a modified Darveaux's approach with non-linear viscoplastic analysis of solder joints. The critical solder ball is observed located between the top and bottom dice corner, and failure interface is along the top solder/pad interface. The modeling predicted fatigue life is first correlated to the thermal cycling test results using modified correlation constants, curve-fitted from in-house TFBGA (thin-profile fine-pitch BGA) thermal cycling test data. Subsequently, design analyses are performed to study the effects of 16 key design variations in package dimensions, material properties, and thermal cycling test conditions. In general, smaller top and bottom dice sizes, thicker top or bottom die, thinner PCB, thicker substrate, higher solder ball standoff, larger solder mask opening size, smaller maximum ball diameter, smaller PCB pad size, smaller thermal cycling temperature range, longer ramp time, and shorter dwell time contribute to longer fatigue life. The effect of number of layers of stacked-die is also investigated. Finally, design optimization is performed based on selected critical design variables.     

Board level solder joint reliability modeling and testing of TFBGA packages for telecommunication applications

For thin-profile fine-pitch BGA (TFBGA) packages, board level solder joint reliability during the thermal cycling test is a critical issue. In this paper, both global and local parametric 3D FEA fatigue models are established for TFBGA on board with considerations of detailed pad design, realistic shape of solder joint, and nonlinear material properties. They have the capability to predict the fatigue life of solder joint during the thermal cycling test within ±13% error. The fatigue model applied is based on a modified Darveaux’s approach with nonlinear viscoplastic analysis of solder joints. A solder joint damage model is used to establish a connection between the strain energy density (SED) per cycle obtained from the FEA model and the actual characteristic life during the thermal cycling test. For the test vehicles studied, the maximum SED is observed at the top corner of outermost diagonal solder ball. The modeling predicted fatigue life is first correlated to the thermal cycling test results using modified correlation constants, curve-fitted from in-house BGA thermal cycling test data. Subsequently, design analysis is performed to study the effects of 14 key package dimensions, material properties, and thermal cycling test condition. In general, smaller die size, higher solder ball standoff, smaller maximum solder ball diameter, bigger solder mask opening, thinner board, higher mold compound CTE, smaller thermal cycling temperature range, and depopulated array type of ball layout pattern contribute to longer fatigue life.     

Thermal lifetime estimation method of IGBT module considering solder fatigue damage feedback loop

The accurate thermal damage assessment and lifetime estimation are essential for ensuring the safety and reliability of semiconductor power devices. This study presents a thermal fatigue feedback loop method for evaluating the lifetime of an Insulated Gate Bipolar Transistor (IGBT) module considering the accumulated effect of solder layer fatigue. First, a three-dimension (3D) finite element method (FEM) model for an IGBT module is established and, combined with the accelerated aging experiments resulting in that the accumulated thermal resistance increment could not be neglected when conducting thermal network modeling and lifetime consumption assessment. Then, the Cauer thermal network is improved for establishing the fatigue feedback loop model, which takes the influence of accumulated solder layer fatigue into account when estimating the power module lifetime. The effectively of this method is validated by experimental results and resisting models. Finally, the lifetime consumption of the IGBT module utilized in a practical wind energy conversion system, is investigated by using the multi-scale feedback loop method. It is found that the Miner model would exaggerate the lifetime of power modules and, the lifetime consumption under low frequency thermal loading is faster than that under a fundamental frequency condition.     

Effects of solder joint shape and height on thermal fatigue lifetime

Solder joint thermal fatigue failure is a major concern for area array technologies such as flip chip and ball grid array technologies. Solder joint geometry is an important factor influencing thermal fatigue lifetime. In this paper, the effects of solder joint shape and height on thermal fatigue lifetime are studied. Solder joint fatigue lifetime was evaluated using accelerated temperate cycling and adhesion test. Scanning electron microscopy (SEM), energy dispersive x-ray analysis (EDX), scanning acoustic microscopy (nondestructive evaluation) and optical microscopy were utilized to examine the integrity of the joint and to detect cracks and other defects before and during accelerated fatigue tests. Our accelerated temperature cycling test clearly shows that solder joint fatigue failure process consists of three phases: crack initiation, crack propagation and catastrophic failure. Experimental results indicated that both hourglass shape and great standoff height could improve solder joint fatigue lifetime, with standoff height being the more effective factor. Experimental data suggested that shape is the dominant factor affecting crack initiation time while standoff height is the major factor influencing crack propagation time.     

Fatigue life evaluation of wire bonds in LED packages using numerical analysis

Reliability of LED packages is evaluated using several tests. When a thermal shock test, which is one of the reliability tests, is conducted, the most common failure mode is wire neck breakage. In order to evaluate the wire bonding reliability of LED packages, performing the thermal shock test is time-consuming. In this paper the wire bonding reliability for LED packages is evaluated by using numerical analysis. A wire bonding lifetime model for the thermal shock test was developed, which is based on Coffin-Manson fatigue law. The model was calibrated from fatigue data of thermal shock tests and volume averaging accumulated plastic strains. The accumulated plastic strains were calculated by using finite element analysis corresponding to the test conditions. The test conditions were changed by silicones, package sizes, wire bonding diameters, heights, and lengths. The calibrated model was used to estimate the number cycle to failure so that the wire bonding reliability for the thermal shock test was evaluated by performing the numerical analysis. Furthermore, we used a response surface methodology to study the relationship between the wire loop and the accumulated plastic strain to determine the optimal wire loop. The plastic strain was a function of diameter, height and length. At the optimal point, the number of cycle to failure for the thermal shock test was suggested using the wire bonding lifetime model.     

Impact of solder pad size on solder joint reliability in flip chipPBGA packages

A variety of parameters impact package reliability. One set of parameters that does not get much attention is the variations in package design that are assembly and vendor related. This study shows that solder pad size is important in solder joint reliability. Differences in solder pad size due to different vendors and processes can affect the reliability considerably. The impact of substrate thickness on package reliability has been shown in finite element stress analysis, moire interferometry experiments, and reliability tests. However, in certain cases, the pad size effect can be so significant that it overrides the impact of substrate thickness. This work indicates that in order to obtain good correlation between predictive engineering results and reliability tests data, this factor should not be ignored. In this study, finite element simulation has been used to quantify the pad size effect on the BGA reliability in the PBGA package. Air-to-air thermal cycling test results were compared with FEM predictions. Optimized pad sizes are discussed and the impact on the solder joint reliability is predicted. Solder pad size effect was found to be a dominant feature in correlating test data with predictions