石墨烯的SiC外延生长及应用

碳化硅外延生长法是近几年重新发展起来的一种制备石墨烯的方法,具有产物质量高、生长面积大等优点,逐渐成为了制备高质量石墨烯的主要方法之一。另外,从石墨烯在集成电路方面的应用前景来看,该方法最富发展潜力。从SiC不同极性面石墨烯的生长过程、缓冲层的影响及消除方法等方面评述了碳化硅外延法制备的特点并对其研究进展进行了介绍。最后简要概述了国内外关于SiC外延石墨烯在场效应晶体管方面的应用情况,指出了目前需要解决的主要技术问题,并对其发展前景进行了展望。     

WSe2场效应晶体管的源漏接触特性研究

二硒化钨(WSe2)具有双极导电特性,可以通过外界掺杂或改变源漏金属来调节载流子传输类型,是一类特殊的二维纳米材料,有望在未来集成电路中成为硅(Si)的替代材料.文章采用理论与实验相结合的方式系统分析了 WSe2场效应晶体管中的源漏接触特性对器件导电类型及载流子传输特性的影响,通过制备不同金属作为源漏接触电极的WSe2场效应晶体管,发现金属/WSe2接触的实际肖特基接触势垒高低极大地影响了晶体管的开态电流.源漏金属/WSe2接触特性不仅取决于接触前理想的费米能级差,还受到界面特性,特别是费米能级钉扎效应的影响.     

基于MATLAB的石墨烯场效应晶体管电学特性研究

石墨烯场效应晶体管的结构参数是对晶体管电学特性有重要影响。利用MATLAB软件平台仿真研究了石墨烯场效应晶体管势垒层厚度、栅极长度、平面掺杂浓度、温度等结构参数对晶体管结构电学特性的影响规律,并根据研究选择最佳的结构参数,为石墨烯场效应晶体管加工工艺提供依据。     

腐蚀溶液对石墨烯转移质量和GFET性能的影响

对比分析了过硫酸铵(APS)与三氯化铁(FeCl3)两种腐蚀溶液对转移后石墨烯质量的影响.结果表明,采用FeCl3腐蚀溶液转移后的石墨烯表面会引入Fe和Cl离子,而APS腐蚀溶液转移后的石墨烯表面基本未引入杂质.将两种转移到SiO2/Si基底上的石墨烯样品蒸镀100 nm厚的金的源漏电极后分别制成了石墨烯场效应晶体管(GFET),并在室温下对其进行了电学性能测试.测试结果表明,相对于FeCl3腐蚀溶液转移的石墨烯样品制成的器件,采用APS腐蚀溶液转移的石墨烯样品制成器件的狄拉克点从75 V左右降低到了0V左右,载流子迁移率从823 cm2/(V·s)提升到了1 324 cm2/(V·s).因此,采用APS腐蚀溶液转移石墨烯引入杂质更少,制备的器件性能更优越.     

碳化硅衬底外延石墨烯

通过高温热解法和化学气相沉积(CVD)法在SiC(0001)衬底外延石墨烯。采用光学显微镜、原子力显微镜、扫描电子显微镜、喇曼光谱、X射线光电子能谱和霍尔测试系统对样品进行表征,并对比了两种不同生长方法对石墨烯材料的影响以及不同的成核机理。结果表明,高温热解法制备的石墨烯材料有明显的台阶形貌,台阶区域平坦均匀,褶皱少,晶体质量取决于SiC衬底表面原子层,电学特性受衬底影响大,迁移率较低。CVD法制备的石墨烯材料整体均匀,褶皱较多,晶体质量更好。该方法制备的石墨烯薄膜悬浮在SiC衬底表面,与衬底之间为范德华力连接,电学特性受衬底影响小,迁移率较高。     

Co/a-GeSi/Ti/Si多层薄膜固相反应外延生长CoSi_2薄膜

研究了在 Co/Ti/Si结构中加入非晶 Ge Si层对 Co Si2 /Si异质固相外延的影响 ,用离子束溅射方法在Si衬底上制备 Co/Ge Si/Ti/Si结构多层薄膜 ,通过快速热退火使多层薄膜发生固相反应。采用四探针电阻仪、AES、XRD、RBS等方法进行测试。实验表明 ,利用 Co/Ge Si/Ti/Si固相反应形成的 Co Si2 薄膜具有良好的外延特性和电学特性 ,Ti中间层和非晶 Ge Si中间层具有促进和改善 Co Si2 外延质量 ,减少衬底耗硅量的作用。Ge原子的存在能够改善外延 Co Si2 薄膜的晶格失配率     

银掺杂对MoS_2薄膜特性的影响

二硫化钼(MoS2)是一种具有类似石墨烯结构和性能的新型二维层状化合物,近年来因其独特的物理化学特性而成为研究热点。采用化学气相沉积法(CVD),以掺杂银的MoS2饱和溶液为原料,氩气为输运气体,在p-Si衬底上制备MoS2薄膜,并研究了银掺杂对MoS2薄膜的表面形貌、晶体结构、光吸收特性以及电学特性的影响。研究发现,银掺杂并未改变MoS2薄膜的晶体结构,而使MoS2薄膜的结晶度更好;银掺杂的MoS2薄膜反射率降低,光吸收增强,进而可以提高器件的光电转换效率。另外,银掺杂的MoS2薄膜表面更均匀平整,同时具有更良好的电学特性,其电子迁移率高达1.154×104 cm2·V-1·s-1,可用于制造一些晶体管和集成电路等半导体器件。     

石墨烯基电子学研究进展

综述了石墨烯晶体的能带结构和独特的电子性质,如双极性电场效应、单双层石墨烯效应、衬底效应、石墨烯纳米带(GNR)带隙等特殊效应的研究现状。介绍了石墨剥落技术、外延生长和化学气相淀积(CVD)等石墨烯材料的制备以及表征方法。列举了石墨烯在电子、显示、太阳电池、传感器和氢存储等方面的应用,如在石墨烯场效应管、石墨烯纳米带场效应管(SET)、石墨烯单电子晶体管、石墨烯金属晶体管、石墨烯基纳米电子机械系统(NEMS)、石墨烯分子开关以及石墨烯基高电子迁移率晶体管(HEMT)制备方面的应用。人们已经研究出不同栅长的n/p型顶栅石墨烯场效应管(GFET),并采用标准的S参数直接表征器件的高频性能。理论和实验表明,所有石墨烯纳米带场效应管(GNRFET)在室温下工作的前提是GNR的带宽尺寸小于10nm,并具有半导体场效应管的性能。     

无坑洞n-3C-SiC/p-Si(100)的LPCVD外延生长及其异质结构特性

在MBE/CVD高真空系统上,利用低压化学气相淀积( L PCVD)方法在直径为5 0 mm的单晶Si( 10 0 )衬底上生长出了高取向无坑洞的晶态立方相碳化硅( 3 C- Si C)外延材料,利用反射高能电子衍射( RHEED)和扫描电镜( SEM)技术详细研究了Si衬底的碳化过程和碳化层的表面形貌,获得了制备无坑洞3 C- Si C/Si的优化碳化条件,采用霍尔( Hall)测试等技术研究了外延材料的电学特性,研究了n- 3 C- Si C/p- Si异质结的I- V、C- V特性及I- V特性对温度的依赖关系.室温下n- 3 C- Si C/p- Si异质结二极管的最大反向击穿电压达到2 2 0 V,该n- 3 C- Si C/p- Si异质结构可用于制     

石墨烯场效应晶体管研究进展

制备场效应晶体管的石墨烯主要分三种类型:大面积单层石墨烯、石墨烯纳米带和双层石墨烯片。文中介绍了这三类石墨烯场效应晶体管器件的研究进展和标志性成果,探讨了石墨烯对于场效应晶体管的影响。研究认为:与大面积单层石墨烯晶体管相比,由石墨烯纳米带制得的石墨烯场效应晶体管的开关比和电流密度等性能能够大幅度提升,可应用于逻辑电路;与大面积单层石墨烯和石墨烯纳米带相比,双层石墨烯晶体管具有更高的开关比,因此其实际应用的潜力最大。     

6英寸硅基GaN HEMT外延材料的制备

采用金属有机物化学气相沉积(MOCVD)方法,在6英寸(1英寸=2.54 cm)Si(111)衬底上,使用多层不同Al摩尔组分的AlGaN插入层技术,成功生长出厚度为2.9 μm无裂纹(扣除边缘2mm)的GaN外延层,解决了大尺寸外延片的翘曲度问题,并在此基础上生长了全结构的高电子迁移率晶体管(HEMT)外延片.采用X射线双晶衍射对外延材料结构进行了表征.Hall测试结果表明,HEMT外延材料的迁移率为2 080 cm2/(V·s),方块电阻为279.8 Ω/□,电荷面密度为1.07×1013 cm-2.采用喇曼光谱仪对GaN的应力进行了表征,GaN的喇曼E2(h)峰位于567.02 cm-1,表面受到的张应力为0.170 6 GPa,由于GaN外延层受到的张应力很小,说明插入多层AlGaN后应力已经释放.汞探针C-V测试二维电子气浓度较Hall测试结果偏低,可能是在C-V测试时肖特基势垒接触会降低载流子浓度.     

Si(100)衬底上高质量3C-SiC的改良外延生长

介绍了新近研制出的一种电阻加热式CVD/LPCVD SiC专用制备系统,并利用该系统以SiH4、C2H4和H2作为反应气体在直径为50mm的Si(100)衬底上获得了高质量的3C-SiC外延材料.用X射线衍射和Raman散射技术研究了3C-SiC外延膜的结晶质量,在80～300K的温度范围内利用Van der Pauw方法对1～3μm厚的外延膜的电学特性进行了测试,室温Hall迁移率最高达到470cm2/(V*s),载流子浓度为7.7×1017cm-3.     

Si(100)衬底上高质量3C-SiC的改良外延生长

介绍了新近研制出的一种电阻加热式CVD/LPCVD SiC专用制备系统,并利用该系统以SiH4、C2H4和H2作为反应气体在直径为50mm的Si(100)衬底上获得了高质量的3C-SiC外延材料.用X射线衍射和Raman散射技术研究了3C-SiC外延膜的结晶质量,在80～300K的温度范围内利用Van der Pauw方法对1～3μm厚的外延膜的电学特性进行了测试,室温Hall迁移率最高达到470cm2/(V*s),载流子浓度为7.7×1017cm-3.     

Isolation of silicon film grown on porous silicon layer

We have investigated a new technology for dielectric isolation of a Si film grown epitaxially on a porous silicon layer. After oxidation of the porous silicon layer, a Si on Ohcidized Porous Silicon(SOPS) structure can be obtained. It is proposed that micropores pinch off quickly in the interfacial region between the porous silicon layer and the epitaxial film. A minimum yield calculated from Rutherford backscattering spectra of the epitaxial silicon film is 5.3%, and an electron Hall mobility of 600cm²/V.s is obtained in the film with a carrier concentration of 1 x 10¹⁷ /cm³. MOSFETs were fabricated on the SOPS structure.     

Perspective:optically-pumped Ⅲ–Ⅴ quantum dot microcavity lasers via CMOS compatible patterned Si (001) substrates

Direct epitaxial growthⅢ–Ⅴquantum dot(QD)structures on CMOS-compatible silicon substrates is considered as one of the most promising approaches to achieve low-cost and high-yield Si-based lasers for silicon photonic integration.However,epitaxial growth ofⅢ–Ⅴmaterials on Si encounters the following three major challenges:high density of threading dislocations,antiphase boundaries and thermal cracks,which significantly degrade the crystal quality and potential device performance.In this review,we will focus on some recent results related to InAs/GaAs quantum dot lasers on Si(001)substrates byⅢ–Ⅴ/Ⅳhybrid epitaxial growth via(111)-faceted Si hollow structures.Moreover,by using the step-graded epitaxial growth process the emission wavelength of InAs QDs can be extended from O-band to C/L-band.High-performance InAs/GaAs QD microdisk lasers with sub-milliwatts threshold on Si(001)substrates are fabricated and characterized.The above results pave a promising path towards the on-chip lasers for optical interconnect applications.     

High‐Density Carrier Accumulation in ZnO Field‐Effect Transistors Gated by Electric Double Layers of Ionic Liquids

Very recently, electric‐field‐induced superconductivity in an insulator was realized by tuning charge carrier to a high density level (1 × 10¹⁴ cm^?2). To increase the maximum attainable carrier density for electrostatic tuning of electronic states in semiconductor field‐effect transistors is a hot issue but a big challenge. Here, ultrahigh density carrier accumulation is reported, in particular at low temperature, in a ZnO field‐effect transistor gated by electric double layers of ionic liquid (IL). This transistor, called an electric double layer transistor (EDLT), is found to exhibit very high transconductance and an ultrahigh carrier density in a fast, reversible, and reproducible manner. The room temperature capacitance of EDLTs is found to be as large as 34 µF cm^?2, deduced from Hall‐effect measurements, and is mainly responsible for the carrier density modulation in a very wide range. Importantly, the IL dielectric, with a supercooling property, is found to have charge‐accumulation capability even at low temperatures, reaching an ultrahigh carrier density of 8×10¹⁴ cm^?2 at 220 K and maintaining a density of 5.5×10¹⁴ cm^?2 at 1.8 K. This high carrier density of EDLTs is of great importance not only in practical device applications but also in fundamental research; for example, in the search for novel electronic phenomena, such as superconductivity, in oxide systems.     

Realization of Quantum Hall Effect in Chemically Synthesized InSe

Recently, 2D electron gases have been observed in atomically thin semiconducting crystals, enabling the observation of rich physical phenomena at the quantum level within the ultimate thickness limit. However, the observation of 2D electron gases and subsequent quantum Hall effect require exceptionally high crystalline quality, rendering mechanical exfoliation as the only method to produce high‐quality 2D semiconductors of black phosphorus and indium selenide (InSe), which hinder large‐scale device applications. Here, the controlled one‐step synthesis of high‐quality 2D InSe thin films via chemical vapor transport method is reported. The carrier Hall mobility of hexagonal boron nitride (hBN) encapsulated InSe flakes can be up to 5000 cm² V^?1 s^?1 at 1.5 K, enabling to observe the quantum Hall effect in a synthesized van der Waals semiconductor. The existence of the quantum Hall effect in directly synthesized 2D semiconductors indicates a high quality of the chemically synthesized 2D semiconductors, which hold promise in quantum devices and applications with high mobility.     

Current controlled liquid phase epitaxial (CCLPE) growth of InGaAs on (100) InP

High quality epitaxial layers of In_xGa_1−xAs (x = 0.53) were grown on semi-insulating (Fe-doped) (100) InP sub-strates. The layers were grown at a constant furnace temperature of 640°C by passing a direct electric current (0–10A/cm²) from the substrate to the melt. In order to minimize the out-diffusion of Fe atoms from the bulk of the substrate during the melt saturation, the substrate was kept at a cold temperature region (340°C) within the growth chamber and remotely loaded in the graphite boat just prior to the initiation of the growth cycle. In addition to pre-venting the out-diffusion of Fe atoms, this procedure sub-stantially reduced the thermal degradation of the InP sub-strate surface. The above technique produced high quality layers having uniform thickness and good surface morphology. A study of the dependence of growth rate on the applied current density yielded an average growth rate of 0.06μm/ A-min. Room temperature Hall measurements on layers grown by CCLPE resulted in Hall mobilities μ₃₀₀ = 8900cm²/V-sec at a carrier concentration of 6.2 × l0¹⁶cm⁻³. The improve-ment in the mobility achieved by the CCLPE technique is attributed to a reduced out-diffusion of scattering centers from the substrate into the growth layer, as well as to the higher quality of epitaxial layers normally achieved by CCLPE.     

Experimental evidences of carrier distribution and behavior in frequency in a BMFET Modulator

We propose a novel method to monitor the carrier plasma distribution in a bipolar mode field effect transistor light modulator, using standard emission microscopy. Our bi-dimensional maps validate the theoretical predictions of plasma distribution as a function of the device bias. Dynamical measurements provide an experimental evidence of a frequency threshold in the electric field induced plasma distribution. Below 500 kHz generation/recombination processes while above drift phenomena allow the plasma localization in the device. An effective carrier lifetime /spl ges/2 /spl mu/s was extrapolated.     

The behavior of unintentional impurities in Ga0.47 In0.53As grown by MBE

A number of factors contribute to the high n-type background carrier concentration (high 10¹⁵ to low 10¹⁶ cm⁻³) measured in MBE Ga_0.47In_0.53As lattice-matched to InP. The results of this study indicate that the outdiffusion of impurities from InP substrates into GalnAs epitaxial layers can account for as much as two-thirds of the background carrier concentration and can reduce mobilities by as much as 40%. These impurities and/or defects can be gettered at the surfaces of the InP by heat treatment and then removed by polishing. The GalnAs epitaxial layers grown on the heat-treated substrates have significantly improved electrical properties. Hall and SIMS measurements indicate that both donors and acceptors outdiffuse into the epitaxial layers during growth resulting in heavily compensated layers with reduced mobilities. The dominant donor species was identified by SIMS as Si, and the dominant acceptors as Fe, Cr and Mn.