用X射线衍射研究缓冲层对GaInAs材料的影响

用分子束外延方法制备了具有GaInAs组分渐变缓冲层和不具有GaInAs组分渐变缓冲层的Ga0.9In0.1As/GaAs结构的外延材料。利用高分辨率X射线衍射法(HRXRD)对制备的两种样品分别进行了测试分析。实验结果表明,GaInAs组分渐变缓冲层对外延生长在GaAs衬底上的Ga0.9In0.1As外延材料的晶体质量具有显著的改善作用,极大降低了由于外延层与衬底晶格不匹配所带来的影响。从X射线倒易空间衍射(RSM)二维图谱结果来看,具有GaInAs组分渐变缓冲层结构的样品,其Ga0.9In0.1As外延层与GaInAs组分渐变缓冲层接近完全弛豫,Ga0.9In0.1As外延层的应变降低,表面残留应力小于0.06%,同时,GaAs衬底与Ga0.9In0.1As外延层之间的偏移夹角明显变小。     

TEM study of dislocations structure in In0.82Ga0.18As/InP heterostructure with InGaAs as buffer layer

In order to improve the quality of detector, InxGa1-xAs (x=0.82) buffer layer has been introduced in In0.82Ga0.18As/InP heterostructure. Dislocation behavior of the multilayer is analyzed through plane and cross section [110] by transmission electron microscopy (TEM) and high resolution transmission electron microscopy (HRTEM). The dislocations are effectively suppressed in InxGa1-xAs (x=0.82) buffer layer, and the density of dislocations in epilayer is reduced obviously. No lattice mismatch between buffer layer and epilayer results in no misfit dislocation (MD). The threading dislocations (TDs) are directly related to the multiplication of the MDs in buffer layer.     

Design of S-Graded Buffer Layers for Metamorphic ZnS y Se1−y /GaAs (001) Semiconductor Devices

We present design equations for error function (or “S-graded”) graded buffers for use in accommodating lattice mismatch of heteroepitaxial semiconductor devices. In an S-graded metamorphic buffer layer the composition and lattice mismatch profiles follow a normal cumulative distribution function. Minimum-energy calculations suggest that the S-graded profile may be beneficial for control of defect densities in lattice-mismatched devices because they have several characteristics which enhance the mobility and glide velocities of dislocations, thereby promoting long misfit segments with relatively few threading arms. First, there is a misfit-dislocation-free zone (MDFZ) adjacent to the interface, which avoids dislocation pinning defects associated with substrate defects. Second, there is another MDFZ near the surface, which reduces pinning interactions near the device layer which will be grown on top. Third, there is a large built-in strain in the top MDFZ, which enhances the glide of dislocations to sweep out threading arms. In this paper we present approximate design equations for the widths of the MDFZs, the built-in strain, and the peak misfit dislocation density for a general S-graded semiconductor with diamond or zincblende crystal structure and (001) orientation, and show that these design equations are in fair agreement with detailed numerical energy-minimization calculations for ZnS _y Se_1?y /GaAs (001) heterostructures.     

A Structural Investigation of CdTe(001) Thin Films on GaAs/Si(001) Substrates by High-Resolution Electron Microscopy

Epitaxial CdTe thin films were grown on GaAs/Si(001) substrates by metalorganic chemical vapor deposition using thin GaAs as a buffer layer. The interfaces were investigated using high-resolution transmission electron microscopy and geometric phase analysis strain mapping. It was observed that dislocation cores exist at the CdTe/GaAs interface with periodic distribution. The spacing of the misfit dislocation was measured to be about 2?nm, corresponding to the calculated spacing of a misfit dislocation (2.6?nm) in CdTe/Si with Burgers vector of a[110]/2. From these results, it is suggested that the GaAs buffer layer effectively absorbs the strain originating from the large lattice mismatch between the CdTe thin film and Si substrate with the formation of periodic structural defects.     

基于InGaAs渐变缓冲层的太阳能电池的研究

This paper uses an InGaAs graded buffer layer to solve the problem of lattice mismatch and device performance degradation. In the graded buffer layer, we choose the ＂transition layer＂ and the ＂cover layer＂ to accommodate the 3.9% mismatch. No threading dislocations were observed in the uppermost part of the epitaxial layer stack when using a transmission electron microscope （TEM）. We analyze the factors which influence the saturation current. Simulation data shows that the cells grown by metal organic vapor phase epitaxy （MOVPE） have considerable open circuit voltage, short circuit current, and photoelectric conversion efficiency. Finally we propose that InP may have great development potential as a substrate material.     

不同缓冲层对GaAs基In_(0.3)Ga_(0.7)As材料特性的影响

采用组分跳变和低温大失配缓冲层技术在GaAs衬底上外延了In0.3Ga0.7As材料。测试结果表明,采用组分跳变缓冲层生长的In0.3Ga0.7As主要依靠逐层间产生失配位错来释放应力,并导致表面形成纵横交错的Cross-hatch形貌;而采用低温大失配缓冲层技术则主要通过在低温缓冲层中形成大量缺陷来充分释放应力,并在后续外延的In0.3Ga0.7As表面没有与失配位错相关的Cross-hatch形貌出现。此外,仅需50nm厚的低温大失配缓冲层即可促使In0.3Ga0.7As中的应力完全释放,这种超薄缓冲层技术在工业批产中显得更为经济。     

Comparison of Continuously- and Step-Graded ZnS y Se1−y /GaAs (001) Metamorphic Buffer Layers

The design of metamorphic buffer layers for semiconductor devices with reduced defect densities requires control of lattice relaxation and dislocation dynamics. Graded layers are beneficial for the design of these buffers because they reduce the threading dislocation density by (1) allowing the distribution of the misfit dislocations throughout the buffer layer therefore reducing pinning interactions, and (2) enhancing mobility from the high built-in surface strain which helps to sweep out threading arms. In this work, we considered heterostructures involving a linearly-graded (type A) or step-graded (type B) buffer grown on a GaAs (001) substrate. For each structure type, we studied the equilibrium configuration and the kinetically-limited lattice relaxation and non-equilibrium threading dislocations by utilizing a dislocation dynamics model. In this work, we have also considered heterostructures involving a constant composition ZnS _y Se_1?y device layer grown on top of a GaAs (001) substrate with an intermediate buffer layer of linearly-graded (type C) or step-graded (type D) ZnS _y Se_1?y . For each structure type, we studied the requirements on the thickness and compositional profile in the buffer layer for the elimination of all mobile threading dislocations from the device layer by the dislocation compensation mechanism.     

Room-temperature optically-pumped InGaSb quantum well lasers monolithically grown on Si(100) substrate

Room-temperature optically-pumped In/sub 0.2/Ga/sub 0.8/Sb quantum well lasers on Si are reported. The defect-free monolithic epistructure growth on a Si(100) substrate is initiated by an AlSb quantum dot nucleation layer followed by an AlSb/GaSb superlattice. The 13% mismatch between the AlSb and Si lattice is accommodated by misfit dislocations and associated crystallographic undulations in the AlSb buffer. The nucleation layer and buffer are characterised by atomic force microscopy and transmission electron microscopy. The lasing spectrum is characterised as a function of pump power and polarisation analysis.     

Shear deformation and strain relaxation in HgCdTe on (211) CdZnTe

Shear strain is present in Hg_0.68Cd_0.32Te epitaxial layers grown by molecular beam epitaxy on (211)-oriented Cd_1−yZn_yTe substrates. Differences in the substrate zinc composition led to lattice mismatch between the epitaxial layer and the substrate. The shear strain induced by the mismatch was measured using reciprocal space maps in the symmetric (422) and asymmetric (511) and (333) reflections. In addition, strain relaxation through the formation of misfit dislocations was confirmed using double crystal x-ray topography. Both the shear strain and the misfit dislocation density increased with increasing mismatch between the epitaxial layer and the substrate. Lattice-matched layers were free of misfit dislocations and exhibited triple axis diffraction rocking curve widths of approximately 6 arcsec. The combination of a thick epitaxial layer, a low index substrate, and the potential for lattice mismatch indicates that both shear strains and misfit dislocations must be considered in the structural analysis of HgCdTe/CdZnTe heterostructures.     

Hg1—xCdxTe多层薄膜材料结构缺陷的透射电子显微镜测定

用透射电镜对Ｈｇ１－ｘＣｄＴｅ／ＣｄＴｅ和ＣｄＴｅ／ＧａＡｓ两种异质结的横截面进行了观测分析，对异质结附近的某些结构缺陷，如微孪晶的尺寸，几何形态、层错、界面失配位错的组态特征进行了研究，并对多层膜之间的取向差进行了分析，说明在ＧａＡｓ衬底上用分子束外延法制备的Ｈｇ１－ｘＣｄｘＴｅ／ＣｄＴｅ／ＧａＡｓ多层膜，就大量结构缺陷而言，ＣｄＴｅ缓冲层对Ｈｇ１－ｘＣｄｘＴｅ外延层起到了屏障作用，在Ｈｇ１－ｘ     

Study of the structure and composition of the strained epitaxial layer in the InAlAs/GaAs(100) heterostructure by transmission electron microscopy

The results of electron microscopy studies of an epitaxial InAlAs layer on a GaAs(100) substrate are reported. It is established that there exist misfit dislocations at the interface between the materials and there are residual strains distorting the lattice in the layer. From the measurements of lattice parameters in the directions parallel and orthogonal to the growth direction away from misfit dislocations, the local nominal lattice parameter of the layer is calculated and the relative content of indium is determined.     

Structure optimization of high indium content InGaAs/InP heterostructure for the growth of In0.82Ga0.18As buffer layer

Microstructure and misfit dislocation behavior in InxGa1-xAs/InP heteroepitaxial materials grown by low pressure metal organic chemical vapor deposition (LP-MOCVD) were analyzed by high resolution transmission electron microscopy (HRTEM), scanning electron microscopy (SEM), atomic force microscopy (AFM), Raman spectroscopy and Hall effect measurements. To optimize the structure of In0.82Ga0.18As/InP heterostructure, the InxGa1-xAs buffer layer was grown. The residual strain of the In0.82Ga0.18As epitaxial layer was calculated. Further, the periodic growth pattern of the misfit dislocation at the interface was discovered and verified. Then the effects of misfit dislocation on the surface morphology and microstructure of the material were studied. It is found that the misfit dislocation of high indium (In) content In0.82Ga0.82As epitaxial layer has significant influence on the carrier concentration.     

Ultralow leakage In/sub 0.53/Ga/sub 0.47/As p-i-n photodetector grown on linearly graded metamorphic In/sub x/Ga/sub 1-x/P buffered GaAs substrate

A novel top-illuminated In/sub 0.53/Ga/sub 0.47/As p-i-n photodiodes (MM-PINPD) grown on GaAs substrate by using linearly graded metamorphic In/sub x/Ga/sub 1-x/P (x graded from 0.49 to 1) buffer layer is reported. The dark current, optical responsivities, noise equivalent power, and operational bandwidth of the MM-PINPD with aperture diameter of 60 /spl mu/m are 13 pA, 0.6 A/W, 3.4/spl times/10/sup -15/ W/Hz/sup 1/2/, and 7.5 GHz, respectively, at 1550 nm. The performances of the MM-PINPD on GaAs are demonstrated to be comparable to those of a similar device made on InGaAs-InP substrate.     

Effects of GaAs buffer layer and lattice-matching on deep levels in Zn(S)Se/GaAs heterostructures

The effects of GaAs buffer layer and lattice-matching on the nature of deep levels involved in Zn(S)Se/GaAs heterostructures are investigated by means of deeplevel transient spectroscopy (DLTS). The heterojunction diodes (HDs) where nZn(S)Se is grown on p⁺-GaAs by metalorganic vapor phase epitaxy are used as a test structure. The DLTS measurement reveals that when ZnSe is directly grown on a GaAs substrate, there exist five electron traps A-E at activation energies of 0.20, 0.23, 0.25, 0.37, and 0.53 eV, respectively. Either GaAs buffer layer and lattice-matching may reduce the incorporation of traps C, D, and E, implying that these traps are ascribed to surface treatment of GaAs substrate and to lattice relaxation. Concentration of trap B, which is the most dominant level, is proportional to the donor concentration. However, in the ZnSSe/GaAs sub. HD, another trap level, instead of trap B, locates at the almost same position as that of trap B, and it shows anomalous behavior that the DLTS peak amplitude changes drastically as changing the rate windows. This is explained by the defect generation through the interaction between sulfide and a GaAs substrate surface. For the trap A, the concentration is a function of donor concentration and lattice mismatch, and the origin is attributed to a complex of donor induced defects and dislocations.     

基于InP衬底的晶格失配In0.68Ga0.32As的MOCVD生长及其特性研究

采用MOCVD生长技术在InP衬底上成功实现了晶格失配的3μm In0.68 Ga0.32As薄膜生长.通过As组分的改变,利用张应变和压应变交替补偿的InAsxP1-x应变缓冲层结构来释放由于晶格失配所产生的应力,在InP衬底上得到了与In0.68Ga0.32 As晶格匹配的InAsxP1-x“虚拟”衬底,通过对缓冲层厚度的优化,使应力能够在“虚拟”衬底上完全豫弛.通过原子力显微镜(AFM)、高分辨XRD、透射电镜(TEM)和光致发光(PL)等测试分析表明,这种释放应力的方法能够有效提高In0.68 Ga0.32 As外延层的晶体质量.     

Morphology and defect structures of GaSb islands on GaAs grown by metalorganic vapor phase epitaxy

The initial nucleation of GaSb on (001) GaAs substrates by metalorganic vapor phase epitaxy has been investigated using transmission electron microscopy (TEM) and high resolution electron microscopy (HREM). TEM results showed that the GaSb islands experience a morphological transition as the growth temperature increases. For growth at 520°C, the islands are longer along the [110] direction; at 540°C, they are nearly square, and at 560°C, they are longer along the direction. Possible mechanisms are proposed to describe such a transition. TEM and HREM examination showed that lattice misfit relaxation mechanisms depend on the growth temperature. For the sample grown at 520°C, the lattice mismatch strain was accommodated mainly by 90° dislocations; for the sample grown at 540°C, the misfit strain was relieved mostly by 90° dislocations with some of 60° dislocations, and for the sample grown at 560°C, the strain was accommodated mainly by 60° dislocations which caused a local tilt of the GaSb islands with respect to the GaAs substrate. The density of threading dislocations was also found to be dependent on the growth temperature. Mechanisms are proposed to explain these phenomena.     

High-speed 1.3 μm GaInAs detectors fabricated on GaAs substrates

High-speed interdigitated metal-semiconductor-metal detectors have been fabricated on non-lattice-matched, semi-insulating, GaAs substrates using two GaInAs layers of differing indium concentrations to accommodate most of the lattice mismatch by interface misfit dislocations. Bandwidths as high as 3 GHz were measured with none of the detrimental low-frequency gain usually observed in this type of device. This is attributed to the inhibition of the surface trapping of photoinduced carriers by a graded pseudomorphic layer at the surface     

ALE法对InSb/GaAs异质薄膜电学性能的改进

以GaAs(100)为衬底,采用原子层外延(ALE)的方法在GaAs缓冲层和常规InSb外延层间引入85个周期约30 nm的InSb低温缓冲层,以快速降低InSb和GaAs界面间较大的晶格失配(14.6%)对外延层质量造成的不利影响,从而改进异质外延薄膜的电学性能。实验结果显示,ALE低温缓冲层能较快地释放晶格失配应力,降低位错密度。室温和77 K的Hall测试显示,引入低温ALE缓冲层生长的InSb/GaAs异质外延薄膜,其InSb外延层本征载流子浓度和迁移率等电学性能较常规的方法有着较大的改进。     

Design of Dislocation-Compensated ZnS y Se1−y /GaAs (001) Heterostructures

The understanding of lattice relaxation and dislocation dynamics in lattice-mismatched semiconductors makes it possible to design metamorphic device structures utilizing the dislocation compensation mechanism for reduced defects, improved performance, and enhanced reliability. We have developed a dislocation dynamics model accounting for misfit–threading interactions and have applied it to ZnS _y Se_1?y /GaAs (001) heterostructures.1 Dislocation compensation involves the removal of threading dislocations associated with one sense of misfit dislocations by bending them over to create misfit dislocations of the opposite sense at an intentionally mismatched interface. Here we investigated the design of dislocation-compensated ZnS _y Se_1?y /GaAs (001) heterostructures and considered the sulfur mole fraction tolerances applicable to such structures. We considered two types of structures: type A involved a uniform-composition (ungraded) layer on top of a uniform-composition buffer, while type B involved a uniform-composition layer on a linearly graded buffer. For each structure type we studied the requirements on the thickness and compositional profile of the buffer layer to optimize the removal of mobile threading dislocations from the top uniform (device) layer as well as the allowed tolerance in compositional overshoot to achieve structures with low threading dislocation density. We show for both types of structure that (i) for given compositional overshoot at the buffer–device layer interface, there is an optimum buffer thickness which minimizes the dislocation density; and (ii) for given buffer thickness there is an optimum overshoot which minimizes the dislocation density.     

Electroabsorption modulation at 1.3 /spl mu/m on GaAs substrates using a step-graded low temperature grown InAlAs buffer

We have achieved quantum confined Stark effects (QCSE) on In/sub 0.38/Ga/sub 0.62/As-In/sub 0.38/Al/sub 0.62/As multiple-quantum-well (MQW) structures, operating at 1.3 /spl mu/m grown on GaAs substrates. A quantum confined Stark shift of the exciton absorption peak of 47 meV was obtained with an applied electric field of 190 KV/cm, measured on surface normal PIN diodes. The structure is grown by MBE on a novel three-stage, compositionally step graded, In/sub x/Al/sub 1-x/As buffer, doped with Si to 5/spl middot/10/sup 17//cm/sup 3/, on an n-type GaAs substrate. The total thickness of the buffer is 0.3-0.6 mm, which is considerably smaller than that of linearly graded buffer layers. This structure can be used in both waveguide modulators and surface normal F-P type modulators on GaAs substrates.