单节拍浮点运算神经元的组合逻辑设计

介绍了通用神经计算机CASSANDRA-中单节拍浮点运算神经元的硬件设计方法.基于通用超曲面神经元模型,以组合电路与EPROM查表分别实现浮点数加法、乘法及p次幂运算,从而实现了单节拍内完成浮点运算|W(X-Y)|p的神经元组合逻辑设计.该设计使通用神经计算机硬件具有更强的适应能力和更好的网络性能     

单节拍浮点运算神经元的组合逻辑设计

介绍了通用神经计算机CASSANDRA-Ⅱ中单节拍浮点运算神经元的硬件设计方法.基于通用超曲面神经元模型,以组合电路与EPROM查表分别实现浮点数加法、乘法及p次幂运算,从而实现了单节拍内完成浮点运算|W(X-Y)|p的神经元组合逻辑设计.该设计使通用神经计算机硬件具有更强的适应能力和更好的网络性能.     

模拟神经元电路实现研究现状与进展

人工神经网络是现代信息处理领域的一个重要的方法。相对于软件实现 ,硬件实现方式能充分发挥神经网络并行处理的特点。用模拟电路实现神经网络电路形式简单、功耗低、速度快、占用芯片面积小 ,可以提高在神经网络芯片上神经元的集成度 ,神经元电路适合用模拟电路实现。文中综述了当前神经网络单元的模拟 VLSI实现的成果、新技术以及作者的工作成果。针对应用最广泛的线性和平方突触神经元 ,详细从权值存储单元、突触电路和阈值函数电路三方面来叙述。对各种实现方式的优缺点进行了比较 ,同时指出了神经网络实现电路中需要考虑的因素。最后 ,展望了用集成电路技术实现自学习神经网络的发展方向     

一种激励函数的硬件仿真实现

现在对神经网络的研究以神经网络模型及算法的模拟实现为主,较少考虑硬件实现问题.以模拟器件为主,分析设计了BP神经网络各环节的硬件电路.介绍其中的一种Sigmoid激励函数电路实现,该电路以差分器件为主要部分,通过调整相应的参数可以调节输入电压的范围和改变激励函数的增益,并在EDA环境下仿真验证了电路的有效性.     

基于VHDL的神经网络模型库的建立与实现

本文讨论了神经网络的硬件实现,提出按层次化的设计方法建立神经网络的硬件模型,并根据神经网络的要求建立基于VHDL的神经网络元件库.元件库具有灵活性好、扩展性强的特点,设计者可根据需要任意修改库单元,灵活的接口功能使用户可以方便地将DSP等模块加入到设计中,在硬件中实现高速、高效的神经网络.     

基于FPGA的脉冲神经网络模型设计与实现

现有的脉冲神经网络模型软件模拟通常具有处理速度慢、功耗高的缺点,同时利用硬件电路实现则具有开发难度大、灵活性差的缺点.为了探索合理实现脉冲神经网络模型的途径,在己有研究成果的基础上综合考虑两种方案的优缺点,提出了利用软件库模拟脉冲神经元数学模型以及网络的拓扑结构、并将网络运行时的关键计算任务以计算内核的方式交由基于OpenCL的FPGA并行计算的新思路.主要工作为:使用模块开发方式对脉冲神经网络软件开发库和OpenCL开发库进行了扩展、并将软件开发库中的重要模块重构成FPGA计算内核,使得软件开发库能够调用FPGA执行计算任务,最终达到利用两个库构建运行网络模型时能够同时满足易于开发、灵活性高、处理速度快、功耗低等要求的目的.基于MNIST图像数据集的图像分类实验表明,同一网络模型拓扑结构下,与在GPU上的软件模拟相比,提出方案的图像分类准确率并没有下降,同时以略微牺牲运行性能为代价,参考功率降低了约63.6%.     

基于遗忘效应忆阻器的LIF神经元电路研究

细胞神经网络(CNN)被公认为是一种强大的大规模并行网络架构,能够高速执行运算操作和解决复杂的工程问题,但是目前关于硬件实现神经元的研究处于起步阶段.首先,研究了一个基于SrTiO3(STO)的忆阻仿真模型,并分析了该模型的阻值变化特性与磁滞回线.其次,在此基础上设计了基于忆阻器的LIF神经元电路,验证了忆阻器模型可很...     

基于CPLD的BP神经网络模型的硬件实现

神经网络模型的硬件实现已成为人工智能的一个重要的研究方向,本文提出一种基于CPLD的硬件实现方式,来实现BP三层神经网络模型方法,并对该模型进行了MAX+Plus II仿真验证.     

具有二维状态转移结构的随机逻辑及其在神经网络中的应用

随机计算是一种特殊的基于概率数据码流的数学计算方法,其优点在于可以采用非常简单的数字逻辑完成复杂数学运算,从而大幅降低硬件实现成本。该文首先讨论了随机计算的基本原理和主要运算逻辑,论述了传统线性状态机的不足,并分析了一种2维状态转移拓扑结构,推导了通过2维有限状态机实现高斯函数的方法。在此基础上,提出一种随机径向基函数神经网络模型,其硬件实现成本非常低,而性能与传统神经网络相当。两类模式识别实验结果显示,所提出的随机径向基函数神经网络的输出值均方误差与相应结构传统神经网络的差别小于1.3%。FPGA实验结果显示,数据宽度为12位时,随机中间神经元的电路面积仅为传统插值查表结构的1.2%、坐标旋转数字计算方法(CORDIC)的2%。通过改变输入码流长度,该神经网络可以在处理速度、功耗和准确性之间作出平衡,具有应用灵活性,适用于对成本、功耗要求较高的应用如嵌入式、便携式、穿戴式设备。     

基于神经网络模型测试生成的学习策略

本文描述一种基于组合电路的Ｈｏｐｆｉｅｌｄ神经网络模型的测试生成系统，重点介绍了系统中实现神经网络学习并记忆基于电路拓扑的知识信息的学习策略，从而将基于电路拓扑的知识与数学计算结合起来，最后给出了实验结果。     

Analog circuits for modeling biological neural networks: design andapplications

Computational neuroscience is emerging as a new approach in biological neural networks studies. In an attempt to contribute to this field, we present here a modeling work based on the implementation of biological neurons using specific analog integrated circuits. We first describe the mathematical basis of such models, then present analog emulations of different neurons. Each model is compared to its biological real counterpart as well as its numerical computation. Finally, we demonstrate the possible use of these analog models to interact dynamically with real cells through artificial synapses within hybrid networks. This method is currently used to explore neural networks dynamics.     

Brain-implantable biomimetic electronics as the next era in neuralprosthetics

An interdisciplinary multilaboratory effort to develop an implantable neural prosthetic that can coexist and bidirectionally communicate with living brain tissue is described. Although the final achievement of such such a goal is many years in the future, it is proposed that the path to an implantable prosthetic is now definable, allowing the problem to be solved in a rational, incremental manner. Outlined in this report is our collective progress in developing the underlying science and technology that will enable the functions of specific brain damaged regions to be replaced by multichip modules consisting of novel hybrid analog/digital microchips. The component microchips are “neurocomputational” incorporating experimentally based mathematical models of the nonlinear dynamic and adaptive properties of biological neurons and neural networks. The hardware developed to date, although limited in capacity, can perform computations supporting cognitive functions such as pattern recognition, but more generally will support any brain function for which there is sufficient experimental information. To allow the “neurocomputational” multichip module to communicate with existing brain tissue, another novel microcircuitry element has been developed-silicon-based multielectrode arrays that are “neuromorphic,” i.e., designed to conform to the region-specific cytoarchitecture of the brain, When the “neurocomputational” and “neuromorphic” components are fully integrated, our vision is that the resulting prosthetic, after intracranial implantation, will receive electrical impulses from targeted subregions of the the brain, process the information using the hardware model of that brain region, and communicate back to the functioning brain. The proposed prosthetic microchips also have been designed with parameters that can be optimized after implantation, allowing each prosthetic to adapt to a particular user/patient     

基于视网膜生理机制的运动目标边沿检测综合模型研究

视网膜的视觉生理功能、生理机制及其数学模型的构建一直是视觉应用领域的研究热点之一.文章分析了视网膜运动通道对亮度通道的作用方式并建立了数学模型,然后利用所提出模型对运动目标边沿检测效果进行了模拟,最后对模型需深入研究的问题及其研究思路做了展望.     

普遍故障下神经网络隐层冗余容错的分析与应用

隐层神经元冗余是提高神经网络容错性的一个有效的方法,在神经网络分类器的容错设计中,这一方法得到了良好的效果,对单故障可以做到完全容错.但是这一应用仅仅只能应用于输出层为硬限幅函数的前向网络,并且只证明了对网络中单故障有效.在实际应用中,网络中的各个节点和权值的故障往往是普遍存在的,因此本文提出了一种隐层冗余结构,对普遍故障存在下隐层神经元冗余容错方法做以评估,得出的结论是应用这种隐层神经元冗余结构可以减小网络的全局故障率;并提出了针对一般前向神经网络的实用的隐层神经元容错方法,这种方法可以有效地提高网络在普遍故障下的容错能力.     

A self-learning digital neural network using wafer-scale LSI

A large-scale, dual-network architecture using wafer-scale integration (WSI) technology is proposed. By using 0.8 μm CMOS technology, up to 144 self-learning digital neurons were integrated on each of eight 5 in silicon wafers. Neural functions and the back-propagation (BP) algorithm were mapped to digital circuits. The complete hardware system packaged more than 1000 neurons within a 30 cm cube. The dual-network architecture allowed high-speed learning at more than 2 gigaconnections updated per second (GCUPS). The high fault tolerance of the neural network and proposed defect-handling techniques overcame the yield problem of WSI. This hardware can be connected to a host workstation and used to simulating a wide range of artificial neural networks. Signature verification and stock price prediction have already been demonstrated with this hardware     

A Multichip Pulse-Based Neuromorphic Infrastructure and Its Application to a Model of Orientation Selectivity

The growing interest in pulse-mode processing by neural networks is encouraging the development of hardware implementations of massively parallel networks of integrate-and-fire neurons distributed over multiple chips. Address-event representation (AER) has long been considered a convenient transmission protocol for spike based neuromorphic devices. One missing, long-needed feature of AER-based systems is the ability to acquire data from complex neuromorphic systems and to stimulate them using suitable data. We have implemented a general-purpose solution in the form of a peripheral component interconnect (PCI) board (the PCI-AER board) supported by software. We describe the main characteristics of the PCI-AER board, and of the related supporting software. To show the functionality of the PCI-AER infrastructure we demonstrate a reconfigurable multichip neuromorphic system for feature selectivity which models orientation tuning properties of cortical neurons     

Some Insights Into Computational Models of (Patho)physiological Brain Activity

The amount of experimental data concerning physiology and anatomy of the nervous system is growing very fast, challenging our capacity to make comprehensive syntheses of the plethora of data available. Computer models of neuronal networks provide useful tools to construct such syntheses. They can be used to interpret experimental data, generate experimentally testable predictions, and formulate new hypotheses regarding the function of the neural systems. Models can also act as a bridge between different levels of neuronal organization. The ultimate aim of computational neuroscience is to provide a link between behavior and underlying neural mechanisms. Depending on the specific aim of the model, there are different levels of neuronal organization at which the model can be set. Models are constructed at the microscopic (molecular and cellular), macroscopic level (local populations or systems), or dynamical systems level. Apart from purely computational models, hybrid networks are being developed in which biological neurons are connected in vitro to computer simulated neurons. Also, neuromorphic systems are recently being created using silicon chips that mimic computational operations in the brain. This paper reviews various computational models of the brain and insights obtained through their simulations.     

融合潜在主题信息和卷积语义特征的文本分类

经典的概率主题模型通过词与词的共现挖掘文本的潜在主题信息,在文本聚类与分类任务上被广泛应用。近几年来,随着词向量和各种神经网络模型在自然语言处理上的成功应用,基于神经网络的文本分类方法开始成为研究主流。本文通过卷积神经网络(Convolutional Neural Network,CNN)和概率主题模型在文本主题分类上的效果对比,展示了CNN在此任务上的优越性。在此基础上,本文利用CNN模型提取文本的特征向量并将其命名为卷积语义特征。为了更好地刻画文本的主题信息,本文在卷积语义特征上加入文本的潜在主题分布信息,从而得到一种更有效的文本特征表示。实验结果表明,相比于单独的概率主题模型或CNN模型,新的特征表示显著地提升了主题分类任务的F1值。      

A Leaky‐Integrate‐and‐Fire Neuron Analog Realized with a Mott Insulator

During the last half century, the tremendous development of computers based on von Neumann architecture has led to the revolution of the information technology. However, von Neumann computers are outperformed by the mammal brain in numerous data‐processing applications such as pattern recognition and data mining. Neuromorphic engineering aims to mimic brain‐like behavior through the implementation of artificial neural networks based on the combination of a large number of artificial neurons massively interconnected by an even larger number of artificial synapses. In order to effectively implement artificial neural networks directly in hardware, it is mandatory to develop artificial neurons and synapses. A promising advance has been made in recent years with the introduction of the components called memristors that might implement synaptic functions. In contrast, the advances in artificial neurons have consisted in the implementation of silicon‐based circuits. However, so far, a single‐component artificial neuron that will bring an improvement comparable to what memristors have brought to synapses is still missing. Here, a simple two‐terminal device is introduced, which can implement the basic functions leaky integrate and fire of spiking neurons. Remarkably, it has been found that it is realized by the behavior of strongly correlated narrow‐gap Mott insulators subject to electric pulsing.