一种新颖的z轴硅微陀螺仪信号检测方案研究

硅微陀螺仪具有体积小、功耗低、可靠性高等优点,在惯性测量领域有着广泛的应用前景。为了提高陀螺仪测量的灵敏度和信噪比,提出了一种新颖的信号检测方案。该方案研究了硅微陀螺仪驱动模态、检测模态的动力学方程,建立了陀螺仪等效力学模型,观察陀螺仪的动态特性,探讨硅微陀螺仪信号检测方法,并对陀螺仪的机械结构及检测电路进行系统仿真。仿真结果验证了相位检测方案的可行性。     

New canonic lossy inductor using a single CDBA and its application

A new lossy inductor (parallel R-L type) using single current differencing buffered amplifier (CDBA) is presented, which employs only two resistors and a grounded capacitor. The proposed lossy inductor is shown to be useful in realizing an oscillator circuit, which provides quadrature voltage outputs using only two CDBAs, three resistors and two grounded capacitors and offers independent control on condition of oscillation and frequency of oscillation up to a frequency of 61 MHz. Detailed non-ideal analysis including single-pole model for voltage and current gain has also been carried out. SPICE simulation results and experimental results based upon the CDBA constructed from commercially available IC AD844 have been included which confirm the practical workability of the proposed lossy inductor and quadrature oscillator circuit.     

DCM模式下非理想boost开关变换器的建模与仿真

提出了一种工作在断续电感电流(DCM)模式下的非理想DC-DC Boost(升压)变换器模型.在电路平均法基础上对占空比限制加以改进,并考虑寄生参数的影响,建立其小信号模型,推导出传递函数.在Matlab/Simulink环境中,对瞬态响应和开环传递函数进行仿真,结果与实际更加接近,精度更高.     

基于寄生回路的导引头传递函数及测试方法

为了反应真实导引头在隔离度作用下的输出特性,提出了一种基于隔离度寄生回路的导引头传递函数概念及测试方法。通过建立导引头隔离度模型,推导了不同干扰力矩作用下的隔离度传递函数,对隔离度寄生回路稳定域进行分析,并得到了寄生回路失稳频率变化规律。建立了包含寄生回路的真实导引头传递函数模型,对真实导引头传递函数的频域特性和时域特性进行了仿真分析。最后,提出了基于寄生回路的导引头传递函数半实物仿真测试方法,通过测试从而得到真实导引头模型,提高导引头系统建模的准确性。     

一种频率合成器的建模优化与电路设计

根据数模混合集成电路系统级和行为级快速验证的需求,设计了一种卫星导航系统射频接收机前端的频率合成器。传统行为级模型一般是基于理想环路进行参数提取,误差较大。为此,首先,分别利用MATLAB和Verilog-AMS对频率合成器建立理想行为级模型与非理想行为级模型,并根据行为级模型提取与优化的环路参数,采用SMIC 180 nm CMOS工艺设计仿真电路级频率合成器;其次,建立MATLAB噪声模型,对电路级各个模块的噪声进行拟合,评估频率合成器系统的整体噪声性能。所提出的频率合成器设计方法对电路级设计具有前瞻性的指导,并有助于电路级的设计优化。     

Novel Cascadable All-Pass/Notch Filters Using a?Single?FDCCII and Grounded Capacitors

Four new second-order voltage-mode cascadable all-pass/notch filters are proposed using only a single active element and four passive components. The active element used is a fully differential current conveyor. All the circuits possess high-input and low-output impedance, which is a desirable feature for voltage-mode circuits. A non-ideal and parasitic study is also performed. The proposed circuits are verified through PSPICE simulation results.     

Mathematical Modelling on the Quadrature Error of Low-rate Microgyroscope for Aerospace Applications

This paper presents the mathematical modelling on the quadrature error of a microgyroscope due to the imbalance of the asymmetric spring flexures. Quadrature error occurs when the proof mass of a microgyroscope oscillates along an axis that is not exactly parallel to the lateral-axis. The imbalance due to manufacturing variation can cause the proof mass to rotate when a force acts on the proof mass. The proposed mathematical model was verified by the finite element software IntelliCAD, and found to have a good agreement on angles of rotation of comb fingers. The mathematical model provides a new avenue in evaluating the quadrature error system and in saving the overall simulation time.     

14 nm FinFET栅围寄生电容的建模与拟合

提出了一种基于保角映射方法的14 nm鳍式场效应晶体管(FinFET)器件栅围寄生电容建模的方法。对FinFET器件按三维几何结构划分寄生电容的种类,再借助坐标变换推导出等效电容计算模型,准确表征了不同鳍宽、鳍高、栅高和层间介质材料等因素对寄生电容的依赖关系。为了验证该寄生电容模型的准确性,对不同结构参数的寄生电容进行三维TCAD仿真。结果表明,模型计算结果与仿真结果的拟合度好,准确地反映了器件结构与寄生电容之间的依赖关系。     

一个具有平滑转换特性的电流型DAC单元电路

数模转换器（digital-analogue converter, DAC）在当前电子系统中发挥着重要作用,电流型DAC因其优良的特性而得到广泛应用。单元电路在开关瞬间的非理想转换特性对电流型DAC的性能有直接影响。文中对导致电流型DAC单元电路非理想转换特性的各类寄生效应进行了分析,并提出了一种结构简单的单元电路以改善非理想的输出特性。仿真结果显示其能有效抑制各类寄生效应,实现了输出的平滑转换。通过在一个抖频电路中的应用,该单元电路的可行性得以验证。     

A comprehensive analysis of the effect of finite amplifier bandwidth and excess loop delay in continuous-time sigma–delta modulators

A comprehensive study of the impact of the finite gain-bandwidth product (GBW) in amplifiers and the excess loop delay on CT ΣΔ modulators has been carried out in this paper. Variations in the modulator coefficients have been included too. Considering a second order modulator, our study was based on the dependence of the NTF poles and zeroes locus in the z-plane on these two non-ideal effects from both an analytical and a computer simulation approach. The corresponding STFs were also analytically evaluated. The theoretical and the simulated results have been compared with the experimental results obtained from a test-chip recently designed and implemented. Amplifiers were modeled according to a single-pole transfer function. Using the modified Z-transform method the dependence of the NTF poles and zeroes locus in the z-plane on the finite GBW and on excess loop delay was obtained when the DAC pulse end occurs in the current (“early”) or in the following (“late”) clock cycle. Once the theoretical analysis was validated, NTF poles and zeroes loci were evaluated as a function of the two non-ideal effects considered separately or combined. In each case, the order of the modulator loop filter was discussed. The finite GBW effect can be compensated including an intentional “early” DAC pulse. This pulse can be implemented in the modulator by changing the sampling instant in the embedded ADC with respect to the instant DACs are enabled by using a simple delay circuit for the ADC clock. Thus, the modulator power consumption can be significantly reduced.     

18bit 20MS/s流水线ADC架构及行为级模型设计

为了设计出满足高端仪器仪表、电子通信设备等应用需求的高速高精度模数转换器(Analog-to-Digital Converter,ADC),提出了一种精度为18 bit、采样率为20 MS/s的流水线ADC架构。使用Verilog-A语言对每一级流水级中的子模数转换电路(Sub-Analog-to-Digital Converter,Sub-ADC)、乘法数模转换电路(Multiplying Digital-to-Analog Converter,MDAC)等关键电路进行建模,进而搭建出该ADC的整体行为级模型,并基于Cadence的Spectre仿真平台进行仿真验证。在理想情况下,得到的有效位数(Effective Number of Bits,ENOB)为18.01 bit,信噪失真比(Signal to Noise and Distortion Ratio,SNDR)为110.44 dB,无杂散动态范围(Spurious Free Dynamic Range,SFDR)为122.41 dB,验证了所设计的流水线ADC的架构和行为级模型的正确性。在加入运放有限增益、电容失配等非理想因素后,该Verilog-A行为级模型也有效反映出非理想因素对电路性能的影响。将行为级模型与数字校准算法联合仿真,证明了所设计的数字算法能够有效降低非理想因素对电路性能产生的影响。     

On the Mode-Matched Control of MEMS Vibratory Gyroscope via Phase-Domain Analysis and Design

This paper investigates a novel method for the mode-matched control of a microelectromechanical systems (MEMS) vibratory gyroscope through a phase-domain analysis. Compared with the previous works, the proposed method presents a simple and robust automatic mode tuning scheme for sensitivity enhancement. In designing the mode-matched control loop, the resonant characteristics of the driving axis are used as the reference mode. Then, the phase difference between sense and drive modes at the resonant frequency of drive mode is used to generate a control signal for phase error regulation. For the control loop design, a linear phase-locked loop is adapted. Through the simulation using practical MEMS gyroscope parameters, the mode-matching performance and robustness of the designed control loop is demonstrated. It is also shown that coupling effect yields no degradation of output sensitivity. Finally, the experimental results obtained by implementing the electronics of mode-matched control verify the feasibility of the proposed method.      

电容式z轴微机械陀螺的噪声抑制

将z轴微机械陀螺两个模态的机械噪声效应等效为各自在单位噪声力作用下的振动,根据陀螺的工作原理得到两个噪声力作用下陀螺敏感模态的机械输出噪声。建立了包含运放和电路板非理想因素在内的接口电路的噪声模型。结合机械噪声模型和接口电路模型噪声,建立了包括结构参数和电路最小检测电容量在内的陀螺的噪声等效输入角速度模型,为陀螺的设计优化提供了参考。分析了结构参数对陀螺等效输入角速度噪声影响,并采用两个参数不同的电容式z轴微机械陀螺进行了实验。结果表明,通过结构参数的调整,将电容式z轴微机械陀螺的输出噪声从414μV/Hz降低至235μV/Hz。     

粘滑驱动式小型运动平台的动力学分析

为解决微纳操作中驱动技术方面的问题,该文研制了一种粘滑驱动式小型运动平台;基于已构建的平台结构,继而建立了粘滑驱动系统动力学模型。该动力学模型在引入LuGre摩擦模型的基础上,分别对压电叠堆的电学模型、驱传动系统机械动力学模型进行建模,最终得到统一的粘滑驱动系统模型,并利用Matlab/Simulink对模型进行仿真及分析。分析结果表明,平台位移随着预压力增大而减小,而随着移动台质量的增大而增大。最终经过实验结果与仿真数据对比可知两者基本一致,验证了该模型的准确性。     

Holding voltage investigation of advanced SCR-based protection structures for CMOS technology

A new silicon-controlled rectifier low voltage triggered (SCR-LVT), to be adopted as protection structure against electrostatic discharge (ESD) events, has been developed and characterized. A high holding voltage has been obtained thanks to the insertion of two parasitic bipolar transistors, achieved adding a n-buried region to a conventional SCR structure. These two parasitic transistors partially destroy the loop feedback gain of the two main npn and pnp BJTs, resulting in an increase of the sustaining (holding) voltage during the ESD event. A strong dependence of the holding voltage with the ESD pulse width has also been observed, caused by self-heating effects. 2D-device simulations (DESSIS Synopsys) have been performed obtaining results that perfectly fit the measurements over a wide temperature range (25 °C − 125 °C). Using device simulation results, the factors that influence the holding voltage, in terms of temperature dependence, but also in the behavior of the parasitic BJTs, are explained. A guideline to change the SCR holding voltage, related to the SCR design layout without any change to process parameters, is also proposed.     

Optimal energy management strategy for parallel plug-in hybrid electric vehicle based on driving behavior analysis and real time traffic information prediction

Conclusive evidence has justified great importance of energy management strategies in the performance and economy of plug-in hybrid electric vehicles (PHEVs). This article pays attention to improve adaptive equivalent consumption minimization strategy (A-ECMS) for parallel PHEV based on driving behavior recognition and real time traffic information prediction. Three main efforts have been made to distinguish our work from exiting research. Firstly, a hierarchical driving behavior model is constructed, providing in-depth knowledge about behavior generation, transmission, and consequence. Secondly, an online driving behavior classification method is designed. The proposed method is the coefficient result of offline driving behavior study based on self-report driving behavior questionnaire (DBQ) and online driving behavior discrimination by BP neural network. Thirdly, an improved adaptive equivalent consumption minimization strategy (IA-ECMS) is formulated based on identified driving behavior and predicted real time traffic information. The IA-ECMS can realize equivalent factor tuning instantaneously and reasonably. The simulation results indicate the proposed energy management strategy holds potential in fuel economy improvement than A-ECMS.     

Analysis of a charge-pump PLL: a new model

A new model for the analysis of a second-order charge-pump phase-locked loop (PLL) is described. This model uses a set of difference equations in two well-chosen state variables. It allows one to model exactly the transient behavior of the PLL, even if the loop is out of lock. Theoretical stability and overload limits are determined. A continuous-time approximation is derived. Its validity is verified by simulation examples     

High-speed electro-thermal modelling of a three-phase insulated gate bipolar transistor inverter power module

In this article, a high-speed electro-thermal (ET) modelling strategy to predict the junction temperature of insulated gate bipolar transistor (IGBT) devices of a three-phase inverter power module is presented. The temperature-dependent power loss characteristics of IGBT and diode devices are measured and stored in lookup tables, which replace the conventional complicated physics-based compact models. An inverter is modelled as a voltage controlled voltage source, which allows the inverter-based power train simulation to be carried out in the continuous time domain with a large simulation time-step (1 ms). Using the simulated sinusoidal voltage and current components of the inverter output, the given pulse width modulation mode, the conduction time (duty ratio) and the current of the devices are extracted. Based on the lookup tables, on-times and conduction currents of devices, the average power loss over each simulation time-step is calculated, which is then fed into the inverter thermal model to predict the devices' temperatures. The advantage of the proposed model is that an accurate ET simulation of inverter for long real-time (many minutes) operation can be carried out within an acceptable computational time using a standard modern personal computer. Both simulation and experimental validation have been carried out, and an excellent agreement has been achieved between the simulation and experimental data.     

On the realization of the floating simulators using only grounded passive components

In this paper, two novel circuits for realizing floating inductance, floating capacitance, floating frequency dependent negative resistance (FDNR) and grounded to floating admittance converter depending on the passive component selection are proposed. Both of the proposed simulators employ second-generation current controlled conveyors (CCCIIs) and only grounded passive elements. The non-ideal current and voltage gain as well as parasitic impedance effects on the first proposed circuit are investigated. Also, simulation results using SPICE program are given for the first introduced floating simulator to verify the theory and to exhibit the performance of the circuit.