功率型LED芯片的热超声倒装技术

结合功率型GaN基蓝光LED芯片的电极分布,在硅载体上电镀制作了金凸点,然后通过热超声倒装焊接技术将LED芯片焊接到载体硅片上.结果表明,在合适的热超声参数范围内,焊接后的功率型LED光电特性和出光一致性较好,证明了热超声倒装焊接技术是一种可靠有效的功率型光电子器件互连技术.     

采用热压焊工艺实现金凸点芯片的倒装焊接

金凸点芯片的倒装焊接是一种先进的封装技术.叙述了钉头金凸点硅芯片在高密度薄膜陶瓷基板上的热压倒装焊接工艺方法,通过设定焊接参数达到所期望的最大剪切力,分析研究互连焊点的电性能和焊接缺陷,实现了热压倒装焊工艺的优化.同时,还简要介绍了芯片钉头金凸点的制作工艺.     

用于倒装芯片的金球凸点制作技术

倒装芯片中凸点用于实现芯片和基板的电路互连,芯片凸点的制作是倒装芯片技术的关键技术之一.对金球凸点制作进行了介绍.金球凸点直接粘附于芯片上,同时又可具有电路互连的作用,可以完成倒装芯片与基板的电气连接.金球凸点的优势是简单、灵活、便捷、低成本,最大特点是无需凸点下金属层(UBM),可对任意大小的单个芯片进行凸点制作,平整度可达到±4μm.     

RFID芯片超声倒装封装技术研究

超声倒装是近年来芯片封装领域中快速发展的一种倒装技术,具有连接强度高、接触电阻低、可靠性高、低温下短时完成和成本低的优势,特别适合较少凸点的RFID芯片封装。在镀Ni/Au铜基板上进行了RFID芯片超声倒装焊接实验,金凸点与镀Ni/Au铜基板之间实现了冶金结合,获得了良好的力学与电气性能,满足射频要求。     

无铅钎料凸点超声倒装焊接可行性的研究

近年来,较高熔点的无铅钎料合金已经开始在微电子互连制造中广泛应用,传统的红外或热风等整体加热方法所造成芯片和印刷线路的热影响问题更加突出。采用不加热源的超声波倒装焊接方法,有助于解决上述热影响问题。本文以Sn3．5Ag无铅钎料凸点为对象,验证了室温下Sn3．5Ag无铅钎料凸点超声倒装焊接的可行性和可操作性,分析了多类互连焊点的宏观形态和显微组织,研究表明添加钎剂和改变焊接材料体系均可显著改善互连焊点成型。     

MCM—C倒装焊工艺技术研究

简要介绍了主要倒装焊技术，重点研究了实用性强、可行性好的超声热压倒装焊、导电环氧粘接倒装、ACA粘接倒装以及MCM—C基板上的芯片倒装焊区制作、倒装后芯片的下填充等工艺技术，总结了芯片倒装互连质量的主要检验要求。     

金凸点的打球法制作与可靠性考核

本文采用打球法在芯片上制作金凸点，并将凸点倒装焊接在Ti/Ni/Au多层金属化的LTCC基板上。利用扫描电镜观察凸点形貌，X射线透射研究倒装互连状况，并通过接触电阻和剪切强度对凸点倒装焊的可靠性进行了考核。     

GaAs芯片上倒装Si芯片的金凸点高度与键合工艺参数优化

随着射频集成电路向小型化、高集成方向发展，基于金凸点热超声键合的芯片倒装封装因凸点尺寸小、高频性能优越成为主流技术之一。以GaAs芯片上倒装Si芯片的互连金凸点为研究对象，通过有限元仿真方法，分析了温度和剪切力作用下不同高度金凸点的等效应力，得到金凸点的最优高度值。通过正交试验，研究键合工艺参数(压力、保持时间、超声功率、温度)对金凸点高度和键合强度的影响规律。通过可靠性试验，验证了工艺优化后倒装焊结构的可靠性。结果表明：键合工艺参数对凸点高度的影响排序为压力>超声功率>温度>保持时间，对剪切力的影响排序为压力>超声功率>保持时间>温度。     

一种新型FC和WLP的柔性凸点技术

FC(倒装片)和WLP(圆片级封装)均要在圆片上制作各类凸点,它们与基板焊接互连后,由于各材料间的热失配可能造成凸点——基板间互连失效,从而影响了器件的可靠性和使用寿命。解决这一问题的通常做法是对芯片凸点与基板间进行下填充。本文介绍的柔性凸点技术是在焊球下面增加一层具有弹性的柔性材料,当器件工作产生热失配时,由于柔性材料的自由伸缩,将大大减小以至消除各材料间的失配应力,使芯片凸点与基板下即使不加下填充,也能达到器件稳定、长期、可靠地工作的目的。     

微波芯片倒装金凸点热疲劳可靠性分析及优化

为了满足射频系统小型化的需求,提出了一种基于硅基板的微波芯片倒装封装结构,解决了微波芯片倒装背金接地的问题.使用球栅阵列(BGA)封装分布为周边型排列的GaAs微波芯片建立了三维有限元封装模型,研究了微波芯片倒装封装结构在-55～125℃热循环加载下金凸点上的等效总应变分布规律,同时研究了封装尺寸因素对于金凸点可靠性的影响.通过正交试验设计,研究了凸点高度、凸点直径以及焊料片厚度对凸点可靠性的影响程度.结果表明:金凸点离芯片中心越近,其可靠性越差.上述各结构尺寸因素对凸点可靠性影响程度的主次顺序为:焊料片厚度＞金凸点直径＞金凸点高度.因此,在进行微波芯片倒装封装结构设计时,应尽可能选择较薄的共晶焊料片来保证金凸点的热疲劳可靠性.     

Thermosonic flip-chip bonding for SAW filter

A flip-chip bonding (FCB) method suitable for the surface acoustic wave (SAW) filter was developed. In this method, the gold-ball bumps formed on the chip are directly bonded onto the ceramic substrate by thermosonic bonding. After FCB, they are sealed with a cap without using underfill resin. To obtain high bond strength, characteristic properties of the substrate electrode and the ball bump, were optimized. Furthermore, bondability has been improved by adopting a ramp-up loading profile. The reliability test was carried out with 6-pin SAW chips, and we confirmed the sufficient reliability of bonds.     

Thermal Management and Interfacial Properties in High-Power GaN-Based Light-Emitting Diodes Employing Diamond-Added Sn-3 wt.%Ag-0.5 wt.%Cu Solder as a Die-Attach Material

The thermal management of high-power GaN-based light-emitting diodes (LEDs) soldered with Sn-3 wt.%Ag-0.5 wt.%Cu (SAC305) solder and diamond-added SAC305 solder was evaluated. Diamond addition was found to significantly reduce the surface temperature and total thermal resistance of the LEDs, revealing that diamond-added SAC305 solder is a promising die-attach material for high-power LED packaging. Interfacial reactions in the LED solder joints were also investigated. The thin Au wetting layer in the chip’s backside metallization was rapidly consumed in the initial stage of reflow, forming an AuSn₄ phase at the interface. Subsequently, the AuSn₄ phase detached from the interface, leading to dewetting of the SAC305 solder from the LED chip. To avoid dewetting, a new backside metallization of LED chips should be developed for SAC305 solder.     

Gold Stud Bumps Flip-Chip Bonded onto Copper Electrodes with Titanium and Silver Layers

The purpose of this study was to develop the thermosonic flip-chip bonding process for gold stud bumps bonded onto copper electrodes on an alumina substrate. Copper electrodes were deposited with silver as the bonding layer and with titanium as the diffusion barrier layer. Deposition of these layers on copper electrodes improves the bonding quality between the gold stud bumps and copper electrodes. With appropriate bonding parameters, 100% bondability was achieved. Bonding strength between the gold stud bumps and copper electrodes was much higher than the value converted from the standards of the Joint Electron Device Engineering Council (JEDEC). The effects of process parameters, including bonding force, ultrasonic power, and bonding time, on bonding strength were also investigated. Experimental results indicate that bonding strength increased as bonding force and ultrasonic power increased and did not deteriorate after prolonged storage at elevated temperatures. Thus, the reliability of the high-temperature storage (HTS) test for gold stud bumps flip-chip bonded onto a silver bonding layer and titanium diffusion barrier layer is not a concern. Deposition of these two layers on copper electrodes is an effective and direct method for thermosonic flip-chip bonding of gold stud bumps to a substrate, and ensures excellent bond quality. Applications such as flip-chip bonding of chips with low pin counts or light-emitting diode (LED) packaging are appropriate.     

Increasing the bonding strength of chips on flex substrates using thermosonic flip-chip bonding process with nonconductive paste

Thermosonic flip-chip bonding process with a nonconductive paste (NCP) was employed to improve the processability and bonding strength of the flip-chip onto flex substrates (FCOF). A non-conductive paste was deposited on the surface of the copper electrodes over the flex substrate, and a chip with eight gold bumps bonded onto the copper electrodes by the thermosonic flip-chip bonding process.For the chips and flex substrates assembly, ultrasonic power is important in the removal of some of the non-conductive paste on the surface of copper electrodes during thermosonic bonding. Accordingly, gold stud bumps in this study were directly bonded onto copper electrodes to form successful electrical paths between chips and the flex substrate. A particular ultrasonic power resulted in some metallurgical bonding between the gold bumps and the copper electrodes, increasing the bonding strength. The ultrasonic power was not only to remove the NCP from the copper electrodes, but also formed metallurgical bonds during the thermosonic flip-chip bonding process with NCP.In this study, the parameters of the bonding of chips onto flex substrates using thermosonic flip-chip bonding process with NCP were a bonding force of 4.9 N, a curing time of 40 s, a curing temperature of 140 °C and an ultrasonic power of 14.46 W. The processability and bonding strength of flip-chips on flex substrates using thermosonic bonding process with NCP was verified in this study. This process has great potential to be applied to the packaging of consumed electronic products.     

基于Si衬底的功率型GaN基LED制造技术

介绍了Si衬底功率型GaN基LED芯片和封装制造技术,分析了Si衬底功率型GaN基LED芯片制造和封装工艺及关键技术,提供了产品测试数据。Si衬底LED芯片制备采用上下电极垂直结构与Ag反射镜工艺,封装采用仿流明大功率封装,封装后白光LED光通量达80 lm,光效达70 lm/W,产品已达商品化。与蓝宝石和SiC衬底技术路线相比,Si衬底LED芯片具有原创技术产权,可销往任何国家而不受国际专利的限制。产品抗静电性能好,寿命长,可承受的电流密度高,具有单引线垂直结构,器件封装工艺简单,而且生产效率高,成本低廉。其应用前景广阔,是值得大力发展的一门新技术。     

Electromigration Behavior in Sn-37Pb and Sn-3.0Ag-0.5Cu Flip-Chip Solder Joints under High Current Density

The electromigration of conventional Sn-37Pb and Pb-free Sn-3.0Ag-0.5Cu (in wt.%) solder bumps was investigated with a high current density of 2.5 × 10⁴ A/cm² at 423 K using flip-chip specimens comprised of an upper Si chip and a lower bismaleimide triazine (BT) substrate. Electromigration failure of the Sn-37Pb and Sn-3.0Ag-0.5Cu solder bumps occurred with complete consumption of electroless Ni immersion Au (ENIG) underbump metallization (UBM) and void formation at the cathode side of the solder bump. Finite element analysis and computational simulations indicated high current crowding of electrons in the patterned Cu on the Si chip side, whereas the solder bumps and Cu line of the BT substrate had a relatively low density of flowing electrons. These findings were confirmed by the experimental results. The electromigration reliability of the Sn-3.0Ag-0.5Cu solder joint was superior to that of Sn-37Pb.     

Enhancement of the Bondability and Die-Shear Force of Chip–Flex Substrate Assemblies by Depositing a Nickel Layer on the Flex Substrate

A nickel layer and a silver bonding layer have been deposited on copper electrodes over flex substrates to improve the bondability and die-shear force performance of chip?Cflex substrate assemblies when using the thermosonic flip-chip bonding process. For bonding temperature of 200°C, the maximum die-shear force was achieved by combining parameter values of 20.66?W ultrasonic power, 625?gf bonding force, and 0.5?s bonding time. The improved bondability and die-shear force could be attributed to better transfer of ultrasonic power across the bonding interface during thermosonic flip-chip bonding, owing to the high rigidity of the copper electrodes provided by the nickel layer. Experimental results also indicated that high bonding load is necessary at elevated ultrasonic power range to provide firm contact between the bumps and electrodes to enable smooth ultrasonic power transfer across the bonding interface. Moreover, prolonged bonding time caused cracks between the bumps and flex substrate. Close examination of the fracture morphologies after die-shear testing and after ultrasonic separation provided insight into the die-shear force performance as influenced by the process parameters and by the deposition of the nickel layer on the copper electrodes over the flex substrate.     

关于LED单灯正向电压VF不良的探讨

文章基于LED芯片和LED单灯的工作原理和制程工艺,探讨了LED芯片封装以后正向电压K升高和降低的常见原因,并提出了改善措施。对于GaN基双电极芯片,由于芯片工艺制程或后续封装工艺因素,造成芯片表面镀层（ITO或Ni／Au）与P—GaN外延层之间的结合被破坏,欧姆接触电阻变大。对于GaAS基单电极芯片,由于封装材料和工艺因素,导致芯片背金（N—electrode）与银胶,或银胶与支架之间的接触电阻变大,从而LED正向电压VF升高。LED正向电压VF降低最常见的原因为芯片PN结被ESD或外界大电流损伤或软击穿,反向漏电过大,失去了二极管固有的I-V特性。     

Study of Phosphor Thermal-Isolated Packaging Technologies for High-Power White Light-Emitting Diodes

A novel packaging configuration for high-power phosphor-converting white light-emitting diodes (LEDs) application is reported. In this packaging configuration, a thermal-isolated encapsulant layer was used to separate the phosphor coating layer from the LED chip and the submount. Experimental and finite-element method simulation results proved that this thermal management can prevent the heat of LED chip from transferring to the phosphor coating layer. The surface temperature of the phosphor coating layer is a 16.8degC lower than that of the conventional packaging at 500-mA driver current for 1-mm power GaN-based LED chip. Experimental results also show that this packaging configuration can improve the light-emitting power performance and color characteristics stability of the white LED, especially under high current operating condition.