A 10–40 GHz Broadband Subharmonic Monolithic Mixer in 0.18 $mu$ m CMOS Technology

A 10–40 GHz broadband subharmonic monolithic passive mixer using the standard 0.18 $mu$ m CMOS process is demonstrated. The proposed mixer is composed of a two-stage Wilkinson power combiner, a short stub and a low-pass filter. Likewise, the mixer utilizes a pair of anti-parallel gate-drain-connected diodes to achieve subharmonic mixing mechanism. The two-stage Wilkinson power combiner is used to excite a radio frequency (RF) and local oscillation (LO) signals into diodes and to perform broadband operation. The low-pass filter supports an IF frequency range from dc to 2.5 GHz. This proposed configuration leads to a die size of less than 1.1$,times,$ 0.67 mm$^{2}$ . The measured results demonstrate a conversion loss of 15.6–17.6 dB, an LO-to-RF isolation better than 12 dB, a high 2LO-to-RF isolation of 51–59 dB over 10–40 GHz RF bandwidth, and a 1 dB compression power of 8 dBm.      

A high-performance W-band uniplanar subharmonic mixer

A uniplanar subharmonic mixer has been implemented in coplanar waveguide (CPW) technology. The circuit is designed to operate at RF frequencies of 92-96 GHz, IF frequencies of 2-4 GHz, and LO frequencies of 45-46 GHz. Total circuit size excluding probe pads and transitions is less than 0.8 mm ×1.5 mm. The measured minimum single-sideband (SSB) conversion loss is 7.0 dB at an RF of 94 GHz, and represents state-of-the-art performance for a planar W-band subharmonic mixer. The mixer is broad-band with a SSB conversion loss of less than 10 dB over the 83-97-GHz measurement band. The measured LO-RF isolation is better than -40 dB for LO frequencies of 45-46 GHz. The double-sideband (DSB) noise temperature measured using the Y-factor method is 725 K at an LO frequency of 45.5 GHz and an IF frequency of 1.4 GHz. The measured data agrees well with the predicted performance using harmonic-balance analysis (HBA). Potential applications are millimeter-wave receivers for smart munition seekers and automotive-collision-avoidance radars     

A 60-GHz uniplanar MMIC 4/spl times/ subharmonic mixer

A uniplanar GaAs monolithic microwave integrated circuit /spl times/4 subharmonic mixer (SHM) has been fabricated for 60-GHz-band applications using an antiparallel diode pair in finite ground coplanar (FGC) waveguide technology. This mixer is designed to operate at an RF of 58.5-60.5 GHz, an IF of 1.5-2.5 GHz, and an LO frequency of 14-14.5 GHz. FGC transmission-line structures used in the mixer implementation were fully characterized using full-wave electromagnetic simulations and on-wafer measurements. Of several mixer configurations tested, the best results show a maximum conversion loss of 13.2 dB over the specified frequency range with a minimum local-oscillator power of 3 dBm. The minimum upper sideband conversion loss is 11.3 dB at an RF of 58.5 GHz and an IF of 2.5 GHz. This represents excellent performance for a 4/spl times/ SHM operating at 60 GHz.     

InAlAs/InGaAs HBT X-band double-balanced upconverter

We report on an InAlAs/InGaAs HBT Gilbert cell double-balanced mixer which upconverts a 3 GHz IF signal to an RF frequency of 5-12 GHz. The mixer cell achieves a conversion loss of between 0.8 dB and 2.6 dB from 5 to 12 GHz. The LO-RF and IF-RF isolations are better than 30 dB at an LO drive of +5 dBm across the RF band. A pre-distortion circuit is used to increase the linear input power range of the LO port to above +5 dBm. Discrete amplifiers designed for the IF and RF frequency ports make up the complete upconverter architecture which achieves a conversion gain of 40 dB for an RF output bandwidth of 10 GHz. The upconverter chip set fabricated with InAlAs/InGaAs HBT's demonstrates the widest gain-bandwidth performance of a Gilbert cell based upconverter compared to previous GaAs and InP HBT or Si-bipolar IC's     

A CMOS Ku-Band 4x Subharmonic Mixer

In this work, the design and measurement of a new 4x subharmonic mixer circuit is presented using CMOS 0.18 m technology. With an RF input signal at 12.1 GHz, and an LO signal at 3.0 GHz, an intermediate frequency of 100 MHz is produced (f_IF = f_RF - 4f_LO). The mixer uses a modified Gilbert-cell topology with octet-phase LO switching transistors to perform the quadruple subharmonic mixing. Included in the design is an active balun for the RF signal and a circuit that generates an octet-phase LO signals from a differential input. The mixer has a conversion gain of approximately 6 dB, 1-dB compression point of -12 dBm, IIP3 of -2 dBm, and IIP2 of 17 dBm. The circuit also exhibits excellent isolation between its ports (e.g. LO-RF: 71 dB, 4LO-RF: 59 dB).     

Broadband single- and double-balanced resistive HEMT monolithicmixers

A double-balanced (DB) 3-18 GHz and a single-balanced (SB) 2-16 GHz resistive HEMT monolithic mixer have been successfully developed. The DB mixer consists of a AlGaAs/InGaAs HEMT quad, an active LO balun, and two passive baluns for RF and IF. At 16 dBm LO power, this mixer achieves the conversion losses of 7.5-9 dB for 4-13 GHz RF and 7.5-11 dB for 3-18 GHz RF. The SB mixer consists of a pair of AlGaAs/InGaAs HEMT's, an active LO balun, a passive IF balun and a passive RF power divider. At 16 dBm LO power, this mixer achieves the conversion losses of 8-10 dB for 4-15 GHz RF and 8-11 dB for 2-16 GHz RF. The simulated conversion losses of both mixers are very much in agreement with the measured results. Also, the DB mixer achieves a third-order input intercept (IP₃) of +19.5 to +27.5 dBm for a 7-18 GHz RF and 1 GHz IF at a LO drive of 16 dBm while the SB mixer achieves an input IP ₃ of +20 to +28.5 dBm for 2 to 16 GHz RF and 1 GHz IF at a 16 dBm LO power. The bandwidth of the RF and LO frequencies are approximately 6:1 for the DB mixer and 8:1 for the SB mixer. The DB mixer of this work is believed to be the first reported DB resistive HEMT MMIC mixer covering such a broad bandwidth     

A 23–37 GHz Miniature MMIC Subharmonic Mixer

A novel configuration of subharmonic mixer using an anti-parallel diode pair is presented for operating over the 23-37 GHz band. The monolithic microwave integrated circuit is implemented by GaAs 0.15 mum PHEMT technology with the compact size of 0.85 times 0.85 mm². This mixer employs a directional coupler, LC low-pass filter, and a short stub for isolating three ports corresponding to radio frequency (RF), local oscillation (LO) input, and intermediate frequency (IF) output ports. The directional coupler also provides impedance transformation between the diode pair, RF, and LO ports. This makes the subharmonic mixer more compact and flexible. The best conversion loss of the subharmonic mixer is 9.4 dB, and the LO-to-RF and LO-to-IF isolations are better than 22 and 31 dB, respectively.     

26-34 GHz CMOS mixer

A 26-34 GHz fully integrated CMOS down mixer is presented. At 30 GHz RF frequency and 2.5 GHz IF frequency, 50 /spl Omega/ terminations, 5 dBm LO and 1.2 V/spl times/17 mA supply power, the circuit yields a conversion loss of 2.6 dB, an SSB NF of 13.5 dB and an IIP3 of 0.5 dBm.     

一款集成驱动放大器的低变频损耗混频器设计

采用0.5μm GaAs工艺设计并制造了一款单片集成驱动放大器的低变频损耗混频器.电路主要包括混频部分、巴伦和驱动放大器3个模块.混频器的射频(RF)、本振(LO)频率为4～7 GHz,中频(IF)带宽为DC～2.5 GHz,芯片变频损耗小于7 dB,本振到射频隔离度大于35 dB,本振到中频隔离度大于27 dB.1 dB压缩点输入功率大于11 dBm,输入三阶交调点大于20 dBm.该混频器单片集成一款驱动放大器,解决了无源混频器要求大本振功率的问题,变频功能由串联二极管环实现,巴伦采用螺旋式结构,在实现超低变频损耗和良好隔离度的同时,保持了较小的芯片面积.整体芯片面积为1.1 mm×1.2 mm.     

宽中频CMOS下变频器单片

该文介绍了一种工作于毫米波频段的宽中频(IF)下变频器。该下变频器基于无源双平衡的设计架构,片上集成了射频(RF)和本振(LO)巴伦。为了优化无源下变频器的增益、带宽和隔离度性能,电路设计中引入了栅极感性化技术。测试结果表明,该下变频器的中频带宽覆盖0.5～12 GHz。在频率为30 GHz、幅度为4 dBm的LO信号驱动下,电路的变频增益为–8.5～–5.5 dB。当固定IF为0.5 GHz、LO幅度为4 dBm时,变频增益随25～45 GHz的RF信号在–7.9～–5.9 dB范围内变化,波动幅度为2 dB。LO-IF, LO-RF, RF-IF的隔离度测试结果分别优于42, 50, 43 dB。该下变频器芯片采用TSMC 90 nm CMOS工艺设计,芯片面积为0.4 mm2。     

A 0.7-7 GHz wideband reconfigurable receiver RF front-end in CMOS

In this paper,a 0.7-7 GHz wideband RF receiver front-end SoC is designed using the CMOS process.The front-end is composed of two main blocks:a single-ended wideband low noise amplifier (LNA) and an inphase/quadrature (I/Q) voltage-driven passive mixer with IF amplifiers.Based on a self-biased resistive negative feedback topology,the LNA adopts shunt-peaking inductors and a gate inductor to boost the bandwidth.The passive down-conversion mixer includes two parts:passive switches and IF amplifiers.The measurement results show that the front-end works well at different LO frequencies,and this chip is reconfigurable among 0.7 to 7 GHz by tuning the LO frequency.The measured results under 2.5-GHz LO frequency show that the front-end SoC achieves a maximum conversion gain of 26 dB,a minimum noise figure (NF) of 3.2 dB,with an IF bandwidth of greater than 500 MHz.The chip area is 1.67 × 1.08 mm2.     

A Ka Band Balanced Third LO-Harmonic Mixer Using a Lumped-Elements Quadrature Hybrid

A novel configuration of a subharmonic mixer utilizing third local oscillation (LO) harmonic is presented. The mixer is capable of down-converting a Ka-Band radio frequency (RF) signal with the third harmonic of an X-band LO signal to produce a 2 GHz intermediate frequency signal. It is fabricated on a 4 mil substrate using a 0.15 mum GaAs PHEMT process. A novel quadrature hybrid is realized by using compact lumped elements, and it is beneficial for the reduction of chip size for an LO at a relatively low frequency in this topology. This is because it does not need any bulky via holes. Compared with published subharmonic mixers, it provides a more flexible requirement for an LO source at a relatively low frequency for an overall communication system design. The measured results show that the best conversion loss is about 13.2 dB at a RF frequency of 29 GHz as a 10.5 dBm 9 GHz LO signal is pumped. The chip area of the mixer is less than 3.14 mm².     

太赫兹宽带分谐波混频器设计

太赫兹分谐波混频器的变频损耗、噪声系数等指标与基波混频器相近,且本振频率为射频频率的一半,大大 降低了本振源的设计难度和制作成本,是高性能太赫兹接收前端的关键部件。本文介绍了一种覆盖全波导带宽的太赫 兹宽带分谐波混频器的设计,对电路中射频波导至悬置带线过渡结构和本振中频双工器进行仿真和优化设计。并以 0.14~0.22THz 分谐波混频器为例进行设计和制作,测试结果表明0.14 ~0.22THz 分谐波混频器在全波导频段内最大变频 损耗低于15dB,中频3dB 带宽大于20GHz。     

An I/Q mixer with an integrated differential quadrature all-pass filter for on-chip quadrature LO signal generation

A down-conversion in-phase/quadrature (I/Q) mixer employing a folded-type topology, integrated with a passive differential quadrature all-pass filter (D-QAF), in order to realize the final down-conversion stage of a 60 GHz receiver architecture is presented in this work. Instead of employing conventional quadrature generation techniques such as a polyphase filter or a frequency divider for the local oscillator (LO) of the mixer, a passive D-QAF structure is employed. Fabricated in a 65 nm CMOS process, the mixer exhibits a voltage gain of 7-8 dB in an intermediate frequency (IF) band ranging from 10 MHz-1.75 GHz. A fixed LO frequency of 12 GHz is used to down-convert a radio frequency (RF) band of 10.25-13.75 GHz. The mixer displays a third order input referred intercept point (IIP₃) ranging from -8.75 to -7.37 dBm for a fixed IF frequency of 10 MHz and a minimum single-sideband noise figure (SSB-NF) of 11.3 dB. The mixer draws a current of 6 mA from a 1.2 V supply voltage dissipating a power of 7.2 mW.     

Design and implementation of a 94 GHz CMOS down-conversion mixer with integrated miniature planar baluns for image radar sensors

A 94 GHz down-conversion mixer for image radar sensors using standard 90 nm CMOS technology is reported. The down-conversion mixer comprises a double-balanced Gilbert cell with peaking inductors between RF transconductance stage and LO switching transistors for conversion gain (CG) enhancement and noise figure suppression, a miniature planar balun for converting the single RF input signals to differential signals, another miniature planar balun for converting the single LO input signals to differential signals, and an IF amplifier. The mixer consumes 22.5 mW and achieves excellent RF-port input reflection coefficient of ?10 to ?35.9 dB for frequencies of 87.6–104.4 GHz, and LO-port input reflection coefficient of ?10 to ?31.9 dB for frequencies of 88.2–110 GHz. In addition, the mixer achieves CG of 4.9–7.9 dB for frequencies of 81.8–105.8 GHz (the corresponding 3-dB CG bandwidth is 24 GHz) and LO–RF isolation of 37.7–47.5 dB for frequencies of 80–110 GHz, one of the best CG and LO–RF isolation results ever reported for a down-conversion mixer with operation frequency around 94 GHz. Furthermore, the mixer achieves an excellent input third-order intercept point of ?3 dBm at 94 GHz. These results demonstrate the proposed down-conversion mixer architecture is promising for 94 GHz image radar sensors.     

60 GHz double-balanced up-conversion mixer on 130 nm CMOS technology

A millimetre-wave Gilbert-cell up-conversion mixer using standard 130 nm CMOS technology is presented. This mixer has a power conversion gain of better than 2 dB and has the highest reported OP 1 dB of -5.6 dBm when driven with a LO power of 0 dBm. The LO to RF isolation are better than 37 dB for LO from 57 to 65 GHz. Microstrip lines were employed for the matching network design at the mixer output. This is believed to be the first CMOS Gilbert-cell up-conversion mixer operating in the 60 GHz frequency band using fundamental LO.     

基于GaAs肖特基二极管的330GHz接收前端技术研究

基于GaAs肖特基二极管,设计实现了310~330 GHz的接收机前端.接收机采用330 GHz分谐波混频器作为第一级电路,为降低混频器变频损耗,提高接收机灵敏度,分析讨论了反向并联混频二极管空气桥寄生电感和互感,采用去嵌入阻抗计算方法,提取了二极管的射频、本振和中频端口阻抗,实现了混频器的优化设计,提高了变频损耗仿真精度.接收机的165 GHz本振源由×6×2倍频链实现,其中六倍频采用商用有源器件,二倍频则采用GaAs肖特基二极管实现,其被反向串联安装于悬置线上,实现了偶次平衡式倍频,所设计的倍频链在165 GHz处输出约10 dBm的功率,用以驱动330 GHz接收前端混频器.接收机第二级电路采用中频低噪声放大器,以降低系统总的噪声系数.在310~330 GHz范围内,测得接收机噪声系数小于10.5 dB,在325 GHz处测得最小噪声系数为8.5 dB,系统增益为(31±1)dB.     

30-40-GHz drain-pumped passive-mixer MMIC fabricated on VLSI SOI CMOS technology

In this paper, a passive down mixer is proposed, which is well suited for short-channel field-effect transistor technologies. The authors believe that this is the first drain-pumped transconductance mixer that requires no dc supply power. The monolithic microwave integrated circuit (MMIC) is fabricated using digital 90-nm silicon-on-insulator CMOS technology. All impedance matching, bias, and filter elements are implemented on the chip, which has a compact size of 0.5 mm/spl times/0.47 mm. The circuit covers a radio frequency range from 30 to 40 GHz. At a RF frequency of 35 GHz, an intermediate frequency of 2.5 GHz and a local-oscillator (LO) power of 7.5 dBm, a conversion loss of 4.6 dB, a single-sideband (SSB) noise figure (NF) of 7.9 dB, an 1-dB input compression point of -6 dBm, and a third-order intercept point at the input of 2 dBm were measured. At lower LO power of 0 dBm, a conversion loss of 6.3 dBm and an SSB NF of 9.7 dB were measured, making the mixer an excellent candidate for low power-consuming wireless local-area networks. All results include the pad parasitics. To the knowledge of the authors, this is the first CMOS mixer operating at millimeter-wave frequencies. The achieved conversion loss is even lower than for passive MMIC mixers using leading edge III/V technologies, showing the excellent suitability of digital CMOS technology for analog circuits at millimeter-wave frequencies.     

A Common Source Input Cross Coupled Quad CMOS Mixer*

A CMOS doubly balanced mixer circuit is implemented with a source follower input and a cross coupled mixing quad. The circuit employs an all N-channel configuration and is suitable for high frequency applications. As a down-converter with an RF input of 2.0 GHz and an IF output of 200 MHz, the mixer demonstrates 9 dB of conversion loss with a corresponding input referred third order intercept of 0 dBm. As an up-converter with an IF input frequency of 400 MHz and an RF output of 2.4 GHz, the mixer demonstrates 14 dB of conversion loss.     

GaAs双栅MESFET单片行波混频器

本文根据GaAs MESFET单片行波放大器的原理,研制了一种新型宽带单片混频器.混频电路制在厚为0.1mm,面积为2.7×1.8mm的GaAs基片上,RF和LO分别通过等效特性阻抗为50Ω的G_1线和G_2线进入混频电路,且这两个频率在4个GaAs双栅MESFET(DGFET)中混频.这种MMIC混频器在中频频率为1.0GHz.射频频率在2～12GHz范围内得到约为8.5dB的变频损耗(无中频匹配电路),其平坦度约为±0.6dB.这一结果有助于进一步研究与实现单片宽带微波接收机.