硅片多线切割的温度场仿真研究

硅片切割的温度场分布对硅片表面加工质量具有十分重要的影响.以硅材多线切割的温度场为研究对象,在分析硅片多线切割工作原理的基础上,建立了数值分析模型,充分考虑了切割发热机理以及空气与切削液的冷却作用.采用参数化编程与生死单元技术,仿真分析了硅片切割的温度场分布情况,研究了线锯张力、硅材进给速度对硅片温度场分布的影响.仿真结果显示:硅切片的温升与线锯张力成正比关系,张力越大,温升越明显;进给速度对硅切片的温升曲线有一定的影响,但硅材在不同进给速度下的最终温度几乎相同.论文为研究硅片的切割变形机理、改善硅片表面质量等提供了一定的理论参考.     

硅片的双面研磨法

1.绪言近年来,随着集成电路的发展,硅的平面度(包括翘曲度和薄均匀度)就成了精加工工艺的重要问题,目前大家正在为提高硅片的平面度而努力。利用双盘研磨机研磨硅片时,靠上下盘予以加压。由于硅片的厚度与直径相比非常小,只需用很小的压力就能把翘曲的硅片压平,但不能修正它的翘曲度。因此,在切片时,有必     

硅片电火花线切割加工技术的发展

利用电火花线切割加工技术加工硅片能直接得到大尺寸、超薄硅片,且不受硅晶体晶向的影响,设备成本低,切割效率较高,因而研究和开发硅片电火花线切割加工技术是一个很有发展潜力和应用前景的课题。     

硅晶体切片设备的研究现状与进展

介绍了硅晶体切片设备的原理及关键技术.典型的切片设备包括切片机和线切割锯床两类,其原理与结构不同,适用范围也不相同.内圆切片机的刀片与主轴相连并高速旋转,同时相对工件径向进给,因为刀片与工件为刚性接触,切割大直径硅片容易碎片.线锯能切割直径较大的硅片,环形金刚石线锯切割速度高,其去除机理与磨削相似,表面损伤层较浅.线锯床增加工件自转或锯丝辅助摇摆运动,可减小锯丝受力变化量,提高切片质量.因此环形金刚石线锯切片技术将会获得更广泛应用.     

介电泳抛光方法及其电极形状的实验研究

目的验证介电泳抛光方法的有效性,研究电极形状对介电泳抛光方法均匀性、抛光效率和去除率的影响。方法选取直径76.2 mm的单晶硅片为实验对象,进行传统化学机械抛光(CMP)实验和使用4种电极形状的介电泳抛光实验,每隔30 min测量硅片不同直径上的表面粗糙度以及硅片的质量,然后对测量的数据进行处理和分析。结果与传统CMP方法比较,使用介电泳抛光方法抛光的硅片,不同直径上的表面粗糙度相差小,粗糙度下降速度快,使用直径60 mm圆电极形状介电泳抛光时相差最小,粗糙度下降最快。介电泳抛光方法去除率最低能提高11.0%,最高能提高19.5%,最高时所用电极形状为内径70 mm、外径90 mm的圆环。结论介电泳抛光方法抛光均匀性、效率和去除率均优于传统CMP方法。     

文摘

<正> 9101001 生产大直径无缝钢管用压力设备[词,苏]/А.К.Попов…∥Тяж.машиностр.-1990(1) 本文介绍的450MN压力设备主要用于生产直径530～1420mm、壁厚17～100mm、长度4～12m的无缝钢管。采用此法生产的钢管,完全能够满足国家的需求及新能源工程项目的需要。热压管车间主要包括:25     

太阳能硅片切割技术的研究

简述了太阳能硅片常用的切割方法及特点,指出电火花线切割由于其适合大厚度、超薄切割等特点,将成为太阳能硅片切割的一个研究热点.但因半导体特殊的电特性,目前常规电火花线切割工艺还不能胜任太阳能硅的切割.研究了太阳能硅材料的放电加工模型,提出了电火花线切割太阳能硅片的思路和工艺方法,并采用改进的脉冲电源首次对电阻率为2.1 Ω*cm的P型太阳能硅进行了切割试验,切割效率大于100 mm2/min.     

Φ6～450mm冷轧管机组的开发

俄罗斯EZTM重机厂开发了不同型号的Φ6～450mm冷轧管机组：还开发了三辊轧管机轧制中大直径钢管,其机架有环形牌坊、开口圆形孔型,用于咬人和旋转管坯的独立机械传动系统,并可适用于不同的轧制表;该厂还对现有的冷轧管设备进行了从单独部件到重新设计的换代升级。     

半导体硅及硅基材料研究中的几个问题

叙述了大直径硅单晶生长,计算机数值模拟以及绝缘体上硅(SOI)、锗硅(SiGe)和应变硅等硅基材料的研究进展,讨论了硅中缺陷演化、杂质特性、缺陷工程和表面与界面质量控制,展望了后摩尔时代半导体硅及硅基材料的发展前景.     

硅片化学机械抛光技术的研究进展

随着硅片厚度的增大和芯片厚度的减小，硅片在加工中的材料去除量增大，如何提高其加工效率就成了研究的热点之一。由于化学机械抛光过程复杂，抛光后硅片的质量受到多种因素的影响，主要包括抛光设备的技术参数、耗材(抛光垫和抛光液)的性质和硅片自身在抛光时的接触应力状态等。本文介绍了硅片化学机械抛光技术的研究进展，讨论了影响硅片抛光后表面质量和表面材料去除率的因素，如抛光液、抛光垫、抛光压力等，并对目前用于硅片化学机械抛光的先进设备进行了综述。      

金刚石砂轮磨削单晶硅片面形变化规律

磨削减薄过程中,硅片表面产生亚表面损伤,其中的残余应力使硅片产生翘曲变形。因此,研究无光磨磨削时的硅片面形变化规律以评价其加工质量。使用金刚石砂轮无光磨磨削厚度400μm和450μm的硅片并测量其面形。将硅片面形数据从中心向边缘沿径向分割成5个环带,分别研究其面形拟合弯曲曲率半径变化。结果显示:从中心区域到边缘区域,硅片的变形量增大,说明无光磨硅片上的残余应力变大,即磨削加工损伤增大。同时,研究还发现晶向对硅片变形有显著影响,〈110〉晶向区变形与〈100〉晶向区变形差异明显。      

Microstructure studies of the grinding damage in monocrystalline silicon wafers

1. Introduction The monocrystalline silicon wafer, as an impor-tant substrate of the integrated circuit, is widely used in IC manufacturing. Various processes are needed to transfer a silicon crystal ingot into wafers. Silicon crystallizes in the diamond lattice, with covalent bonding, ensuring an extremely stable spatial ar-rangement of the Si atoms in the monocrystal. It is a brittle material. Most processes can induce me-chanical damage. The depth and nature of the sub-surface damage will…     

热处理对硅片抗弯强度的影响

研究了热处理温度、时间及降温方式对不同氧、氮含量的氩气氛直拉硅（ＡＣＺ）及氮气氛直拉硅（ＮＣＺ）抗弯强度（σ）的影响规律。结果表明：硅氧络合物和氮硅氧络合物的生成使抗弯强度提高，沉淀的形成使强度下降。提出了既能消除热施主、又可避免强度降低的６５０℃热处理两段冷新工艺     

雾化施液抛光硅片位错的化学腐蚀形貌分析

目的研究硅片经雾化施液抛光技术加工后存在的位错缺陷。方法应用化学腐蚀法、光学方法分析硅片不同部位的位错腐蚀形貌、位错密度及其分布,通过单因素实验研究雾化参数对位错形貌和位错密度的影响规律。在相同的工艺参数下,和传统抛光进行对比实验。结果雾化抛光硅片的平均位错密度为1.2×104/cm2,边沿处的位错密度小于其他区域。在相同的工艺参数下,雾化施液CMP的抛光液消耗量约为传统CMP的1/10,但硅片的位错腐蚀形貌和位错密度明显好于传统抛光,且蚀坑分布均匀分散,没有出现位错排等严重缺陷。通过增大雾化器的出雾量能有效改善硅片表层的位错缺陷。结论相对于传统抛光,雾化施液抛光技术能更加高效地去除硅片的位错缺陷。     

Effect of surfactant on removal of particle contamination on Si wafers in ULSI

The adsorption mechanism of particle on the surface of silicon wafer after polishing or grinding whose surface force field is very strong was discussed, and the removal method of particle was studied. Particle is deposited on the wafer surface by interactions, mainly including the Van der Waals forces and static forces. In order to suppress particles depositing on the wafer surface, it is essential that the wafer surface and the particles should have the same polarity of the zeta potential. According to colloid chemistry and lots of experiments, this can be achieved by adding surfactants. Nonionic complex surfactant was used as megasonic cleaning solution, and the adsorptive state of particle on Si wafers was effectively controlled. The efficiency and effect of megasonic particle removal is greatly improved. A perfect result is also obtained in wafer cleaning.     

Ultrasonic characterization of porous silicon using a genetic algorithm to solve the inverse problem

This paper presents a method for ultrasonic characterization of porous silicon in which a genetic algorithm based optimization is used to solve the inverse problem. A one-dimensional model describing wave propagation through a water immersed sample is used in order to compute transmission spectra. Then, a water immersion wide bandwidth measurement is performed using an insertion/substitution method and the spectrum of signals transmitted through the sample is calculated using Fast Fourier Transform. In order to obtain parameters such as thickness, longitudinal wave velocity or density, a genetic algorithm based optimization is used.A validation of the method is performed using aluminium plates with two different thicknesses as references: a good agreement on acoustical parameters can be observed, even in the case where ultrasonic signals overlap.Finally, two samples, i.e. a bulk silicon wafer and a porous silicon layer etched on silicon wafer, are evaluated. A good agreement between retrieved values and theoretical ones is observed. Hypothesis to explain slight discrepancies is proposed.     

Evaluation of the wafer polishing pad capacity and lifetime in the machining of reliable elevations

The purpose of the wafer polishing process is to ensure wide planarization, uniformity, a precise surface finish and a non-defective surface. Its significance is increasing with the trend toward large-diameter wafers. The polishing pad used in these processes is an important factor that influences the wafer surface finish. Maintenance of the pad capacity plays a key role in the machining of reliable elevations. If the machining time increases, the pad capacity decreases, creating the need for a suitable shift time. A rough pad surface condition can contain microscopic holes that serve as an exhaust pathway for minute chip particles. Such particles become reaction materials on the pad surface.In this study, a dressing effect on the machining capacity, deformation degree and pad lifetime are investigated. A 300 mm silicon wafer was polished and the dressing defect and control condition were compared and analyzed with no change of the other machining conditions. The pad capacity and lifetime were evaluated in terms of the pad deformation degree, pad surface variation and silicon wafer surface finish under various pad deformation conditions. The AE (Acoustic Emission) signal of various pad surface conditions was detected using a AE sensor during the silicon wafer polishing process. The polishing process was monitored and analyzed using the AE raw signal, RMS (Root Mean Square) conversion data and FFT (Fast Fourier Transformation) analyses. The AE signal is a spontaneous elastic wave signal caused by a change in the stress condition of each material. Using a loadcell with the wafer head fixture, variations in the applied pressure signal were detected and compared while varying the condition of the pad surface and final wafer surface finish.The silicon wafer polishing process has sensitive machining characteristics due to the interaction between various complex process factors. These can include the pad, slurry, applied pressure, rotation speed, dressing condition and the machining temperature. Among these important machining factors, the pad capacity and lifetime evaluation as they pertain to the dressing control were assessed. These characteristics were investigated through an analysis of the deformation of the pad, the wafer surface finish, the detected sensor signal and the signal process.     

Residual stress analysis on silicon wafer surface layers induced by ultra-precision grinding

Grinding residual stresses of silicon wafers affect the performance of IC circuits. Based on the wafer rotation ultra-precision grinding ma-chine, the residual stress distribution along grinding marks and ground surface layer depth of the ground wafers are investigated using Raman microspectroscopy. The results show that the ground wafer surfaces mainly present compressive stress. The vicinity of pile-ups between two grinding marks presents higher a compressive stress. The stress value of the rough ground wafer is the least because the material is removed by the brittle fracture mode. The stress of the semi-fine ground wafer is the largest because the wafer surface presents stronger phase trans-formations and elastic-plastic deformation. The stress of the fine ground wafer is between the above two. The strained layer depths for the rough, semi-fine, and fine ground wafers are about 7.6 m, 2.6 m, and 1.1 m, respectively. The main reasons for generation of residual stresses are phase transformations and elastic-plastic deformation.