A 6-bit 3-Gsps ADC implemented in 1μm GaAs HBT technology

The design and test results of a 6-bit 3-Gsps analog-to-digital converter （ADC） using 1 μm GaAs het- erojunction bipolar transistor （HBT） technology are presented. The monolithic folding-interpolating ADC makes use of a track-and-hold amplifier （THA） with a highly linear input buffer to maintain a highly effective number of bits （ENOB）. The ADC occupies an area of 4.32 × 3.66 mm2 and achieves 5.53 ENOB with an effective resolution bandwidth of 1.l GHz at a sampling rate of 3 Gsps. The maximum DNL and INL are 0.36 LSB and 0.48 LSB, respectively.     

一种6-bit 3-Gsps GaAs HBT模数转换器

本文介绍了一种采用1 μm InGaP/GaAs HBT工艺实现的6-bit 3-Gsps模数转换器的设计和测试结果。这款单片折叠内插模数转换器采用高线性度的跟踪保持放大器提高了有效分辨率ENOB。该模数转换器的芯片尺寸为4.32 mm×3.66 mm。测试结果表明,该模数转换器在3-Gsps采样率的情况下,ENOB达到5.53,有效分辨率带宽为1.1 GHz,差分非线性误差和积分非线性误差的最大值分别为0.36 LSB和0.48 LSB。