Design and analysis of a sleep and wake-up CMOS low noise amplifier for 5G applications

Telecommunication Systems - This brief proposes a two-stage cascoded CMOS LNA with common drain envelope detection based power reduction method for the 5G applications of 28 GHz frequency....     

Low power VLSI architecture design of BMC,BPSC and PC schemes

Line coding is used to tune the wave form based on the properties of the physical channel. Bi-Phase Mark Coding (BMC), Bi-Phase Space Coding (BPSC) and Phase Coding (PC) are used as Line coding techniques. The first objective of the proposed work is to design Generation and Degeneration operations of BMC, BPSC and PC techniques in a single chip. The second objective is to reduce the area and power consumption, by modifying the number of MOS devices used to design the system and by adjusting the width of the MOS devices. The proposed system is designed with 59 transistors and simulated using Cadence^® 90 nm technology. This occupies 1290 µm². Required power can be reduced up to 33% by using any one of the suitable coding among BMC, BPSC and PC based on the properties of the input data signal. If the input data has equal possibility of high and low level signals, PC technique will be suitable for power reduction. If the high level beats the low level, BPSC technique will be suitable. If the low level beats the high level, BMC technique will be suitable.     

A Novel Coverage Improved Deployment Strategy for Wireless Sensor Network

Coverage of the bounded region gets importance in Wireless Sensor Network (WSN). Area coverage is based on effective surface coverage with a minimum number of sensor nodes. Most of the researchers contemplate the coverage region of interest as a square and manifest the radio ranges as a circle. The area of a circle is much higher than the area of a square because of the perimeter. To utilize the advantage of the circle, the coverage region of interest is presumed as a circle for sensor node deployment. This paper proposes a novel coverage improved disc shape deployment strategy. Comparative analysis has been observed between circle and square regions of interest based on the cumulative number of sensor nodes required to cover the entire region. A new strategy named as disc shape deployment strategy is also proposed. Traditional hexagon and strip-based deployment strategies are compared with the disc shape deployment strategy. The simulation result shows that the circle shape coverage region of interest extremely reduces the required number of sensor nodes. The proposed deployment strategy provides desirable coverage, and it requires few more sensor nodes than hexagon shape deployment strategy.

     

Survey on parameter optimization of mobile communication band low noise amplifier design

A comparative study on recent works on low noise amplifiers (LNAs) designed to be operated at mobile communication band is performed in this article. Here, specifications of different generations of mobile communication are listed, which are considered to classify recent works on LNAs. Even though gain and noise figure (NF) are the primary parameters of LNA; other parameters like power, linearity, bandwidth, and area also get importance. Due to this, optimization techniques handpicked for all those parameters are discussed. The inverse relation between gain and NF is exploited to achieve low noise and high gain together. While increasing the gain, power consumption is increased by drain current. Each LNA is found as good in terms of gain and other parameters to satisfy the requirements. The figure of merit is opted to find the performance of each LNA, and the comparison is performed. The best parameters reported in the comparison are 31.53 dB of gain, 0.7 dB of NF, 0.03 mw of power consumption, 18.14 dBm of third‐order input intercept point (IIP3), 24 GHz bandwidth and 0.0052 mm² of area at different frequencies and technology nodes. In this survey, as per the optimized FoM for mobile communication, cross‐coupled common gate differential LNA, which was designed to be operated at 0.3 to 2.96 GHz gives better results among CMOS LNAs.     

Design and analysis of 0.9 and 2.3-GHz concurrent dual-band CMOS LNA for mobile communication

A complementary metal-oxide-semiconductor (CMOS) dual-band low-noise amplifier (LNA) for 2G/3G/4G mobile communications is presented. It operates at 0.9 and 2.3 GHz of frequencies. The dual-band operation is achieved by adding a modified notch-filtering path in the wideband LNA. The modified notch-filtering path does not require additional power to cancel the signals of the stop band frequency. The impact of the filtering path in the proposed LNA is analyzed. Improved results are observed in dual bands of frequency. Sustainability of the LNA under process corner variation and temperature variation are examined, and it is found to be suitable for the application. The proposed LNA is designed at 90-nm technology in Cadence Virtuoso with 0.5 and 0.6-V supply. The post-layout simulation shows 22 dB of gain (S₂₁), 2 dB of Noise Figure (NF), and −5.5 dBm of IIP3 at the high band. In the low band, 24 dB of S₂₁, 2.7 dB of NF, and −6.65 dBm of IIP3 are reached. The circuit consumes 5.2 mW of power and 0.0918 mm² of area. The efficiency of the LNA is estimated by the figure of merit, and comparable results are secured in the proposed work.