一个3位flash ADC核设计

用CMOS反相器作比较器设计了一个3位的高速低功率flash ADC核。该ADC核可以应用到分级型和流水线型结构的ADC中,实现更高的转换位数。该3位ADC核采用Choudhury等人提出的编码方案,解决了高速ADC的编码电路问题。采用SMIC的0.35μm/3.3CMOS工艺模型,用Candence软件进行仿真,该3位ADC速度高达2Gsps,在该速度下具有0.56mW的低功率。     

一种精度可调的数字控制移相原理

介绍了一种可编程数字控制的移相原理,通过该原理可以设计一种精度可调的数字控制移相器。该原理主要通过一种倍频器倍频因子可调的方式来实现。文中设计的移相器可以在0~360°中达到任意度数的移相,其精度可以达到1°。并可通过精度控制输入信号,进一步提高精度。最后的仿真波形证实了这种原理的可行性。     

The total dose effects on the 1/f noise of deep submicron CMOS transistors

Using 0.18 μm CMOS transistors, the total dose effects on the 1/f noise of deep-submicron CMOS transistors are studied for the first time in mainland China. From the experimental results and the theoretic analysis, we realize that total dose radiation causes a lot of trapped positive charges in STI （shallow trench isolation） SiO2 layers, which induces a current leakage passage, increasing the 1/f noise power of CMOS transistors. In addition, we design some radiation-hardness structures on the CMOS transistors and the experimental results show that, until the total dose achieves 750 krad, the 1/f noise power of the radiation-hardness CMOS transistors remains unchanged, which proves our conclusion.