| 基于DSP和FPGA的GPS-B码时统终端系统设计 |
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| 引用本文： | 冯强,赵帅,李焱.基于DSP和FPGA的GPS-B码时统终端系统设计[J].微计算机信息,2010(5). |
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| 作者姓名： | 冯强 赵帅 李焱 |
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| 作者单位： | 长春光学精密机械与物理研究所;中国科学院研究生院; |
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| 摘 要： | 介绍了一种基于DSP和FPGA的GPS-B码时统终端系统的设计方案,提出了一种利用FPGA对IRIG-B码进行解码的设计方法。详细论述了具体的设计方案及软硬件的实现。通过将快速的DSP与FPGA相结合的方案,研制了一套新颖的GPS-B时统终端系统。试验表明该系统具有较高的实时性和稳定性。
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| 关 键 词： | DSP FPGA GPS IRIG-B码 时统终端 |
Design of GPS-B Code Time Terminal System Based on DSP And FPGA |
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| FENG Qiang ZHAO Shuai LI Yan.Design of GPS-B Code Time Terminal System Based on DSP And FPGA[J].Control & Automation,2010(5). |
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| Authors: | FENG Qiang ZHAO Shuai LI Yan |
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| Affiliation: | FENG Qiang ZHAO Shuai LI Yan(Changchun Institute of Optics,Fine Mechanics , Physics,Changchun130033,China)(Graduate School,Chinese Academy of Sciences,Beijing 100039,China) |
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| Abstract: | Introduce a kind of design for GPS-B Code Time Terminal system based on DSP and FPGA.A method of decoding IRIGB with the application of FPGA is presented in the paper with its realization described in details.By employing a DSP and a FPGA in the same system,a novel GPS-B code Time Terminal system is developed.Experimental tests indicate that the system has many distinct features,such as its real time and stability. |
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| Keywords: | DSP FPGA GPS IRIG-B Code Time Terminal |
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