High-performance active bandpass filter using current-feedback amplifiers

An accurate current feedback amplifier based high-Q active bandpass filter whose centre frequency is independently variable over a wide frequency range is presented. The basic circuit has the important advantage that access to the Z node of the current-feedback amplifier is not required, as is the case with many existing current-feedback amplifier filter circuits. Additionally, the circuit can be implemented with operational amplifiers, though for high Q the Q? and ω₀? variabilities are 62% better with current-feedback amplifiers than with operational amplifiers. Experimental results are presented which are in good agreement with expected theory.     

一种含理想运算放大器电路的讨论

为进一步明确含理想运算放大电路的有关概念和运算放大器的特性,本文从计算机仿真和理论分析两个方面,对一个含理想运算放大器电路的输入输出特性进行了模拟和推导.结果表明该电路在线性输入范围内是一电压跟随器,若超出线性输入范围,则输出波形严重失真;带反馈电路与开环电路相比较表现为线性输入范围扩大、电压增益减小,而这正是电路负反馈的特性.因此,不能简单的把接在运算放大器同相输入端的反馈视为正反馈.     

Improving the bandwidth gain-independence and accuracy of the current feedback amplifier

A high-performance current feedback amplifier circuit referred to as an operational current feedback amplifier is described in this paper. The technique employed involves the incorporation of the input circuit of the current feedback amplifier in the feedback loop of an operational amplifier to reduce the input impedance at the inverting terminal of the current feedback amplifier. The new circuit possesses the gain accuracy and bandwidth of the current feedback amplifier but realizes significant improvement in bandwidth accuracy and bandwidth gain-independence. Experimentally, using AD844s, an order of magnitude reduction in bandwidth variation with changing gain was achieved in the noninverting configuration and almost complete bandwidth invariance was realized in the inverting configuration.     

Operational floating conveyor

A new versatile analogue building block is described, termed an operational floating conveyor (OFC). The OFC has similar transmission properties to the current conveyor and current-feedback operational amplifier, but with a differential current output which allows accurate output current sampling. This feature improves circuit building block versatility and allows accurate closed loop current amplifiers and current convertors to be realised, including a closed loop current conveyor.<>     

二极管型非制冷红外探测器的前端电路设计

设计了一种二极管型非制冷红外探测器的前端电路,该电路采用Gm-C-OP积分放大器的结构,将探测器输出的微弱电压信号经跨导放大器(OTA)转化为电流信号,再经电容反馈跨阻放大器(CTIA)积分转化为电压信号输出。该OTA采用电流反馈型结构,可以获得比传统OTA更高的线性度和跨导值。输入采用差分结构,可以有效地消除环境温度及制造工艺对探测器输出信号的影响。电路采用0.35 m CMOS工艺进行设计并流片,5 V电源电压供电。Gm-C-OP积分放大器总面积0.012 6 mm2,当输入差分电压为0~5 mV时,测试结果表明:OTA跨导值与仿真结果保持一致,Gm-C-OP积分放大器可实现对动态输入差分信号到输出电压的线性转化,线性度达97%,输出范围大于2 V。     

Remodeling light emitting diode in low current region

A general expression is proposed for the current-voltage (I-V) characteristics of junction diode by which it is possible to determine forward voltage across diode at actual current and temperature. Expressions fur the band gap and temperature coefficient of junction voltage based on the experimental measurements are also presented. The expressions include only experimentally obtained and derived values. These expressions have been used to check the performance of logarithmic amplifier using light emitting diode (LED) as a feedback clement, at different temperatures. Further, it has been shown that it is possible to predict the behavior of a logarithmic amplifier without temperature compensation techniques within 5% accuracy for the current range 10^-12-10^-5 A and for the temperature range -5°-60°C. The alternative could be the use of temperature compensation circuitry which may make electrometer circuit more complex. The proposed scheme is useful in applications where it is difficult to incorporate temperature compensation technique and space and power are at premium     

电流型运算放大器在应用电路中的特性研究

文中简要介绍了电流型运放的特性,着重对电流型运放的应用电路进行测试,研究电流型运放的应用特性。实验中,选择典型电流型运放及电压型运放构建负阻变换器、电压跟随器和同相比例放大器,通过对此3类应用电路的测试,分析、总结运放参数对特殊应用电路的影响,为电路设计者在具体电路的设计中恰当选择适合的放大器提供参考。     

线性光耦HCNR201原理及其在轴承故障检测中的应用

因铁路货车轴承故障检测现场工况复杂,各种电磁干扰信号极易随被测信号进入测量系统.针对这个问题,设计了用高线性度模拟光耦HCNR201和运算放大器实现的电压隔离硬件电路.该电路中,线性光耦的前端用一个运算放大器构成一个负反馈放大器,用来检测模拟电压信号;线性光耦后端的运算放大器进行电流与电压之间的转换,最终输出电压信号,实现电压信号的1：1隔离传输.实验结果表明：该方法测量电压线性度好、精度高.     

Full analog CMOS integration of very large time constants for synaptic transfer in neural networks

A method for the full on-chip analog implementation of large time constants in a CMOS technology is presented. These time constants are used for delayed synaptic transfer in neural networks for signal processing. For real-time speech recognition time constants from 1 to 500 ms are necessary, that vary logarithmically with a 4-bit digital code. An RC-type circuit is used to make a continuous time implementation. A modified operational transconductance amplifier (OTA) in a negative feedback configuration is used as a resistor and a gate-oxide capacitor is used as load. The output current of the OTA is divided by current dividers to obtain an electronic multiplication of the time constant. An adapted current mirror design is applied. Much attention is paid to offset-voltage reduction. This new multiplication scheme has several important advantages compared to other schemes. A global area minimization procedure is explained. The total active are of a 3-m CMOS chip for a 500-ms time constant is 0.5 mm². The realized circuit has a typical measured offset voltage of 130 mV. The area efficiency and the offset sensitivity are shown to be one order of magnitude better than in other designs.P. Kinget is a research assistant of the National Fund for Scientific Research, Belgium.     

High-temperature characterisation and analysis of leakage-current-compensated,low-power bandgap temperature sensors

This paper presents a low-power, high-performance current-feedback instrumentation amplifier (CFIA) for portable bio-potential sensing applications. Noise analysis is performed to assign an optimized current for the input stage of the amplifier. Analysis on selecting nested chopping frequencies is performed, further reducing 1/f noise and the residual offset. Enhanced power efficiency is achieved by sharing cascode branches and using a Class-AB output stage. Through these methods, a good balance between noise performance and other parameters such as output ripples and power consumption of the ripple reduction feedback loop (RRFL) is achieved. The amplifier is developed using a 1-poly 6-metal 0.18 μm CMOS process. Three gain stages with a gain-boosting input stage provide a low-frequency, open-loop gain >250 dB. When configured to a closed-loop gain of 60 dB, the amplifier achieves a noise voltage density of 18 \({\text{nV}}/\sqrt {{\text{H}}z}\) and a 1/f noise corner of 3 Hz. With a current of 75 μA and a supply voltage of 3.3 V, a CMRR of 110 dB and a PSRR of 120 dB are achieved, with an average input offset of about 6.5 μV. The amplifier achieves a state-of-art noise efficiency factor of 4.2. Practical application of the CFIA is demonstrated with an in vivo electrocardiogram detection.     

Robust Low Power CMOS Single-Ended to Fully-Balanced Converter Circuits

In this paper two novel single-ended-input fully-balanced-output circuits (SFC), namely unbuffered and buffered SFCs, are proposed for input interface to fully balanced signal processing systems. The unbuffered SFC overcomes the drawback of uncontrollable process variations of resistors and generate well-controlled process invariant common mode output voltage, V _o,com . The adopted active current common mode feedback compensation makes this possible. Simulations using MOSIS 2 m N-well process and a 3 V supply, show that with ±100% variation, V _o,com only varies by less than ±2%. In addition, it is shown that V _o,com is accurately controlled by a preset DC voltage. On the other hand, the buffered SFC adopts a novel body effect-free class AB buffer so as to have low standby power consumption but high current driving capability. It is implemented without resistors and common-mode feedback circuitry. Measurement results from a 1.2 m N-well CMOS chip indicate a bandwidth of 5.5 MHz while driving a 40 pF load with a supply voltage of ±1.5 V. The circuit is capable of supplying more than 3 mA of output current while consuming 1.1 mW of standby power. The THD is less than –55 dB at 1 KHz and the phase error is less than 2° for frequencies up to 1 MHz.     

A composite approach for improving the DC performances of current-feedback amplifiers

A new approach for improving the performances of the increasingly popular current-feedback amplifiers is proposed. It utilizes the composite amplifier concept to null out the offset voltage and input bias current of the amplifier while the current-feedback technique is used to improve the ac performances of the overall amplification block. The new proposal is verified by extensive simulations and a prototype is also constructed. The fabricated amplifier presents excellent ac performances, such as 250-MHz bandwidth, 2.8-ns rise-time with 10-Vp-p swing, and a settling time of 19 ns to 0.1% and 25 ns to 0.02% with 10-Vp-p swing, all on a load of 100 . At the same time, the dc parameters that are the traditional problems of the current-feedback amplifiers are improved to be around 25 V offset voltage and 500-nA input bias current. The paper also presents an evaluation of the other techniques that are recently proposed to improve the dc performances of the current-feedback amplifiers so that a comparison can easily be made between the new approach and the other approaches. Both simulation results and measurements from the prototype are included in this paper.     

一种用于视频信号处理的高速宽带运算放大器

基于高速亚微米互补双极工艺,设计了一种用于视频信号处理的高速宽带运算放大器。电路内部采用高速输入差分对、电流型放大单元、Rail-to-Rail输出单元等结构进行信号传输和放大。对开环增益提升、高速电压-电流信号转换、满摆幅输出设计以及频率稳定性补偿等关键技术进行分析,利用Spectre软件进行仿真。流片后的测试结果表明,在±5 V工作电压下,该放大器的－3 dB带宽≥200 MHz,失调电压≤5 mV,电源电流≤6 mA,满足高速通信、高速ADC前端信号采集、视频信号处理等各种场合的应用需求。     

微电容超声换能器的前端专用集成电路设计

针对微电容超声换能器(CMUT)微弱电流信号检测的要求,设计了一种用于CMUT的前端专用集成电路——运算放大器(OPA)电路。运算放大器电路采用两级放大结构,第一级采用全差分折叠-共源共栅结构,输出级采用AB类控制的轨到轨输出级,在运算放大器电路反相输入端和输出端通过一个反馈电阻实现CMUT电流信号到电压信号的转换。采用GlobalFoundries 0.18μm的标准CMOS工艺进行了仿真设计和流片,芯片尺寸为226μm×75μm。仿真结果表明,运算放大器的开环增益为62 dB,单位增益带宽为30 MHz,在3 MHz处的输入参考噪声电压为2.9μV/Hz^1/2,电路采用±3.3 V供电,静态功耗为11 mW。测试结果表明仿真与实测结果相符,该运算放大器电路能够实现CMUT微弱电流信号检测功能。     

低压CMOS带隙电压基准源设计

在对传统典型CMOS带隙电压基准源电路分析和总结的基础上,综合一级温度补偿、电流反馈技术,提出了一种1-ppm/°C低压CMOS带隙电压基准源。采用差分放大器作为基准源的负反馈运放,简化了电路设计。放大器输出用作电路中PMOS电流源偏置,提高了电源抑制比(PSRR)。整个电路采用TSMC0.35μmCMOS工艺实现,采用HSPICE进行仿真,仿真结果证明了基准源具有低温度系数和高电源抑制比。     

一种新型的0．5V全差分运放的设计

提出一种新型的工作在0．5V电源电压下两级低压全差分运放,该运放结构是带有共模反馈的密勒补偿运放,拥有更强的抗噪声能力和共模电源电压抑制能力,带宽更大,提高了系统的稳定性。输入信号由晶体管的栅极加入,这点与传统的电路结构相吻合,并采用衬底自偏置解决了阈值电压对电源电压降低的限制,更易于实现。该运放结构是基于SMIC0．18μm标准CMOS工艺,HSpice仿真结果表明,这种结构的开环增益可以达到76dB,单位增益带宽150MHz。     

A Switched Opamp-Based Bandpass Filter: Design and Implementation in a 0.35 μm CMOS Technology

A fully differential SC bandpass filter (central frequency, 58 kHz; Q = 15; and voltage gain, 8) based on the switched-opamp approach is designed and implemented in this work. The filter operates from a single 1 V supply voltage and is realized in a 0.35 m CMOS technology. It has been characterized with a sampling frequency of 1 MHz and its power consumption is about 230 W. As a main internal filter component, an appropiate switched opamp was also designed. Its common-mode feedback circuit was implemented by using an error amplifier and sampling of the output common-mode voltage is carried out by applying a DC offset to level shift the common-mode sample. It provides an accurate common-mode output for a wide temperature and supply voltage ranges.     

An integratable second-order compensated bandgap reference for 1V supply

A new systematic approach is used for the design of bandgap references. A linear combination of two base-emitter voltages is taken to compensate implicitly for the temperature behavior of these base-emitter voltages. To reach optimum circuit performance with respect to accuracy and power, systematic design procedures are used. The realized bandgap reference circuit is completely integratable and operates from a supply voltage of only 1V. The output voltage is approximately 194 mV and has an average temperature dependency of 1.5ppm/°C in the range of 0°C to 100°C. The circuit has been realized in a bipolar process withf _t 5 GHz. The total amount of capacitance is approximately 150 pF and the current consumption is about 100µA.     

Low voltage bandgap reference with closed loop curvature compensation

A new low-voltage CMOS bandgap reference (BGR) that achieves high temperature stability is proposed. It feeds back the output voltage to the curvature compensation circuit that constitutes a closed loop circuit to cancel the logarithmic term of voltage VBE. Meanwhile a low voltage amplifier with the 0.5μm low threshold technology is designed for the BGR. A high temperature stability BGR circuit is fabricated in the CSMC 0.5μm CMOS tech-nology. The measured result shows that the BGR can operate down to 1 V, while the temperature coefficient and line regulation are only 9 ppm/℃ and 1.2 mV/V, respectively.     

Design of Readout Circuit Based on Probe Neural Biosensor

According to the characteristics of neural signal,a low-voltage and high-speed operational transconductance amplifier has been realized as a direct readout circuit. To reduce the size and cost of this chip, the amplifier uses feedforward compensation technique without Miller capacitor. Using capacitors as a closed-loop feedback not only amplifies the neural signal, but also reduces chip power consumption by replacing the feedback resistor. Simulations were carried out with 0.18m CMOS technology, and the simulation results satisfied the requirements of neural signal.