一个新型CMOS电流模带隙基准源

介绍了一个新型电流模带隙基准源,该带隙基准源的输出基准可以设计为任意大于硅材料的带隙电压（1.25V）的电压,避免在应用中使用运算放大器进行基准电压放大. 同时该结构消除了传统电流模带隙基准源的系统失调. 该带隙基准源已通过UMC 0.18μm混合信号工艺验证. 在1.6V电源电压下,该带隙基准源输出145V的基准电压,同时消耗27μA的电流. 在不采用曲率补偿的情况下,输出基准的温度系数在30℃ 到150℃的温度范围内可以达到23ppm/℃. 在电源电压从1.6变化到3V的情况下,带隙基准源的输入电压调整率为2.1mV/V. 该带隙基准源在低频（10Hz）的电源电压抑制比为40dB. 芯片面积（不包括Pads）为0.088mm2.     

一个新型CMOS电流模带隙基准源

介绍了一个新型电流模带隙基准源,该带隙基准源的输出基准可以设计为任意大于硅材料的带隙电压(1.25V)的电压,避免在应用中使用运算放大器进行基准电压放大.同时该结构消除了传统电流模带隙基准源的系统失调.该带隙基准源已通过UMC 0.18μm混合信号工艺验证.在1.6V电源电压下,该带隙基准源输出1.45V的基准电压,同时消耗27μA的电流.在不采用曲率补偿的情况下,输出基准的温度系数在30℃到150℃的温度范围内可以达到23ppm/℃.在电源电压从1.6变化到3V的情况下,带隙基准源的输入电压调整率为2.1mV/V.该带隙基准源在低频(10Hz)的电源电压抑制比为40dB.芯片面积(不包括Pads)为0.088mm2.     

一个电压接近1V 10ppm/℃带曲率补偿的CMOS带隙基准源

介绍了一个带曲率补偿的低电压带隙基准源.由于采用电流模结构,带隙基准源的最低电源电压为900mV.通过VEB线性化补偿技术,带隙基准源在0到150℃的温度范围内的温度系数为10ppm/℃.在电源电压为1.1V时,电源电流为43μA,低频的PSRR为55dB.该带隙基准源已通过UMC 0.18μm混合信号工艺验证,芯片面积为0.186mm2.     

一个电压接近1V 10ppm/℃带曲率补偿的CMOS带隙基准源

介绍了一个带曲率补偿的低电压带隙基准源.由于采用电流模结构,带隙基准源的最低电源电压为900mV.通过VEB线性化补偿技术,带隙基准源在0到150℃的温度范围内的温度系数为10ppm/℃.在电源电压为1.1V时,电源电流为43μA,低频的PSRR为55dB.该带隙基准源已通过UMC 0.18μm混合信号工艺验证,芯片面积为0.186mm2.     

高性能带隙基准电压源的设计

本文基于带隙基准电压源的工作原理,实现了一种利用PATA电流产生基准电压的高性能带隙基准源。该带隙基准源温度特性良好,具有较高精度的输出电压,所以使电源管理芯片的工作电压具有更小的温度系数,使芯片工作更稳定。利用Candance仿真器,基于CSMCO．5umCMOSI艺对电路进行仿真,对基准源进行仿真与分析。仿真结果表明,当R2=316时,基准电压有最好的温度特性;并运用cadence软件中的“Calculator”工具计算出在该温度时,带隙基准电压源有最小的温漂系数。     

基于LDO电压调整器的带隙基准电压源设计

设计一款应用于电压调整器（LDO）的带隙基准电压源。电压基准是模拟电路设计必不可缺少的一个单元模块,带隙基准电压源为LDO提供一个精确的参考电压,是LDO系统设计关键模块之一。本文设计的带隙基准电压源采用0.5μm标准的CMOS工艺实现。为了提高电压抑制性,采用了低压共源共栅的电流镜结构,并且在基准内部设计了一个运算放大器,合理的运放设计进一步提高了电源抑制性。基于Cadence的Spectre进行前仿真验证,结果表明该带隙基准电压源具有较低的变化率、较小的温漂系数和较高的电源抑制比,其对抗电源变化和温度变化特性较好。     

一种高精度CMOS带隙基准电压源设计

介绍了带隙基准电压源的基本原理,设计了一种高精度带隙基准电压源电路.该电路采用中芯国际半导体制造公司0.18 μm CMOS工艺.Hspice仿真表明,基准输出电压在温度为-10～120 ℃时,温度系数为6.3×10-6/℃,在电源电压为3.0～3.6 V内,电源抑制比为69 dB.该电压基准在相变存储器芯片电路中,用于运放偏置和读出/写驱动电路中所需的高精度电流源电路.     

CMOS带隙基准源研究现状

带隙基准源是集成电路中的重要单元,输出不随温度、电源电压变化的基准电压或电流.简单介绍了CMOS带隙基准源的基本工作原理;指出了限制其性能的主要因素;分析了低电源电压、低功耗、高精度和高PSRR四种类型的CMOS带隙基准源.     

一种基于LDO稳压器的带隙基准电压源设计

设计了一种结构简单的基于LDO稳压器的带隙基准电压源.由于目前LDO芯片的面积越来越小,所以在传统带隙基准电压源的基础上,对结构做了简化及改进,在简化设计的同时获得了高的性能.该带隙基准使用三极管作为运算放大器的输入,同时省去了多余的等效二极管,并将此结构应用于LDO结构中.对带隙基准的仿真结果表明,在5 V的电源下,产生25×10-6/℃温度系数的带隙基准电压.低频时电源抑制比为138dB.将该带隙基准结合缓冲器应用于LDO稳压器中,对LDO的仿真结果表明,负载特性良好,相位裕度为63.3度.线性负载率也符合要求.此电路简单可行,可适用于各种LDO芯片中.     

LED显示屏的恒流驱动电路的设计

介绍了一种LED显示屏的恒流驱动电路,该电路包括输出控制部分电源电压的低压差线性稳压器、产生多路基准电压的带隙基准电压源、误差放大器、缓冲器、多个大功率MOS管以及取样MOS管五个部分,并且重点介绍了其中的低压差线性稳压器和带隙基准电压源的具体实现电路,能够更好的减少振荡,提高精度。通过上述恒流驱动电路为多路LED提供恒定的0.4V的驱动电流。     

Development of the readout system for waveguide multilayer optical card

Waveguide multilayer optical card （WMOC） is a novel storage device of three-dimensional optical information. An advanced readout system fitting for the WMOC is introduced in this paper. The hardware mainly consists of the light source for reading, WMOC, motorized stages addressing unit, microscope imaging unit, CCD detecting unit and PC controlling ＆ processing unit. The movement of the precision motorized stage is controlled by the computer through Visual Basic （VB） language in software. A control panel is also designed to get the layer address and the page address through which the position of the motorized stages can be changed. The WMOC readout system is easy to manage and the readout result is directly displayed on computer monitor.     

Nanoimprint Lithography -A Next Generation High Volume Lithography Technique

IntroductionNanoimprint Lithography is a well-acknowl-edged low cost, high resolution, large area pattern-ing process. It includes the most promising methods,high-pressure hot embossing lithography (HEL) [2],UV-cured imprinting (UV-NIL) [3] and micro contactprinting (m-CP, MCP) [4]. Curing of the imprintedstructures is either done by subsequent UV-lightexposure in the case of UV-NIL or by cooling downbelow the glass transition temperature of the ther-moplastic material in case of HEL…     

Collinear phase-matching study of terahertz-wave generation via difference frequency mixed in GaAs and Inp

The collinearly phase-matching condition of terahertz-wave generation via difference frequency mixed in GaAs and InP is theoretically studied. In collinear phase-matching, the optimum phase-matching wave hands of these two crystals are calculated. The optimum phase-matching wave bands in GaAs and lnP are 0.95-1.38μm and 0.7-0.96μm respectively. The influence of the wavelength choice of the pump wave on the coherent length in THz-wave tuning is also discussed. The influence of the temperature alteration on the phase-matching and the temperature tuning properties in GaAs crystal are calculated and analyzed. It can serve for the following experiments as a theoretical evidence and a reference as well.     

Effects of the alloy compositions on the phonon-polaritons in ternary mixed crystals

Composition dependence of bulk and surface phonon-polaritons in ternary mixed crystals are studied in the framework of the modified random-element-isodisplacement model and the Bom-Huang approximation. The numerical results for Several Ⅱ - Ⅵ and Ⅲ- Ⅴ compound systems are performed, and the polariton frequencies as functions of the compositions for ternary mixed crystals AlxGa1-xAs, GaPxAS1-x, ZnSxSe1-x, GaAsxSb1-x, GaxIn1-xP, and ZnxCd1-xS as examples are given and discussed. The results show that the dependence of the energies of two branches of bulk phonon-polaritons which have phonon-like characteristics, and surface phonon-polaritons on the compositions of ternary mixed crystals are nonlinear and different from those of the corresponding binary systems.     

Influence of PVK ： NPB hole transporting layer on the characteristics of organic light-emitting devices

A doping system consisting of NPB and PVK is employed as a composite hole transporting layer （CHTL）. By adjusting the component ratio of the doping system, a series of devices with different concentration proportion of PVK ： NPB are constracted. The result shows that doping concentration of NPB enhances the competence of hole transporting ability, and modifies the recombination region of charge as well as affects the surface morphology of doped film. Optimum device with a maximum brightness of 7852 cd/m^2 and a power efficiency of 1.75 lm/W has been obtained by choosing a concentration proportion of PVK ： NPB at 1：3.     

New insert layer structure OLEDs

An insert layer structure organic electroluminescent device（OLED） based on a new luminescent material （Zn（salen）） is fabricated. The configuration of the device is ITO/CuPc/NPD/Zn（salen）/Liq/LiF/A1/CuPc/NPD/Zn（salen）/Liq/LiF/A1. Effective insert electrode layers comprising LiF（1nm）/Al（5 nm） are used as a single semitransparent mirror, and bilayer cathode LiF（1 nm）/A1（100 nm） is used as a reflecting mirror. The two mirrors form a Fabry-Perot microcavity and two emissive units. The maximum brightness and luminous efficiency reach 674 cd/m^2 and 2.652 cd/A, respectively, which are 2.1 and 3.7 times higher than the conventional device, respectively. The superior brightness and luminous efficiency over conventional single-unit devices are attributed to microcavity effect.     

Analysis of error performance on Turbo coded FDPIM

Due to variable symbol length of digital pulse interval modulation（DPIM）, it is difficult to analyze the error performances of Turbo coded DPIM. To solve this problem, a fixed-length digital pulse interval modulation（FDPIM） method is provided. The FDPIM modulation structure is introduced. The packet error rates of uncoded FDPIM are analyzed and compared with that of DPIM. Bit error rates of Turbo coded FDPIM are simulated based on three kinds of analytical models under weak turbulence channel. The results show that packet error rate of uncoded FDPIM is inferior to that of uncoded DPIM. However, FDPIM is easy to be implemented and easy to be combined, with Turbo code for soft-decision because of its fixed length. Besides, the introduction of Turbo code in this modulation can decrease the average power about 10 dBm, which means that it can improve the error performance of the system effectively.     

A method for calculating the center position of collimated light

It is a key problem to accurately calculate beam spots＇ center of measuring the warp by using a collimated laser. A new method, named double geometrical center method （DGCM）, is put forward for the first time. In this method, a plane wave perpendicularly irradiates an aperture stop, and a charge couple device （CCD） is employed to receive the diffraction-beam spots, then the geometrical centers of the fast and the second diffraction-beam spots are calculated respectively, and their mean value is regarded as the center of datum beam. In face of such adverse instances as laser intension distributing defectively, part of the image being saturated, this method can still work well. What＇s more, this method can detect whether an unacceptable error exits in the courses of image receiving, processing and calculating. The experimental results indicate the precision of this method is high.     

Resolution Enhancement Technology:Integrated Process Solutions using OPC

DUV lithography, using the 248 nm wavelength, is a viable manufacturing option for devices with features at 130 nm and less. Given the low kl value of the lithography, integrated process development is a necessary method for achieving acceptable process latitude. The application of assist features for rule based OPC requires the simultaneous optimization of the mask, illumination optics and the resist.Described in this paper are the details involved in optimizing each of these aspects for line and space imaging.A reference pitch is first chosen to determine how the optics will be set. The ideal sigma setting is determined by a simple geometrically derived expression. The inner and outer machine settings are determined, in turn,with the simulation of a figure of merit. The maximum value of the response surface of this FOM occurs at the optimal sigma settings. Experimental confirmation of this is shown in the paper.Assist features are used to modify the aerial image of the more isolated images on the mask. The effect that the diffraction of the scattering bars (SBs) has on the image intensity distribution is explained. Rules for determining the size and placement of SBs are also given.Resist is optimized for use with off-axis illumination and assist features. A general explanation of the material' s effect is discussed along with the affect on the through-pitch bias. The paper culminates with the showing of the lithographic results from the fully optimized system.     

Cost-effective test solutions for smart card and other integrated flash applications

From its emergence in the late 1980s as a lower cost alternative to early EEPROM technologies, flash memory has evolved to higher densities and speedsand rapidly growing acceptance in mobile applications.In the process, flash memory devices have placed increased test requirements on manufacturers. Today, as flash device test grows in importance in China, manufacturers face growing pressure for reduced cost-oftest, increased throughput and greater return on investment for test equipment. At the same time, the move to integrated flash packages for contactless smart card applications adds a significant further challenge to manufacturers seeking rapid, low-cost test.