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1.
This letter presents an integrated direct-injection locked quadrature voltage controlled oscillator (VCO), consisted of a 5-GHz VCO integrated with injection locked LC frequency dividers for low-power quadrature generation. The circuit is implemented using a standard 0.18-mum CMOS process. The differential VCO is a full PMOS Colpitts oscillator, and the frequency divider is performed by adding an injection nMOS between the differential outputs of complementary cross-coupled np-core LC VCO. The measurement results show that at the supply voltage of 1.8-V, the master 5-GHz VCO is tunable from 4.73 to 5.74GHz, and the slave 2.5-GHz VCO is tunable from 2.36 to 2.87GHz. The measured phase noise of master VCO is -118.2dBc/Hz while the locked quadrature output phase noise is -124.4dBc/Hz at 1-MHz offset frequency, which is 6.2dB lower than the master VCO. The core power consumptions are 7.8 and 8.7mW at master and slave VCOs, respectively  相似文献   

2.
In this paper, a novel circuit topology of voltage-controlled oscillators (VCOs) suitable for ultra-low-voltage operations is presented. By utilizing the capacitive feedback and the forward-body-bias (FBB) technique, the proposed VCO can operate at reduced supply voltage and power consumption while maintaining remarkable circuit performance in terms of phase noise, tuning range, and output swing. Using a standard 0.18-mum CMOS process, a 5.6-GHz VCO is designed and fabricated for demonstration. Consuming a dc power of 3 mW from a 0.6-V supply voltage, the VCO exhibits a frequency tuning range of 8.1% and a phase noise of -118 dBc/Hz at 1-MHz offset frequency. With an FBB for the cross-coupled transistors, the fabricated circuit can operate at a supply voltage as low as 0.4 V. The measured tuning range and phase noise are 6.4% and -114 dBc/Hz, respectively  相似文献   

3.
A low voltage multiband all-pMOS VCO was fabricated in a 0.18-/spl mu/m CMOS process. By using a combination of inductor and capacitor switching, four band (2.4, 2.5, 4.7, and 5 GHz) operation was realized using a single VCO. The VCO with an 1-V power supply has phase noises at 1-MHz offset from a 4.7-GHz carrier of -126 dBc/Hz and -134 dBc/Hz from a 2.4-GHz carrier. The VCO consumes 4.6 mW at 2.4 and 2.5 GHz, and 6 mW at 4.7 and 5 GHz, respectively. At 4.7 GHz, the VCO also achieves -80 dBc/Hz phase noise at 10-kHz offset with 2 mW power consumption.  相似文献   

4.
A novel low-voltage quadrature voltage-controlled oscillator (QVCO) with voltage feedback to the input gate of a switching amplifier is proposed and implemented using the standard TSMC 0.18-mum CMOS 1P6M process. The proposed circuit topology is made up of two low-voltage LC-tank VCOs, where the coupled QVCO is obtained using the transformer coupling technique. At the 0.7-V supply voltage, the output phase noise of the VCO is -124.9 dBc/Hz at 1-MHz offset frequency from the carrier frequency of 2.4GHz, and the figure of merit is -185.35dBc/Hz. Total power consumption is 5.18 mW. Tuning range is about 135 MHz while the control voltage was tuned from 0 to 0.7V  相似文献   

5.
A fully integrated 5.8 GHz CMOS L-C tank voltage-controlled oscillator (VCO) using a 0.18-/spl mu/m 1P6M standard CMOS process for 5 GHz U-NII band WLAN application is presented. The VCO core circuit uses only PMOS to pursue a better phase noise performance since it has less 1/f noise than NMOS. The measurement is performed by using a FR-4 PCB test fixture. The output frequency of the VCO is from 5860 to 6026 MHz with a 166 MHz tuning range and the phase noise is -96.9 dBc/Hz at 300 kHz (or -110 dBc/Hz at 1 MHz) with V ctrl = 0 V. The power consumption of the VCO excluding buffer amplifiers is 8.1 mW at V/sub DD/ = 1.8 V and the output power is -4 dBm.  相似文献   

6.
A 5-GHz fully integrated full PMOS low-phase-noise LC VCO   总被引:1,自引:0,他引:1  
A 5-GHz fully integrated, full PMOS, low-phase-noise and low-power differential voltage-controlled oscillator (VCO) is presented. This circuit is implemented in a 0.35-/spl mu/m four-metal BiCMOS SiGe process. At 2.7-V power supply voltage and a total power dissipation of only 13.5 mW, the proposed VCO features a worst case phase noise of -97 dBc/Hz and -117 dBc/Hz at 100 kHz and 1 MHz frequency offset, respectively. The oscillator is tuned from 5.13 to 5.68 GHz with a tuning voltage varying from 0 to 2.7 V.  相似文献   

7.
This paper reports a 94 GHz CMOS voltage-controlled oscillator (VCO) using both the negative capacitance (NC) technique and series-peaking output power and phase noise (PN) enhancement technique. NC is achieved by adding two variable LC networks to the source nodes of the active circuit of the VCO. NMOSFET varicaps are adopted as the required capacitors of the LC networks. In comparison with the conventional one, the proposed active circuit substantially decreases the input capacitance (Cin) to zero or even a negative value. This leads to operation (or oscillation) frequency (OF) increase and tuning range (TR) enhancement of the VCO. The VCO dissipates 8.3 mW at 1 V supply. The measured TR of the VCO is 91~96 GHz, close to the simulated (92.1~96.7 GHz) and the calculated one (92.2~98.2 GHz). In addition, at 1 MHz offset from 95.16 GHz, the VCO attains an excellent PN of – 98.3 dBc/Hz. This leads to a figure-of-merit (FOM) of ?188.5 dBc/Hz, a remarkable result for a V- or W-band CMOS VCO. The chip size of the VCO is 0.75 × 0.42 mm2, i.e. 0.315 mm2.  相似文献   

8.
A multiphase oscillator suitable for 15/30-GHz dual-band applications is presented. In the circuit implementation, the 15-GHz half-quadrature voltage-controlled oscillator (VCO) is realized by a rotary traveling-wave oscillator, while frequency doublers are adopted to generate the quadrature output signals at the 30-GHz frequency band. The proposed circuit is fabricated in a standard 0.18-mum CMOS process with a chip area of 1.1times1.0 mm2. Operated at a 2-V supply voltage, the VCO core consumes a dc power of 52 mW. With a frequency tuning range of 250 MHz, the 15-GHz half-quadrature VCO exhibits an output power of -8 dBm and a phase noise of -112 dBc/Hz at 1-MHz offset frequency. The measured power level and phase noise of the 30-GHz quadrature outputs are -16 dBm and -104 dBc/Hz, respectively  相似文献   

9.
A novel circuit topology for low-phase-noise voltage controlled oscillators (VCOs) is presented in this letter. By employing a PMOS cross-coupled pair with a capacitive feedback, superior circuit performance can be achieved especially at higher frequencies. Based on the proposed architecture, a prototype VCO implemented in a 0.18-/spl mu/m CMOS process is demonstrated for K-band applications. From the measurement results, the VCO exhibits a 510-MHz frequency tuning range at 20GHz. The output power and the phase noise at 1-MHz offset are -3dBm and -111dBc/Hz, respectively. The fabricated circuit consumes a dc power of 32mW from a 1.8-V supply voltage.  相似文献   

10.
使用0.18μm1.8VCMOS工艺实现了U波段小数分频锁相环型频率综合器,除压控振荡器(VCO)的调谐电感和锁相环路的无源滤波器外,其他模块都集成在片内。锁相环采用了带有开关电容阵列(SCA)的LC-VCO实现了宽频范围,使用3阶MASHΔ-Σ调制技术进行噪声整形降低了带内噪声。测试结果表明,频率综合器频率范围达到650~920MHz;波段内偏离中心频率100kHz处的相位噪声为-82dBc/Hz,1MHz处的相位噪声为-121dBc/Hz;最小频率分辨率为15Hz;在1.8V工作电压下,功耗为22mW。  相似文献   

11.
A 2 V 1.8 GHz fully integrated CMOS dual-loop frequency synthesizer is designed in a standard 0.5 /spl mu/m digital CMOS process for wireless communication. The voltage-controlled oscillator (VCO) required for the low-frequency loop is designed using a ring-type VCO and achieves a tuning range of 89% from 356 to 931 MHz and a phase noise of -109.2 dBc/Hz at 600 kHz offset from 856 MHz. With an active chip area of 2000/spl times/1000 /spl mu/m/sup 2/ and at a 2 V supply voltage, the whole synthesizer achieves a tuning range from 1.8492 to 1.8698 GHz in 200 kHz steps with a measured phase noise of -112 dBc/Hz at 600 kHz offset from 1.86 GHz. The measured settling time is 128 /spl mu/s and the total power consumption is 95 mW.  相似文献   

12.
薛兵  高博  路小龙  龚敏  陈昶 《微电子学》2015,45(1):23-25, 31
基于65 nm CMOS标准工艺库,设计了一个工作频率在10 GHz的具有低相位噪声的CMOS电感电容型压控振荡器。该压控振荡器选用CMOS互补交叉耦合型电路结构,采用威尔逊型尾电流源负反馈技术来降低相位噪声。仿真结果表明,此压控振荡器工作频率覆盖范围为9.9~11.2 GHz,调谐范围为12.3%,中心频率为10.5 GHz,在频率偏移中心频率1 MHz下的相位噪声为-113.3 dBc/Hz,核心功耗为2.25 mW。  相似文献   

13.
A 1-V CMOS frequency synthesizer is proposed for wireless local area network 802.11a transceivers using a novel transformer-feedback voltage-controlled oscillator (VCO) for low voltage and a stacked frequency divider for low power. Implemented in a 0.18-mum CMOS process and operated at 1-V supply, the VCO measures a phase noise of -140.5 dBc at an offset of 20 MHz with a center frequency of 4.26 GHz and a power consumption of 5.17 mW. Its tuning range is as wide as 920 MHz (23%). By integrating the VCO into a frequency synthesizer, a phase noise of -140.1 dBc/Hz at an offset of 20 MHz is measured at a center frequency of 4.26 GHz. Its output frequency can be changed from 4.112 to 4.352 GHz by switching the 3-bit modulus of the programmable divider. The synthesizer consumes only 9.7 mW and occupies a chip area of 1.28 mm2.  相似文献   

14.
A new concept for quadrature coupling of LC oscillators is introduced and demonstrated on a 5-GHz CMOS voltage-controlled oscillator (VCO). It uses the second harmonic of the outputs to couple the oscillators. The technique provides quadrature over a wide tuning range without introducing any increase in phase noise or power consumption. The VCO is tunable between 4.57 and 5.21 GHz and has a phase noise lower than -124 dBc/Hz at 1-MHz offset over the entire tuning range. The worst-case measured image rejection is 33 dB. The circuit draws 8.75 mA from a 2.5-V supply.  相似文献   

15.
A 25-GHz monolithic voltage controlled oscillator (VCO) has been designed and fabricated in a commercial InGaP/GaAs heterojunction bipolar transistor (HBT) process. This balanced VCO has a novel topology using a feedback /spl pi/-network and a common-emitter transistor configuration. Ultra-low phase noise is achieved: -106 dBc/Hz and -130 dBc/Hz at 100kHz and 1-MHz offset frequency, respectively. To the authors' knowledge, this is the lowest phase noise achieved in a monolithic microwave integrated circuit (MMIC) VCO at such high frequency. The single-ended output power is -1 dBm. It can be tuned between 25.33GHz and 25.75GHz using the base-collector junction capacitor of the HBT as a varactor. The dc power consumption is 90mW for a 9-V supply. An excellent figure-of-merit of -195 dBc/Hz is obtained.  相似文献   

16.
A novel voltage controlled oscillation (VCO) topology using 90-m CMOS technology is demonstrated. The common-source PMOS single transistor integrated with an inductor leads to negative resistance for the VCO that minimizes the transistor size and decreases the flicker noise sources. To our knowledge, the topology of the core VCO is the most compact configuration ever reported. The fabricated VCO consumes 6.26mW with a supply voltage of 1 V and has a 1.68times1.41 mm2 chip area, including the ESD protection circuit. At 1.77 GHz, PMOS VCO features an output power in the range of -5.2 dBm, and exhibits a phase noise of -94 dBc/Hz at the offset frequency of 300 kHz and -107 dBc/Hz at 1MHz  相似文献   

17.
A 5-GHz dual-path integer-$N$ Type-II phase-locked loop (PLL) uses an LC voltage-controlled oscillator and softly switched varactors in an overlapped digitally controlled integral path to allow a large fine-tuning range of approximately 160 MHz while realizing a low susceptibility to noise and spurs by using a low $K_{rm VCO}$ of 3.2 MHz/V. The reference spur level is less than $-$70 dBc with a 1-MHz reference frequency and a total loop-filter capacitance of 26 pF. The measured phase noise is $-$75 and $-$115 dBc/Hz at 10-kHz and 1-MHz offsets, respectively, using a loop bandwidth of approximately 30 kHz. This 0.25-${hbox{mm}}^{2}$ PLL is fabricated in a 90-nm digital CMOS process and consumes 11 mW from a 1.2-V supply.   相似文献   

18.
This paper presents an ultra low power consumption 65 GHz LC-VCO dedicated to wireless high data rate applications. It is designed in a 65 nm CMOS SOI process, which improves passive devices behavior. The proposed VCO achieves a frequency tuning range (FTR) of 9.7 % and a phase noise of ?110.86 dBc/Hz at 10 MHz of the carrier. All integrated passive components (including transmission lines and a transformer-based balun) are modeled using advanced electromagnetic (EM) field solvers. The power consumption of the proposed VCO is as low as 1.1 mW when biased by a 0.8-V supply voltage. The FoM of this millimeter wave circuit, whose core occupies a silicon footprint of only 0.047 mm2, is ?184.07 dBc/Hz.  相似文献   

19.
A fully integrated 10-GHz-band voltage-controlled oscillator (VCO) has been designed and fabricated using commercial 0.18-/spl mu/m CMOS technology. The complementary cross-coupled differential topology is adopted in the design. The measured phase-noise is around -89 dBc/Hz at the offset frequency of 100 kHz from the center frequency of 9.83 GHz, the output frequency tuning range of the fabricated VCO is 1.1 GHz ranging from 9.3 to 10.4 GHz, and the power consumption of the core VCO circuit is 5.8 mW. The design is the first one that adopts the complementary cross-coupled circuit structure for 10-GHz-band oscillators, and whose performances of the VCO are the best ones for 10-GHz-band oscillators, compared with the 10-GHz-band CMOS oscillators reported earlier.  相似文献   

20.
A 4.8-GHz LC voltage-controlled oscillator (VCO) optimized for maximum tuning range was designed and fabricated using 0.25-/spl mu/m 1P5M CMOS process. The optimized design used an inverse proportionality between the two parasitic capacitances of the inductor and the MOS transistors for minimizing the parasitic capacitance at the oscillation node. The fabricated LC VCO has a wide tuning range of 20.3% from 4.32 GHz to 5.3 GHz with a power dissipation of 7.3 mW. This tuning range performance is comparable to, or better than, those of the reported CMOS LC VCOs in 5-GHz band. The measured phase noise is -82 dBc/Hz and -114.6 dBc/Hz at 100 KHz and 1-MHz offset, respectively.  相似文献   

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