A 0.7 V 6.66–9.36 GHz wide tuning range CMOS LC VCO with small chip size

The circuit designs are based on TSMC 0.18 μm CMOS standard technology model. The designed circuit uses transformer coupling technology in order to decrease chip area and increase the Q value. The switched-capacitor topology array enables the voltage-controlled oscillator (VCO) to be tuned between 6.66 and 9.36 GHz with 4.9 mW power consumption at supply voltage of 0.7 V, and the tuning range of the circuit can reach 33.7%. The measured phase noise is ?110.5 dBc/Hz at 1 MHz offset from the carrier frequency of 7.113 GHz. The output power level is about ?1.22 dBm. The figure-of-merit and figure-of-merit-with-tuning range of the VCO are about ?180.7 and ?191.25 dBc/Hz, respectively. The chip area is 0.429 mm² excluding the pads. The presented ultra-wideband VCO leads to a better performance in terms of power consumption, tuning range, chip size and output power level for low supply voltage.     

A wide-range 22-GHz LC-based CMOS voltage-controlled oscillator

This work presents a novel voltage-controlled oscillator (VCO) design and simulations that combine a varactor bank with a transformer in the LC tank to achieve a high-frequency range. While the varactor bank is responsible for changing the capacitance in the LC tank, the transformer acts as a means to change the value of the inductance, hence allowing tune-ability in the two main components of the VCO. A control mechanism utilises a mixed-mode circuit consisting of comparators and a state machine. It allows efficient tuning of the VCO by controlling the capacitance and transformer in the LC tank. The VCO has a 10.75–22.43 GHz frequency range and the VCO gain, K_VCO, is kept at a low value ranging from 98.6 to 175.7 MHz/V. The simulated phase noise is ?111 dBc/Hz at 1 MHz offset from the 10.75 GHz oscillation frequency. The circuit is designed and simulated in 28 nm CMOS technology and uses a 1 V supply drawing a typical power of 14.74 mW.     

Design of self-bias tail transistor technique for low phase noise CMOS VCO with harmonic suppression using capacitance ground

This paper presents a low phase noise wideband CMOS VCO based on the self-bias tail transistor technique and harmonic suppression using a capacitance ground. This VCO utilizes switching capacitor arrays in which four channels are able to be selected for multi-band application. Moreover, the design of CMOS VCO makes good use of the self-bias tail transistor and capacitance ground filter technique to reduce the phase noise. The MOS varactors are used as fine tuning for wideband operating application. The fully integrated VCO provides excellent performance with high FOM −193 dBc/Hz. The bandwidth of the frequency is 1.1 GHz and the tuning range is 13.8%. The power dissipation of the core circuit is 8.28 mW under a 1.8 V supply and phase noise is measured as low as −123.6 dBc/Hz at 1 MHz offset under 8.5 GHz oscillation frequencies. This VCO was made by the TSMC 0.18 μm 1P6M CMOS standard process and the chip area is 0.75×0.69 (mm²).     

An ultra low power consumption millimeter-wave voltage controlled oscillator in a 65 nm CMOS-SOI technology

This paper presents an ultra low power consumption 65 GHz LC-VCO dedicated to wireless high data rate applications. It is designed in a 65 nm CMOS SOI process, which improves passive devices behavior. The proposed VCO achieves a frequency tuning range (FTR) of 9.7 % and a phase noise of ?110.86 dBc/Hz at 10 MHz of the carrier. All integrated passive components (including transmission lines and a transformer-based balun) are modeled using advanced electromagnetic (EM) field solvers. The power consumption of the proposed VCO is as low as 1.1 mW when biased by a 0.8-V supply voltage. The FoM of this millimeter wave circuit, whose core occupies a silicon footprint of only 0.047 mm², is ?184.07 dBc/Hz.     

Switched inductor dual-band CMOS cross-coupled VCO

This letter proposes a high-performance CMOS dual-band voltage-controlled oscillator (VCO). The VCO consists of two cross-coupled VCOs coupled by a pair of switched inductors or LC resonators to vary the resonator’s inductance. A pair of nMOSFET is used to switch high- and low-frequency bands. The VCO operates at the high-band using low resonator’s inductance and the VCO operates at the low-band using large inductance. The proposed VCO has been implemented with the TSMC 0.18 μm 1P6M CMOS technology and it can generate differential signals in the frequency range of 5.6–6.66 GHz and 4.13–4.75 and it also has comparable high output voltage swings at both low and high-frequency bands. The die area of the dual-band VCO is 0.84 × 1.1 mm². At the supply voltage of 0.75 V, the high (low)-band figure of merit is ?193.6 (?192.3) dBc/Hz.     

A low power current-reuse LC-VCO with an adaptive body-biasing technique

This work presents a low-power low-phase noise current-reuse LC voltage controlled oscillator (VCO) with an adaptive body-biasing technique that enhances the reliability of the proposed circuit under process, voltage, and temperature (PVT) variations. Furthermore, the supply voltage and power consumption of the proposed VCO are reduced by the start-up oscillation condition that is provided by the adaptive body-biased circuit. This property is in fact very interesting from the power management perspective. The proposed VCO works at carrier frequency of 1.8 GHz and draws the power of only 306 µW from a 0.9 V supply. It achieves phase noise of −123.36 dBc/Hz at 1 MHz offset and provides a figure-of-merit (FoM) of −193.61 dBc/Hz. The post-layout simulation results of designed VCO in 0.18 µm standard CMOS technology confirm the effectiveness of the proposed circuit.     

应用于IMT-A和UWB系统的0.13μm CMOS宽带压控振荡器设计

基于TSMC 0.13μm CMOS工艺设计并实现了应用于IMT-Advanced和UWB系统的双频段宽带频率合成器中的电感电容压控振荡器(LC-VCO)。此压控振荡器的设计采用了开关电流源、开关交叉耦合对和噪声滤波等技术,以优化电路的相位噪声,功耗,振荡幅度,调谐范围等性能。为达到宽的调谐范围,核心电路采用了4比特可重构的开关电容调谐阵列。整个芯片包括焊盘面积为1.11′0.98 mm₂。测试结果表明,在1.2V电源电压下,两个频段压控振荡器所消耗的电流分别为3mA和4.5mA,压控振荡器的调谐范围为3.86~5.28GHz和3.14~3.88GHz。在振荡频率3.5GHz和4.2GHz上,1MHz频偏处,压控振荡器的相位噪声分别为-123dBc/Hz与-119dBc/Hz。     

An integrated 0.38–6 GHz, 9–12 GHz fully differential fractional-N frequency synthesizer for multi-standard reconfigurable MIMO communication application

A wide-band fully differential fractional-N frequency synthesizer for multi-standard application is presented. The single fully differential LC–VCO with 28.5 % tuning rang and a set of dividers, quadrature self-mixer are designed to accomplish the multi-frequency bands with the frequency band from 0.38 to 6 GHz and from 9.0 to 12 GHz. It covers several wireless standards. A novel high isolation multiplexer is presented to achieve the frequency band selection. This chip was implemented with 65 nm CMOS technology and the maximum consumption is 20.05 mA from 1.2 V power supply. It occupies an active area of 1.5 mm². The measured typical phase noise of the frequency synthesizer is ?114.6 dBc/Hz from 1 MHz offset for 4.85 GHz output.     

Power efficient Ka-band low phase noise VCO in 0.13 μm CMOS

A 27 GHz cross-coupled LC voltage controlled oscillator (VCO) using a standard 0.13 mum CMOS technology is presented. The VCO using a high-Q LC resonator with a micro-strip inductor (mu-strip L) provides a phase noise of -113 dBc/Hz at a 1 MHz offset frequency. The figure - of-merit (FoM) is -194.6 dBc/Hz. To obtain high output power, it also uses a common source amplifier as a buffer and it shows the output power of -3.5 dBm at an oscillation frequency of 26.89 GHz. This is believed to be the lowest phase noise and FoM with the highest output power of a millimetre-wave VCO in CMOS technology.     

Design of a new low-phase-noise millimetre-wave quadrature voltage-controlled oscillator

This paper presents a new circuit topology of millimetre-wave quadrature voltage-controlled oscillator (QVCO) using an improved Colpitts oscillator without tail bias. By employing an extra capacitance between the drain and source terminations of the transistors and optimising circuit values, a low-power and low-phase-noise (PN) oscillator is designed. For generating the output signals with 90° phase difference, a self-injection coupling network between two identical cores is used. The proposed QVCO dissipates no extra dc power for coupling, since there is no dc-path to ground for the coupled transistors and no extra noise is added to circuit. The best figure-of-merit is ?188.5, the power consumption is 14.98–15.45 mW, in a standard 180-nm CMOS technology, for 58.2 GHz center frequency from 59.3 to 59.6 GHz. The PN is ?104.86 dBc/Hz at 1-MHz offset.     

5-GHz CMOS LC VCOs with wide tuning ranges

A 4.8-GHz LC voltage-controlled oscillator (VCO) optimized for maximum tuning range was designed and fabricated using 0.25-/spl mu/m 1P5M CMOS process. The optimized design used an inverse proportionality between the two parasitic capacitances of the inductor and the MOS transistors for minimizing the parasitic capacitance at the oscillation node. The fabricated LC VCO has a wide tuning range of 20.3% from 4.32 GHz to 5.3 GHz with a power dissipation of 7.3 mW. This tuning range performance is comparable to, or better than, those of the reported CMOS LC VCOs in 5-GHz band. The measured phase noise is -82 dBc/Hz and -114.6 dBc/Hz at 100 KHz and 1-MHz offset, respectively.     

A 1.9-GHz CMOS VCO with micromachined electromechanically tunablecapacitors

This paper presents a 1.9-GHz CMOS voltage-controlled oscillator (VCO) where the resonant circuit consists of micromachined electromechnically tunable capacitors and a bonding wire inductor. The tunable capacitors were implemented in a MUMP's polysilicon surface micromachining process. These devices have a nominal capacitance of 2.1 pF and a quality factor (Q-factor) of 9.3 at 1.9 GHz. The capacitance is variable from 2.1 pF to 2.9 pF within a 4-V control, voltage range. The active circuits were fabricated in a 0.5-μm CMOS process. The VCO was assembled in a ceramic package where the MUMP's and CMOS dice were bonded together. The experimental VCO achieves a phase noise of -98 dBc/Hz and -126 dBc/Hz at 100 kHz and 600 kHz offsets from the carrier, respectively. The tuning range of the VCO is 9%. The VCO circuit and the output buffer consume 15 mW and 30 mW from a 2.7-V power supply, respectively     

Low Phase Noise Differential Vackar VCO in 0.18 CMOS Technology

In this letter, we present the measured performance of a differential Vackar voltage-controlled oscillator (VCO) implemented for the first time in CMOS technology. The Vackar VCO provided good isolation between the LC tank and the loss-compensating active circuit; thus, excellent frequency stability was achieved over the frequency tuning range. The Vackar VCO was implemented using nMOS transistors and an LC tank in a 0.18 $mu{rm m}$ RF CMOS process. The oscillation frequency ranged from 4.85 to 4.93 GHz. The measured phase noise of the Vackar VCO at 1 MHz offset was $-124.9 ~{rm dB}/{rm Hz}$ at 4.9 GHz with a figure-of-merit (FOM) of $-188 ~{rm dBc}/{rm Hz}$.      

LC-VCO design optimization at 1/f 2 phase noise performance in 65 nm CMOS technology

A way of analytical calculation in the phase noise modeling of the LC-VCO topology without tail current resource is proposed. The noise current imported by the MOS channel is modeled to give approximate evaluation, and the period of the transistor noise is included in the model. Phase noise introduced by the tank loss resistance is also modeled to evaluate the circuit phase noise performance. The circuit has been implemented in a 65 nm CMOS technology. The chip occupies 951 × 705 um² areas with the buffer and pads. The test result indicates that the VCO core consumes 1.125 mW with a 1.2 V power supply, the frequency of the VCO baseband is from 1.258 to 1.37 GHz, and the multiband frequency is from 0.86 to 1.37 GHz. The best performance of the LC-VCO shows a phase noise of ?129.57 dBc/Hz at 1 MHz offset frequency from a 1.3 GHz carrier, resulting in an excellent FoM of ?191.27 dBc/Hz.     

LC-VCOs using spiral inductors with single- and dual-layer patterned floating shields: a comparative study

This letter studies and compares class-B VCOs using spiral inductors with the proposed dual-layer patterned floating shield (DL-PFS) and conventional single-layer patterned floating shield (SL-PFS). The proposed DL-PFS technique utilizes two lowest metal layers to effectively reduce the capacitive induced current to the substrate in an on-chip spiral inductor, thereby boosts its Q-factor by 40% when compared with the conventional SL-PFS approach. We fabricated, as a proof of concept, the class-B LC-VCOs using the DL-PFS and SL-PFS in 0.13 µm CMOS. Operating at 10 GHz, the VCO with the DL-PFS inductor measures a 3.6 dB phase noise (PN) improvement at the same power consumption of 2.12 mW. Specifically, the VCO with DL-PFS inductor is tunable from 9.3-to-10.1 GHz and measured PN at 10 GHz is ?132.5 dBc/Hz at 10 MHz offset while consuming 2.12 mW at the lowest 0.6 V supply. The achieved figure-of-merit (187.4 dBc/Hz@1 MHz offset) compares favorably with the recent state-of-the-art.     

A fully integrated multi-band ED-mode pHEMT VCO using variable transformer and switched resonator

A systematic approach to the design of a reconfigurable LC-coupled voltage-controlled oscillator (VCO) is proposed in this article. The focus is on the choice of the reactive elements of the resonance tank which are most suitable to switch to the desired oscillation frequencies. The optimum Q of the tank will be determined by the selected component. We report a 0.5-µm enhancement–depletion (ED) mode pHEMT (HEMT, high-electron mobility transistor) multiple-frequency VCO, and the generation of multiple frequencies are achieved using switched resonator topology. LC-tank circuit is built by square transformers. By careful selection of the reactive elements, evenly distributed results showed at each designed band. The multi-band ED-mode pHEMT VCO showed the output power of ?4.7?dBm for 2?GHz band, ?6.67?dBm for 3.86?GHz band and ?5.9?dBm for 4.5?GHz band, respectively. The phase noises at 1?MHz offset frequency from carrier were ?112.8?dBc/Hz for 2?GHz, ?105?dBc/Hz for 3.86?GHz and ?103.3?dBc/Hz for 4.5?GHz, respectively. The total chip size is only 1.17?×?0.83?mm².     

Wide tuning-range CMOS VCO based on a tunable active inductor

In this paper, a wide tuning-range CMOS voltage-controlled oscillator (VCO) with high output power using an active inductor circuit is presented. In this VCO design, the coarse frequency is achieved by tuning the integrated active inductor. The circuit has been simulated using a 0.18-µm CMOS fabrication process and presents output frequency range from 100 MHz to 2.5 GHz, resulting in a tuning range of 96%. The phase noise is –85 dBc/Hz at a 1 MHz frequency offset. The output power is from –3 dBm at 2.55 GHz to +14 dBm at 167 MHz. The active inductor power dissipation is 6.5 mW and the total power consumption is 16.27 mW when operating on a 1.8 V supply voltage. By comparing this active inductor architecture VCO with general VCO topology, the result shows that this topology, which employs the proposed active inductor, produces a better performance.     

基于电感电容振荡器的电荷泵锁相环的设计

设计并实现了一种采用电感电容振荡器的电荷泵锁相环,分析了锁相环中鉴频/鉴相器(PFD)、电荷泵(CP)、环路滤波器(LP)、电感电容压控振荡器(VCO)的电路结构和设计考虑。锁相环芯片采用0.13μm MS&RF CMOS工艺制造。测试结果表明,锁相环锁定的频率为5.6～6.9 GHz。在6.25 GHz时,参考杂散为-51.57 dBc;1 MHz频偏处相位噪声为-98.35 dBc/Hz;10 MHz频偏处相位噪声为-120.3 dBc/Hz;在1.2 V/3.3 V电源电压下,锁相环的功耗为51.6 mW。芯片总面积为1.334 mm2。     

4.2GHz 1.8V CMOS LC压控振荡器

基于Hajimiri提出的VCO相位噪声模型,分析了差分LC VCO电路参数对于相位噪声的影响。根据前面的分析,详细介绍了LC VCO电路的设计方法:包括高Q值片上电感的设计、变容MOS管的设计以及尾电流的选取。采用SMIC 0.18μm 1P6 M、n阱、混合信号CMOS工艺设计了一款4.2GHz 1.8V LC VCO。测试结果表明:当输出频率为4.239GHz时,频偏1MHz处的相位噪声为-101dBc/Hz,频率调节范围为240MHz。     

基于90nmCMOS工艺的低功耗宽带压控振荡器设计

A low power VCO with a wide tuning range and low phase noise has been designed and realized in a standard 90 nm CMOS technology. A newly proposed current-reuse cross-connected pair is utilized as a negative conductance generator to compensate the energy loss of the resonator. The supply current is reduced by half compared to that of the conventional LC-VCO. An improved inversion-mode MOSFET(IMOS) varactor is introduced to extend the capacitance tuning range from 32.8% to 66%. A detailed analysis of the proposed varactor is provided. The VCO achieves a tuning range of 27–32.5 GHz, exhibiting a frequency tuning range(FTR) of 18.4%and a phase noise of –101.38 d Bc/Hz at 1 MHz offset from a 30 GHz carrier, and shows an excellent FOM of –185d Bc/Hz. With the voltage supply of 1.5 V, the core circuit of VCO draws only 2.1 m A DC current.