16位逐次逼近A/D转换器熔丝误差修调技术

提出了一种提高16位逐次逼近(SAR)A/D转换器精度的熔丝误差修调技术。该技术用于提高A/D转换器内部核心模块—16位DAC的精度,从而达到提高整个A/D转换器精度的目的。电路采用标准CMOS工艺流片。测试结果显示,熔丝误差修调后,常温下,电路的INL为2.5 LSB,SNR为88.8 dB,零点误差EZ为1.1 LSB;修调后,A/D转换器有效位数ENOB从12.56位提高到14.46位。     

采用熔丝修调技术的高精度电流舵D/A转换器

高精度D/A转换器的实际精度往往低于理论上的精度。针对这个长期困扰的难题,在设计16位D/A转换器的过程中,提出了一种熔丝修调技术,即通过修调电流源输出端的电流,有效地减小电流源失配和有限输出阻抗对D/A转换器的DNL和INL的影响,大幅度提高D/A转换器的精度。基于0.18 μm CMOS 工艺的测试结果表明:在采用熔丝修调技术前,该电路的DNL和INL分别为－0.72~9.07 LSB和－5.55~18.1 LSB;在采用熔丝修调技术后,该电路的DNL和INL分别为－3.95~0.70 LSB和1.94~8.06 LSB。当输入信号频率为102 MHz、采样频率为500 MHz时,SFDR达到82.16 dBc,完全满足D/A转换器高精度的要求。     

基于ADC的温度自适应修调电路的设计

利用逐次逼近型A/D转换器及数字逻辑电路,设计了一种用于RTC的温度自适应晶振频率修调电路.该修调系统依据芯片所用晶体的温度特性曲线,对标称频率为32.768 kHz的晶体进行随温度变化的频率调整.该电路采用CSMC 0.5 μm CMOS工艺,可对晶振频率进行-192.150～+192.150(×10-6)的修正,频率修调范围为±6.396 Hz;在-40℃～85℃范围内,时钟精度可达到±1.525×10-6;在3.3 V电压下,静态电流为13.5 μA.     

一种用于温补晶振的EEPROM修调电路设计

设计了一种用于温度补偿晶体振荡器(TCXO)的数字修调电可擦除只读存储器(EEPROM)电路.该电路具有正常工作模式和RAM WRITE、EEPROM WRITE、EEPROM READ三种测试模式,用于TCXO中模拟补偿电压的修调.在SMIC 0.35μm工艺下,采用HSPICE工具对设计的电路进行了仿真与验证,结果表明该电路具有可靠性高和功耗低的优点.     

采用双R-2R电阻网络结构的12位电压型D/A转换器

介绍了采用双R-2R电阻网络结构实现12位电压输出型D/A转换器的设计及激光修调方案.重点分析了运放失调电压对双R-2R电阻网络结构D/A转换器线性误差的影响,并与其他常见的实现双极性电压输出的R-2R电阻网络结构进行比较,给出了理论估计和仿真结果.采用双R-2R电阻网络实现的12位D/A转换器芯片(不包括运放)在带CrSi电阻的8μm CMOS工艺上流片和修调测试.电阻网络芯片和运放芯片采用厚膜混合工艺组装,实现电压输出D/A转换器功能.测试结果显示,设计的电路达到了预期目标.     

L波段五位数字移相器的宽带自动修调

以 L 波段五位数字移相器的宽带自动修调为例 ,介绍了激光自动修调系统的组成和工作过程 ,讨论了移相器的可修调设计和修调算法的设计。激光自动修调技术可用于多种微波电路 ,可以缩短调试时间 ,降低生产成本 ,满足大批量生产的要求。     

一种用于高速14位A/D转换器的采样/保持电路

介绍了一种采用0.35 μm CMOS工艺的开关电容结构采样/保持电路.电路采用差分单位增益结构,通过时序控制,降低了沟道注入电荷的影响;采用折叠共源共栅增益增强结构放大器,获得了要求的增益和带宽.经过电路模拟仿真,采样/保持电路在80 MSPS、输入信号(Vpp)为2 V、电源电压3 V时,最大谐波失真为-90 dB.该电路应用于一款80 MSPS 14位流水线结构A/D转换器.测试结果显示:A/D转换器的DNL为0.8/-0.9 LSB,INL为3.1/-3.7 LSB,SNR为70.2 dB,SFDR为89.3 dB.     

适用于片内集成的可修调低失调LDO

提出了一种新型可修调低失调LDO电路,该电路适于片内集成应用.现有的修调方法一般直接作用在反馈网络中,修调电路的自身失调会造成修调精度损失.本文提出一种失调隔离模块,以大大减小修调电路引入的误差.仿真结果表明,在修调电路发生10％的电流失调时,输出电压仅变化0.31％,使LDO输出电压的修调获得很好的线性度.     

一种3.3 V 9位50 MS/s CMOS流水线A/D转换器

设计了一种3.3 V 9位50 MS/s CMOS流水线A/D转换器。该A/D转换器电路采用1.5位/级,8级流水线结构。相邻级交替工作,各级产生的数据汇总至数字纠错电路,经数字纠错电路输出9位数字值。仿真结果表明,A/D转换器的输出有效位数(ENOB)为8.712位,信噪比(SNR)为54.624 dB,INL小于1 LSB,DNL小于0.6 LSB,芯片面积0.37 mm2,功耗仅为82 mW。     

不用激光修调的高速12位D／A转换器

传统的集成12位D/A转换器要求用精密的薄膜电阻网络和电阻的激光修调技术。本文介绍的分段设计技术只需要采用常规的高速双极数字IC工艺,采用扩散电阻方法,不需要微调技术,就能保证其D/A的单调性。它比用激光修调的R—2R薄膜电阻网络结构的12位D/A转换器具有更均匀的台阶尺寸,其电阻的精度要求也比后者放宽了8倍;由于内部采用了ECL电路的结构形式,工作速度快,其建立时间在80～100ns。     

应用于TCXO的新型五次方电压发生器的设计

采用VIS 0.40 μm BCD工艺,设计并实现了一种带有修调技术的应用于温度补偿晶体振荡器(TCXO)的新型五次方电压发生器电路,该五次方电压发生器电路主要由五次方电压产生电路与修调电路两部分构成.其中,五次方电压产生电路采用曲线拟合技术,相较于传统的乘法器级联结构具有更高的精度;新型修调电路用来改变五次方电压发生器的系数,采用双路开关技术提高了修调结果的精度.仿真结果显示,该五次方电压发生器的最大拟合误差为1.2％.测试结果显示,采用该新型五次方电压发生器电路设计的TCXO,其频率-温度稳定度达到(±0.45)×10-6,相位噪声为-135 dBc/Hz@1 kHz,芯片面积为2 782 μm×2 432 μm.     

多功能有源激光微调机的系统设计

针对厚膜混合集成电路的功能微调需求,设计了一种多功能有源激光微调机。通过在线测量不同的产品参数,可实现多功能激光微调,其中包括输出电压修调,保护电流修调和信号电路调整(调测占空比、频率和相位)。本文重点介绍了多功能有源激光微调机的控制系统,通过分析测量步长和减速精度对修调精度和修调效率的影响,进而提出了自动修调方法中兼顾精度和效率的参数设置方法。多功能有源激光微调机很好地满足了国内厚膜混合集成电路功能微调需求。     

可集成于AC-DC转换器的带修调高性能振荡器

提出了一种适用于反激式AC-DC芯片的高效、可修调振荡器电路。相对于传统的振荡器,增加了一块模式控制电路,通过检测负载反馈端电压,可灵活选择两种不同的工作模式,产生不同频率,从而实现芯片在所有负载下都可以保持较高的工作效率。修调电路可以对主电容充放电电流进行调节,实现频率抖动,从而减小EMI的影响。利用华润上华0.8μm 40V高压BCD工艺,对提出的电路进行仿真验证。结果表明,所有负载下变换器转换效率均可达到85%,负载变化时,频率可变范围为22～66kHz,修调电路实现4%的频率抖动。     

Trimming process and temperature variation in second-order bandgap voltage reference circuits

This paper presents the design and experimental performance of a second-order bandgap voltage reference integrated circuit (IC). Experimentally observed nominal reference voltage at room temperature is 1.150 V with best temperature performance of 3 mV variation over −40 to 120 °C. A 5-bit resistor trimming is used to compensate the variation of reference voltage due to layout mismatch and process variation. A trimming methodology is described in this paper to optimize both the temperature performance and reduce the variation of the room temperature voltage over different samples. Even with best temperature performance trim-code, the absolute variation in reference voltage over 20 samples is 85 mV which is trimmed to ±11 mV (1.3%) using the proposed trimming methodology. The second-order bandgap circuit is designed in a 0.5 μm BiCMOS process with less than 50 μA current consumption.     

Sub-1-μA dynamic reference voltage generator forbattery-operated DRAMs

A new reference voltage generator with ultralow standby current of less than 1 μA is proposed. The features are: 1) a merged scheme of threshold voltage difference generator and voltage-up converter with current mirror circuits, and 2) intermittent activation technique using self-refresh clock for the DRAM. This combination enables the average current to be reduced to 1/100 and the resistance of trimming resistor to be reduced to 1/10 compared to conventional reference voltage generators, while maintaining high accuracy and high stability. The proposed circuit was experimentally evaluated with a test device fabricated using 0.3-μm process. An initial error of less than 4% for 6 trimming steps of the trimming resistor, temperature dependence of less than 370 ppm/°C from room temperature to 100°C, and output noise of less than 12 mV for 1 V_p-p V_cc bumping are achieved. These results are sufficient for achieving high-density battery operated DRAMs with low active and data-retention currents comparable to SRAMs     

LVDS I/O interface for Gb/s-per-pin operation in 0.35-μm CMOS

This paper presents the design and the implementation of input/output (I/O) interface circuits for Gb/s-per-pin operation, fully compatible with low-voltage differential signaling (LVDS) standard. Due to the differential transmission technique and the low voltage swing, LVDS allows high transmission speeds and low power consumption at the same time. In the proposed transmitter, the required tolerance on the dc output levels was achieved over process, temperature, and supply voltage variations with neither external components nor trimming procedures, by means of a closed-loop control circuit and an internal voltage reference. The proposed receiver implements a dual-gain-stage folded-cascode architecture which allows a 1.2-Gb/s transmission speed with the minimum common-mode and differential voltage at the input. The circuits were implemented in a 3.3-V 0.35-μm CMOS technology in a couple of test chips. Transmission operations up to 1.2 Gb/s with random data patterns and up to 2 Gb/s in asynchronous mode were demonstrated. The transmitter and receiver pad cells exhibit a power consumption of 43 and 33 mW, respectively     

An analog trimming circuit based on a floating-gate device

The application of floating-gate elements as adjustable components in analog CMOS circuits such as amplifiers is proposed. A simple trimming circuit based on this principle and delivering a differential current is described. Experimental results of a differential difference amplifier (DDA) containing two such circuits are given. After trimming, an offset voltage of 10 μV and a nonlinearity of 0.1% are achieved. Other analog circuits based on floating-gate elements like adjustable voltage sources and transconductances have been realized. Because they can be electrically reprogrammed, a wide range of applications, for example in neural nets, are possible     

一种高精度电压检测电路的设计方法

随着电路系统工作电压的逐步降低,留给电压检测电路的可检测区间逐渐缩小,因此对其提出了更高的电压检测精度要求。该文对影响电压检测精度的各种因素进行分析,得出一般电压检测电路的检测精度,在此基础上结合目前实际应用情况提出了一种高精度电压检测电路的设计方法:trimming,并针对这种方法给出两种电路实现方案,用以提高电压检测电路的精度,通过此方法实现的电路设计理论上电压检测精度可达±5mV(不包含基准电压随温度变化引起的电压检测电路随温度变化量)。     

Indirect current feedback instrumentation amplifier with acommon-mode input range that includes the negative roll

An instrumentation amplifier which can handle common-mode voltages that extend 200 mV below the negative supply is presented. The extended range is combined with a common-mode rejection of 92 dB and an accuracy of 0.1%, without the need for on-chip trimming. This has been achieved by the use of two p-n-p V-to-f converters in an indirect current feedback configuration. The output voltage can reach the negative supply. The offset voltage is 0.3 mV, and the noise voltage is 30 nV/√Hz. The circuit operates at supply voltages down to 2.5 V, and the quiescent current is 240 μA. The instrumentation amplifier has been integrated in a semicustom bipolar process