新结构高性能In_（0．3）Ga_（0．7）As／In_（0．29）Al_（0．

新结构高性能Ｉｎ_（０．３）Ｇａ_（０．７）Ａｓ／Ｉｎ_（０．２９）Ａｌ_（０．７１）Ａｓ／ＧａＡｓＨＥＭＴ研究证明，ＩｎＧａＡｓＨＥＭＴ的结构优于ＧａＡｓＭＥＳＦＥＴ和习用的ＡｌＧａＡｓ／ＧａＡｓＨＥＭＴ。在ＧａＡｓ上制备的赝配结构ＨＥＭＴ（ＰＭ－ＨＥ...     

HEMT结构材料中二维电子气的输运性质研究

本文通过变温的Ｈａｌ测量系统地研究了ＧａＡｓ基ＨＥＭＴ和ＰＨＥＭＴ以及ＩｎＰ基ＨＥＭＴ三种结构材料的电子迁移率μｎ和二维电子浓度ｎｓ．仔细地分析了不同ＨＥＭＴ结构材料的散射机制对电子迁移率的影响以及不同ＨＥＭＴ材料结构对电子浓度的影响．研究结果表明ＩｎＰ基ＨＥＭＴ的ｎｓ×μｎ值比ＧａＡｓ基ＨＥＭＴ和ＰＨＥＭＴ的ｎｓ×μｎ值都大,说明可以用ｎｓ×μｎ值来判断ＨＥＭＴ结构材料的性能好坏．     

InP基HEMT／HBT器件工艺的最新进展

目前ＧａＡｓ基低噪声ＨＥＭＴ，包括用于ＤＢＳ的ＩｎＧａＡｓ／Ｎ－ＡｌＧａＡｓＰＨＥＭＴ已经商品化，且ＧａＡｓ基功率ＨＢＴ也将很快进入市场。尽管ＩｎＰ基ＨＥＭＴ或ＨＢＴ仍处于研究与发展阶段，但由于它们特殊的电性能，它们将有希望成为下一代异质结构器件。在继续改进器件结构和工艺过程中，晶格生长工艺的改进激发了一种新的趋势，提出并实现了一种用ＩｎＰ做有源层的新型器件结构。这篇文章主要描述了这样一种ＩｎＰ基ＨＥＭＴ和ＨＢＴ器件结构的最新进展。     

分子束外延生长InGaAs/GaAs异质结及其在独特场效应晶体管中的应用

用分子束外延技术生长了ＩｎＧａＡｓ／ＧａＡｓ异质结材料,并用ＨＡＬＬ效应法和电化学Ｃ－Ｖ分布研究其特性。讨论了ＩｎＧａＡｓ／ＧａＡｓ宜质结杨效应晶体管（ＨＦＥＴ）的优越性。和ＧａＡｓ ＭＥＳＦＥＴＳ或ＨＥＭＴ相比,由于ＨＦＥＴ没有Ａｌ组份,具有低温特性好,低噪声和高增益等特点。本文研究了具有ＩｎＧａＡｓ／ＧａＡｓ双沟道和独特掺杂分布的低噪声高增益ＨＦＥＴ。     

InP基HEMT／HBT器件工艺的最新进展

目前ＧａＡｓ基低噪声ＨＥＭＴ，包括用ＤＢＳ的ＩｎＧａＡｓ／Ｎ－ＡｌＣａＡｓＰＨＥＭＴ已经商品化，且ＧａＡｓ基功率ＨＢＴ也将很快进入市场。尽管ＩｎＰ基ＨＥＭＴ或ＨＢＴ仍处于研究与发展阶段，但由于它们特殊的电性能，它们将有希望成为下一代异质结构器件。在继续改进器件结构和工艺过程中，晶格生长工艺的改进激发了一种新的趋势，提出并实现了一种用ＩｎＰ做有源层的新型器件结构。这篇文章主要描述了这样一种ＩｎＰ基Ｈ     

δ掺杂的赝配HEMTAlGaAs／InGaAs／GaAs结构的光电流谱

本文首次报道了δ掺杂的赝配高电子迁移率晶体管结构（ＨＥＭＴＳ）Ａｌ０．３０Ｇａ０．７０Ａｓ／Ｉｎ０．１５Ｇａ０．８５Ａｓ／ＧａＡｓ的光电流谱研究．实验观察到了ｎ＝１重空穴子带到ｎ＝１电子子带和ｎ＝２电子子带的激子吸收峰以及ＧａＡｓ本征吸收相位变化所引起的光电流结构，并对光电流谱随温度和偏压变化的行为进行了讨论．     

δ掺杂的赝形HEMTs AlGaAs／InGaAs／GaAs傅里叶变换光致发光光谱

本文首次报道了δ掺杂的赝形高电子迁移率晶体管结构（ＨＥＭＴｓ）Ａｌ０．３０Ｇａ０．７０Ａｓ／Ｉｎ０．１５Ｇａ０．８５Ａｓ／ＧａＡｓ中的傅里叶变换光致发光光谱．观察到了ｎ＝１电子子带和ｎ＝２电子子带到ｎ＝１重空穴子带的强发光峰以及ｎ＝２电子子带到浅受主的弱发光峰，由于费米能级处在高于ｎ＝２电子子带的位置上，没有观察到属于费米边的发光峰，证实了理论上所预言的δ掺杂ＨＥＭＴＳ系统具有转移效率高的优点．     

AlGaAs－InGaP／GaAs HBT，f_T高达245GHz

ＡｌＧａＡｓ－ＩｎＧａＰ／ＧａＡｓ　ＨＢＴ，ｆ_Ｔ高达２４５ＧＨｚ《ＩＥＥＤＩＪ》１９９３年第１２期报道了一种新的ＨＢＴ，采用ＡＩＧａＡｓ－ＩｎＧａＰ发射区结构。该结构在发射极形成一个电子发射器，产生速度过冲效应。它一方面增强了发射极输运，同时减少了?..     

InP衬底上的InGaAs／InP双沟道HEMT

本文讨论了一种新型ＨＥＭＴ沟这结构，它由ＩｎＧａＡｓ和ＩｈＰ组成，利用了低电场下ＩｎＧａＡｓ的高电子迁移率和高电场下ＩｎＰ的高漂移速率。０．６μｍ和０．７μｍ栅长的器件上获得了１２９０ｍＳ／ｍｍ的高跨导和６８．７ＧＨｚ的ｆ＿Ｔ。研究了器件的直流和射频特性。估计有效电子饱和速率为４．２×１０￣７ｃｍ／ｓ。     

InP基谐振隧道HEMT（RTHEMT）倍频器

ＩｎＰ基谐振隧道ＨＥＭＴ（ＲＴＨＥＭＴ）倍频器最近，日本ＮＴＴ实验室报道了一种采用简单电路的室温工作的倍频器，这种电路由负载电阻器和谐振隧道ＨＥＭＴ组成。ＲＴＨＥＭＴ是将ＩｎＧａＡｓ／ＡｌＡｓ／ＩｎＡｓ赝配谐振隧道二极管加到非合金欧姆接触ＩｎＡｌＡｓ...     

Improved InAlAs/InGaAs HEMT characteristics by inserting an InAslayer into the InGaAs channel

An InAlAs/InGaAs HEMT with a thin InAs layer inserted into the InGaAs channel is proposed and its electron transport properties and device performances have been investigated. By optimizing the thickness and the exact point of insertion in the InAs layer, the mobility and electron velocity at 300 K have been increased by 30% and 15%, respectively, compared to the conventional heterostructure. In addition, a maximum intrinsic transconductance of 970 mS/mm and a maximum current gain cutoff frequency of 58.1 GHz have been attained by a 0.6 μm-gate-length device     

Transistor performance and electron transport properties of highperformance InAs quantum-well FET's

A novel field-effect transistor based on a pseudomorphic InAs quantum well in a doped InGaAs/InAlAs double heterostructure is reported. Low-field mobility, electron peak velocity, and transistor performance are studied as functions of InAs quantum well thickness, where the InAs layer is in the center of a 300-Å uniformly doped InGaAs/InAlAs quantum well lattice matched to InP. Electron transport-both at low and high fields-along with transistor transconductance are optimal for structures with a 30-Å InAs quantum well. Transistors based on the InAs quantum well structures with 0.5-μm gate lengths yielded room temperature extrinsic transconductances of 708 mS/mm, more than a 100% increase over those with no InAs     

Investigation of Impact Ionization in InAs-Channel HEMT for High-Speed and Low-Power Applications

An 80-nm InP high electron mobility transistor (HEMT) with InAs channel and InGaAs subchannels has been fabricated. The high current gain cutoff frequency (f_t) of 310 GHz and the maximum oscillation frequency (f_max) of 330 GHz were obtained at V_DS = 0.7 V due to the high electron mobility in the InAs channel. Performance degradation was observed on the cutoff frequency (f_t) and the corresponding gate delay time caused by impact ionization due to a low energy bandgap in the InAs channel. DC and RF characterizations on the device have been performed to determine the proper bias conditions in avoidance of performance degradations due to the impact ionization. With the design of InGaAs/InAs/InGaAs composite channel, the impact ionization was not observed until the drain bias reached 0.7 V, and at this bias, the device demonstrated very low gate delay time of 0.63 ps. The high performance of the InAs/InGaAs HEMTs demonstrated in this letter shows great potential for high-speed and very low-power logic applications.     

AIGaAsSb Buffer/Barrier on GaAs substrate for InAs channel devices with high electron mobility and practical reliability

InAs/AlGaAsSb deep quantum well was successfully formed on GaAs substrate and examined for two electron devices, Hall elements (HEs), and field-effect transistors (FETs). With a thin buffer layer of 600 nm AIGaAsSb on GaAs substrate, we observed high electron mobility more than 23000 cm²/Vs and extrinsic effective electron velocity of 2.2 x 10⁷ cm/s for a 15 nm thick InAs channel at room temperature. AIGaAsSb lattice matched to InAs was discussed from the view points of insulating property, carrier confinement, and oxidization rate. Reliability data good enough for practical use were also obtained for HEs. We demonstrated AIGaAsSb as a promising buffer/barrier layers for InAs channel devices on GaAs substrate, and we discussed the possible advantages of AIGaAsSb also for InGaAs FETs.     

A physical model on electron mobility in InGaAs nMOSFETs with stacked gate dielectric

An inversion-channel electron mobility model for InGaAs n-channel metal–oxide-semiconductor field-effect transistors (nMOSFETs) with stacked gate dielectric is established by considering scattering mechanisms of bulk scattering, Coulomb scattering of interface charges, interface-roughness scattering, especially remote Coulomb scattering and remote interface-roughness scattering. The simulation results are in good agreement with the experimental data. The effects of device parameters on degradation of electron mobility, e.g. interface roughness, dielectric constant and thickness of high-k layer/interlayer, and the doping concentration in the channel, are discussed. It is revealed that a tradeoff among the device parameters has to be performed to get high electron mobility with keeping good other electrical properties of devices.     

Frequency multipliers using InP-based resonant-tunneling highelectron mobility transistors

Frequency multipliers (doubler and tripler) are demonstrated at room temperature, using a simple circuit that combines a load resistor with an InP-based resonant-tunneling high electron mobility transistor (RTHEMT). The RTHEMT incorporates an InGaAs/AlAs/InAs pseudomorphic resonant tunneling diode into the source of a nonalloyed ohmic contact InAlAs/InGaAs high electron mobility transistor. A nearly flat valley current is obtained in the RTHEMT's current-voltage characteristics, which results in pronounced negative transconductance throughout a wide range of drain-to-source bias voltages. As a result, frequency multipliers using RTHEMT's feature large output voltage swing and reduced power consumption     

Interrelation of the construction of the metamorphic InAlAs/InGaAs nanoheterostructures with the InAs content in the active layer of 76–100% with their surface morphology and electrical properties

The influence of the construction of a metamorphic buffer on the surface morphology and electrical properties of InAlAs/InGaAs/InAlAs nanoheterostructures with InAs content in the active layer from 76 to 100% with the use of the GaAs and InP substrates is studied. It is shown that such parameters as the electron mobility and the concentration, as well as the root-mean-square surface roughness, substantially depend on the construction of the metamorphic buffer. It is established experimentally that these parameters largely depend on the maximal local gradient of the lattice constant of the metamorphic buffer in the growth direction of the layers rather than on its average value. It is shown that, with selection of the construction of the metamorphic buffer, it is possible to form nanostructured surfaces with a large-periodic profile.     

Electron Mobility of Doped Strained Si1-x Gex Alloys Grown on Si(100) Substrate^①②

The electron mobility for strained Si1-xGex alloy layer grown on Si(100) substrate has been calculated for doping rage of 10^17 cm^-3 to 10^20 cm^-3with Ge contents of 0.0≤x≤1.0.The results show a decrease in the mobility with increasing of Ge content and doping concentration.The electron mobility in-plane is foud to be smaller than the perpendicular component.     

On the possible effects of AlGaAsSb growth parameters on the 2-DEGconcentration in AlGaAsSb/InGaAs/AlGaAsSb QW's

The absence of pinchoff in the room temperature current-voltage characteristics of certain AlGaAsSb/InGaAs/AlGaAsSb-based high electron mobility transistors (HEMT's) is investigated by theoretical calculations. The room temperature pinchoff properties are strongly affected by the Al mole fraction in the buffer layer, the In mole fraction in the channel, the unintentional acceptor doping level of the lattice-matched quaternary buffer, and the quantum well width. The use of InAs as the channel material imposes strict conditions on the composition and the unintentional acceptor doping of the buffer layer. With decreasing In mole fraction, the restriction is relaxed. A higher Al mole fraction in the buffer, along with a lower In mole fraction in the channel, results in superior pinchoff characteristic and lower gate leakage     

InGaAs/GaAs量子阱中自组装InAs量子点的光学性质

在InGaAs/GaAs量子阱中生长了两组InAs量子点样品,用扫描电子显微镜(SEM)测量发现,量子点呈棱状结构,而不是通常的金字塔结构,这是由多层结构的应力传递及InGaAs应变层的各向异性引起的.采用变温光致发光谱(TDPL)和时间分辨谱(TRPL)研究了其光致发光稳态和瞬态特性.研究发现,InGaAs量子阱层可以有效地缓冲InAs量子点中的应变,提高量子点的生长质量,可以在室温下探测到较强的发光峰.在量子阱中生长量子点可以获得室温下1 318 nm的发光,并且使其PL谱的半高宽减小到25 meV.