共查询到18条相似文献,搜索用时 265 毫秒
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柔性基板封装(COF)是一种新型LED封装形式。本研究在柔性基板中的高分子绝缘层(PI)中添加全铜通孔,通过有限元仿真分析全铜通孔对LED封装热学性能的影响。研究结果表明:在柔性LED封装中,PI层热阻最大,是导致芯片结温高的主要因素。PI层中全铜通孔的添加使PI层热阻大幅降低,显著提升LED封装的垂直散热能力。基于仿真计算结果,建立了PI层中添加全铜通孔数量与LED封装热阻间的对应关系。针对本研究中的封装结构,采用8*8 的全铜通孔阵列对LED封装的热学性能提升效果显著。 相似文献
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散热是大功率LED封装的关键技术之一,散热不良将严重影响LED器件的出光效率、亮度和可靠性。影响LED器件散热的因素很多,包括芯片结构、封装材料(热界面材料和散热基板)、封装结构与工艺等。文章具体分析了影响大功率LED热阻的各个因素,指出LED散热是一个系统概念,需要综合考虑各个环节的热阻,单纯降低某一热阻无法有效解决LED的散热难题。文中还对国内外降低LED热阻的最新技术进行了介绍。 相似文献
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大功率LED多芯片集成封装的热分析 总被引:2,自引:2,他引:0
随着高亮度白光LED在室内、室外照明领域的应用,多芯片LED的集成封装方式是其发展的主要趋势之一,而热问题却是多芯片LED集成封装的瓶颈问题之一。建立了多芯片LED集成封装的等效热路模型,并采用有限元分析(FEA)的方法对多芯片LED集成封装的稳态热场分布进行了分析,同时通过制作实际样品研究大功率LED多芯片集成封装的热阻、发光效率与芯片工作数量的关系。结果表明集成封装的多芯片白光LED结温随着集成芯片数量的增加成线性增长,芯片到基板底面的热阻随着芯片工作数量的增加而增大,而其发光效率随着集成芯片数量的增加成线性减小。 相似文献
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高压(HX)倒装LED是一种新型的光源器件,在小尺寸、高功率密度发光光源领域有广泛的应用前景.设计了4种不同工作电压的高压倒装LED芯片,进行了流片验证,并对其进行了免封装芯片(PFC)结构的封装实验,在其基础上研制出一种基于高压倒装芯片的PFC-LED照明组件.建立了9V高压倒装LED芯片、PFC封装器件及照明组件的模型,利用流体力学分析软件进行了热学模拟和优化设计;利用T3Ster热阻测试分析仪进行了热阻测试,验证了设计的可行性.结果表明,基于9V高压倒装LED芯片的PFC封装器件的热阻约为0.342 K/W,远小于普通正装LED器件的热阻.实验结果为基于高压倒装LED芯片的封装及应用提供了热学设计依据. 相似文献
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准确测量大功率LED的热阻,关键是准确地确定LED的结温增量.首先利用正向电压法获得LED的结温;通过测量LED的降温曲线,计算获得LED稳定工作时底座的温度,从而得到LED的结温相对底座温度的增量.然后,再与注入电功率相除,即可得到准确的热阻.与常规方法相比,避免了直接测量LED底座温度中界面热阻的影响,使得测量LED的热阻更加准确、方便.该方法还可以用于测量贴片封装LED等常规方法难以测量的LED以及用于分析大功率LED二次封装时引入的热阻,为评价大功率LED的封装质量提供了一种有效的评测手段. 相似文献
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大功率LED结温测量及发光特性研究 总被引:6,自引:1,他引:5
介绍了基于正向电压法原理自行研制的大功率LED结温测试系统,结温定量测量精度可达±0.5 ℃.利用该系统对不同芯片结构与不同封装工艺的大功率LED热阻进行了测量比较,并对不同结温的大功率LED发光特性进行了研究.结果表明,不同结构芯片温度-电压系数K明显不同;采用热导率更高的粘结材料和共晶焊工艺固定LED芯片,会明显降低封装层次引入的热阻.结温对光辐射功率有直接影响,若保持结温恒定,光辐射功率随电流增大线性增加;若保持外部散热条件不变,热阻大的芯片内部热量积累较快,导致结温上升速度更快,光效随电流增加而下降的趋势也更为严重. 相似文献
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介绍了Si衬底功率型GaN基LED芯片和封装制造技术,分析了Si衬底功率型GaN基LED芯片制造和封装工艺及关键技术,提供了产品测试数据。Si衬底LED芯片制备采用上下电极垂直结构与Ag反射镜工艺,封装采用仿流明大功率封装,封装后白光LED光通量达80 lm,光效达70 lm/W,产品已达商品化。与蓝宝石和SiC衬底技术路线相比,Si衬底LED芯片具有原创技术产权,可销往任何国家而不受国际专利的限制。产品抗静电性能好,寿命长,可承受的电流密度高,具有单引线垂直结构,器件封装工艺简单,而且生产效率高,成本低廉。其应用前景广阔,是值得大力发展的一门新技术。 相似文献
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提出了一种应用于3D封装的带有硅通孔(TSV)的超薄芯片的制作方法。具体方法为通过刻蚀对硅晶圆打孔和局部减薄,然后进行表面微加工,最后从硅晶圆上分离出超薄芯片。利用两种不同的工艺实现了TSV的制作和硅晶圆局部减薄,一种是利用深反应离子刻蚀(DRIE)依次打孔和背面减薄,另一种是先利用KOH溶液湿法腐蚀局部减薄,再利用DRIE刻蚀打孔。通过实验优化了KOH和异丙醇(IPA)的质量分数分别为40%和10%。这种方法的优点在于制作出的超薄芯片翘曲度相较于CMP减薄的小,而且两个表面都可以进行表面微加工,使集成度提高。利用这种方法已经在实验室制作出了厚50μm的带TSV的超薄芯片,表面粗糙度达到0.02μm,并无孔洞地电镀填满TSV,然后在两面都制作了凸点,在表面进行了光刻、溅射和剥离等表面微加工工艺。实验结果证实了该方法的可行性。 相似文献
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The study aims at evaluation of the steady-state heat dissipation capability of a high-density through silicon via (TSV)-based three-dimensional (3D) IC packaging technology (briefly termed 3D TSV IC packaging) designed for CMOS image sensing under natural convection through finite element analysis (FEA) and thermal experiments. To enhance modeling and computational efficiency, an effective approach based on FEA incorporating a 3D unit-cell model is proposed for macroscopically and thermally simulating the heterogeneous TSV chips. The developed effective thermal conductivities are compared against those obtained from a rule-of-mixture technique. In addition, the proposed numerical models are validated by comparison with two experiments. Besides, the uncertainties in the input chip power from the specific power supply and in the measured chip junction temperature by the thermal test die are evaluated. Finally, a design guideline for improved thermal performance is provided through parametric thermal study. 相似文献
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Design and Simulation of High-power LED Array Packaging 总被引:2,自引:0,他引:2
Thermal management is one of the key technologies for high-power Light emitting diode(LED) entering into the general illuminating field. Successful thermal management depends on optimal packaging structure and selected packaging materials. In this paper, the aluminum is employed as a substrate of LED, 3×3 array chips are placed on the substrate, heat dissipation performance is simulated using finite element analysis(FEA) software, analyzed are the influences on the temperature of the chip with different convection coefficient, and optical properties are simulated using optical analysis software. The results show that the packaging structure can not only effectually improve the thermal performance of high-power LED array but also increase the light extraction efficiency. 相似文献
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In this paper, the cost of a light emitting diode (LED) package is lowered by using a silicon substrate as the base attached to the chip, in contrast to the conventional chip-on-board (COB) package. In addition we proposed an LED package with a new structure to promote reliability and lifespan by maximizing heat dissipation from the chip. We designed an LED package combining the advantages of COB based on conventional metal printed circuit board (PCB) and the merits of a silicon sub-mount as a substrate. When an input current 500–1000 mA was applied, the fabricated LED exhibited the light output of approximately 112 lm/W at 29 W. We also measured and compared the thermal resistance of the sub-mount package and conventional COB package. The measured thermal resistance of the sub-mount package with a reflective film of Ag and the COB package were 0.625 K/W and 1.352 K/W, respectively. 相似文献
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Micro heat pipe (MHP) is applied to implement the efficient heat transfer of light emitting diode (LED) device. The fabrication of MHP is based on micro-electro-mechanical-system (MEMS) technique, 15 micro grooves were etched on one side of silicon (Si) substrate, which was then packaged with aluminum heat sink to form an MHP. On the other side of Si substrate, three LED chips were fixed by die bonding. Then experiments were performed to study the thermal performance of this LED device. The results show that the LED device with higher filling ratio is better when the input power is 1.0 W; with the increase of input power, the optimum filling ratio changes from 30% to 48%, and the time reaching stable state is reduced; when the input power is equal to 2.5 W, only the LED device with filling ratio of 48% can work normally. So integrating MHP into high-power LED device can implement the effective control of junction temperature. 相似文献
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Study of Phosphor Thermal-Isolated Packaging Technologies for High-Power White Light-Emitting Diodes
Bingfeng Fan Hao Wu Yu Zhao Yulun Xian Gang Wang 《Photonics Technology Letters, IEEE》2007,19(15):1121-1123
A novel packaging configuration for high-power phosphor-converting white light-emitting diodes (LEDs) application is reported. In this packaging configuration, a thermal-isolated encapsulant layer was used to separate the phosphor coating layer from the LED chip and the submount. Experimental and finite-element method simulation results proved that this thermal management can prevent the heat of LED chip from transferring to the phosphor coating layer. The surface temperature of the phosphor coating layer is a 16.8degC lower than that of the conventional packaging at 500-mA driver current for 1-mm power GaN-based LED chip. Experimental results also show that this packaging configuration can improve the light-emitting power performance and color characteristics stability of the white LED, especially under high current operating condition. 相似文献