Middleware for pervasive computing: A survey

The rapidly emerging area of pervasive computing faces many challenging research issues critical to application developers. Wide heterogeneity of hardware, software, and network resources pose veritable coordination problems and demand thorough knowledge of individual elements and technologies. In order to ease this problem and to aid application developers, different middleware platforms have been proposed by researchers. Though the existing middleware solutions are useful, they themselves have varied features and contribute partially, for context, data, or service management related application developments. There is no single middleware solution that can address a majority of pervasive computing application development issues, due to the diverse underlying challenges. In this survey paper, we identify different design dimensions of pervasive computing middleware and investigate their use in providing various system services. In-depth analysis of the system services have been carried out and middleware systems have been carefully studied. With a view to aid future middleware developers, we also identify some challenging open research issues that have received little or no attention in existing middleware solutions.     

嵌入式RFID中间件系统的研究与实现

射频识别技术(RFID)中间件是RFID系统中前端阅读设备与后端数据处理系统之间的一个中枢环节,屏蔽阅读器差异为数据处理的客户端提供了一个统一的开发平台。在研究EPCglobal的基础上,提出一种嵌入式RFID中间件系统,分别从硬件的框架设计与结构组成以及软件的架构与实现方法两方面对嵌入式RFID中间系统件进行讨论,并介绍了具体的实现。在实际RFID系统的应用当中取得良好的效果,证明了该中间件系统的可行性。     

运载火箭测发控软件的中间件技术应用

由于不同型号硬件平台和软件平台的多样性,跨型号大规模融合应用系统通常要求在拥有多种软硬件平台(异构平台)的分布式环境下运行。借助中间件(Middleware)技术改进软件重用形式,提高软件重用程度,以实现支持分布式应用有效开发、部署、运行和管理的目的。本文在对现有火箭测发控系统软件的子系统功能聚类和程序架构分析基础上,开发基于中间件模型的通用火箭测发控系统软件。     

Integration von Daten, Anwendungen und Prozessen am Beispiel des Telekommunikationsunternehmens EWE TEL

The necessary specialisation in information processing in the telecommunication sector led to a wide range of software systems in the relevant software market. This can be traced back by the fact that there is a lack of capable and integrated solutions. If a telecommunication company comes to the decision to use specialised software systems, it has to face the sophisticated challenge of systems integration. This can be done at least at the levels of data, applications and processes. Illustrated by examples from the heterogeneous system environment at the telecommunication company EWE TEL, concepts for system integration and gained experiences are presented in this article. The following aspects are discussed in detail: integration of data by means of middleware, integration of applications using application server technology, and integration of processes by employing workflow management systems.     

64‐bit versus 32‐bit Virtual Machines for Java

The Java language is popular because of its platform independence, making it useful in a lot of technologies ranging from embedded devices to high‐performance systems. The platform‐independent property of Java, which is visible at the Java bytecode level, is only made possible thanks to the availability of a Virtual Machine (VM), which needs to be designed specifically for each underlying hardware platform. More specifically, the same Java bytecode should run properly on a 32‐bit or a 64‐bit VM. In this paper, we compare the behavioral characteristics of 32‐bit and 64‐bit VMs using a large set of Java benchmarks. This is done using the Jikes Research VM as well as the IBM JDK 1.4.0 production VM on a PowerPC‐based IBM machine. By running the PowerPC machine in both 32‐bit and 64‐bit mode we are able to compare 32‐bit and 64‐bit VMs. We conclude that the space an object takes in the heap in 64‐bit mode is 39.3% larger on average than in 32‐bit mode. We identify three reasons for this: (i) the larger pointer size, (ii) the increased header and (iii) the increased alignment. The minimally required heap size is 51.1% larger on average in 64‐bit than in 32‐bit mode. From our experimental setup using hardware performance monitors, we observe that 64‐bit computing typically results in a significantly larger number of data cache misses at all levels of the memory hierarchy. In addition, we observe that when a sufficiently large heap is available, the IBM JDK 1.4.0 VM is 1.7% slower on average in 64‐bit mode than in 32‐bit mode. Copyright © 2005 John Wiley & Sons, Ltd.     

Integration with Web services

There's a difference between what we'd like our enterprise computing systems to be and what they really are. We like to envision them as orderly multitier arrangements comprising software buses, hubs, gateways, and adapters - all deployed at just the right places to maximize scale, load, application utility, and ultimately, business value. Unfortunately, we know that there's a wide gulf between this idealistic vision and reality. In practice, our enterprise computing systems typically are tangles of numerous technologies, protocols, and applications, often hastily hard-wired together with inflexible point-to-point connections. The whole point of middleware is to hide the diversity and complexity of the computing machinery underneath it. By adopting the abstractions that middleware provides, we're supposedly isolating our applications from the variety of ever-changing hardware platforms, operating systems, networks, protocols, and transports that make up our enterprise computing systems. We can use Web services to provide "middleware for middleware" abstraction layer for modern integration applications.     

Pinned OS/Services: A Case Study of XML Parsing on Intel SCC

Nowadays,we are heading towards integrating hundreds to thousands of cores on a single chip.However,traditional system software and middleware are not well suited to manage and provide services at such large scale.To improve the scalability and adaptability of operating system and middleware services on future many-core platform,we propose the pinned OS/services.By porting each OS and runtime system(middleware) service to a separate core(special hardware acceleration),we expect to achieve maximal performance gain and energy efficiency in many-core environments.As a case study,we target on XML(Extensible Markup Language),the commonly used data transfer/store standard in the world.We have successfully implemented and evaluated the design of porting XML parsing service onto Intel 48-core Single-Chip Cloud Computer(SCC) platform.The results show that it can provide considerable energy saving.However,we also identified heavy performance penalties introduced from memory side,making the parsing service bloated.Hence,as a further step,we propose the memory-side hardware accelerator for XML parsing.With specified hardware design,we can further enhance the performance gain and energy efficiency,where the performance can be improved by 20% with 12.27% energy reduction.     

Utilizing architectural styles to enhance the adaptation support of middleware platforms

ContextModern middleware platforms provide the applications deployed on top of them with facilities for their adaptation. However, the level of adaptation support provided by the state-of-the-art middleware solutions is often limited to dynamically loading and off-loading of software components. Therefore, it is left to the application developers to handle the details of change such that the system’s consistency is not jeopardized.ObjectiveWe aim to change the status quo by providing the middleware facilities necessary to ensure the consistency of software after adaptation. We would like these facilities to be reusable across different applications, such that the middleware can streamline the process of achieving safe adaptation.MethodOur approach addresses the current shortcomings by utilizing the information encoded in a software system’s architectural style. This information drives the development of reusable adaptation patterns. The patterns specify both the exact sequence of changes and the time at which those changes need to occur. We use the patterns to provide advanced adaptation support on top of an existing architectural middleware platform.ResultsOur experience shows the feasibility of deriving detailed adaptation patterns for several architectural styles. Applying the middleware to adapt two real-world software systems shows the approach is effective in consistently adapting these systems without jeopardizing their consistency.ConclusionWe conclude the approach is effective in alleviating the application developers from the responsibility of managing the adaptation process at the application-level. Moreover, we believe this study provides the foundation for changing the way adaptation support is realized in middleware solutions.     

UKI: universal Kinect‐type controller by ICE Lab

Universal Kinect‐type‐controller by ICE Lab (UKI, pronounced as ‘You‐key’) was developed to allow users to control any existing application by using body motions as inputs. The middleware works by converting detected motions into keyboard and/or mouse‐click events and sending them to a target application. This paper presents the structure and design of core modules, along with examples from real cases to illustrate how the middleware can be configured to fit a variety of applications. We present our designs for interfaces that decode all configuration details into a human‐interpretable language, and these interfaces significantly promote user experience and eliminate the need for programming skill. The performance of the middleware is evaluated on fighting‐game motion data, and we make the data publicly available so that they can be used in other researches. UKI welcomes its use by everyone without any restrictions on use; for instance, it can be used to promote healthy life through a means of gaming and/or used to conduct serious research on motion systems. The middleware serves as a shortcut in the development of motion applications—coding of an application to detect motions can be replaced with simple clicks on UKI. Copyright © 2017 John Wiley & Sons, Ltd.     

KIND‐DAMA: A modular middleware for Kinect‐like device data management

In the last decades, we have witnessed a growing interest toward touchless gestural user interfaces. Among other reasons, this is due to the large availability of different low‐cost gesture acquisition hardware (the so‐called “Kinect‐like devices”). As a consequence, there is a growing need for solutions that allow to easily integrate such devices within actual systems. In this paper, we present KIND‐DAMA, an open and modular middleware that helps in the development of interactive applications based on gestural input. We first review the existing middlewares for gestural data management. Then, we describe the proposed architecture and compare its features against the existing similar solutions we found in the literature. Finally, we present a set of studies and use cases that show the effectiveness of our proposal in some possible real‐world scenarios.     

Arcademis: a framework for object‐oriented communication middleware development

This paper presents Arcademis, a Java‐based framework for communication middleware development. Arcademis consists of a set of abstract classes, interfaces and concrete components that define the general architecture of middleware systems. Its main objective is to support the implementation of non‐monolithic and easily configurable middleware platforms. Arcademis can be used by middleware developers to deploy systems that meet the requirements of a particular network or technology. Instances of Arcademis can also be customized by distributed systems engineers to meet the requirements of a particular application. For example, new transport protocols, connection management policies, authentication algorithms or invocation semantics can be easily configured in middleware platforms derived from Arcademis. In order to illustrate the use of the framework, the paper describes the RME system, a middleware derived from Arcademis that adds a remote method invocation service to the CLDC configuration of Java 2 Micro Edition (J2ME). Copyright © 2006 John Wiley & Sons, Ltd.     

Low‐latency Java communication devices on RDMA‐enabled networks

Providing high‐performance inter‐node communication is a key capability for running high performance computing applications efficiently on parallel architectures. In fact, current systems deployments are aggregating a significant number of cores interconnected via advanced networking hardware with Remote Direct Memory Access (RDMA) mechanisms, that enable zero‐copy and kernel‐bypass features. The use of Java for parallel programming is becoming more promising thanks to some useful characteristics of this language, particularly its built‐in multithreading support, portability, easy‐to‐learn properties, and high productivity, along with the continuous increase in the performance of the Java virtual machine. However, current parallel Java applications generally suffer from inefficient communication middleware, mainly based on protocols with high communication overhead that do not take full advantage of RDMA‐enabled networks. This paper presents efficient low‐level Java communication devices that overcome these constraints by fully exploiting the underlying RDMA hardware, providing low‐latency and high‐bandwidth communications for parallel Java applications. The performance evaluation conducted on representative RDMA networks and parallel systems has shown significant point‐to‐point performance increases compared with previous Java communication middleware, allowing to obtain up to 40% improvement in application‐level performance on 4096 cores of a Cray XE6 supercomputer. Copyright © 2015 John Wiley & Sons, Ltd.     

High‐performance execution of service compositions: a multicore‐aware engine design

Although modern computer hardware offers an increasing number of processing elements organized in nonuniform memory access (NUMA) architectures, prevailing middleware engines for executing business processes, workflows, and Web service compositions have not been optimized for properly exploiting the abundant processing resources of such machines. Amongst others, factors limiting performance are inefficient thread scheduling by the operating system, which can result in suboptimal use of system memory and CPU caches, and sequential code sections that cannot take advantage of multiple available cores. In this article, we study the performance of the JOpera process execution engine on recent multicore machines. We first evaluate its performance without any dedicated optimization for multicore hardware, showing that additional cores do not significantly improve performance, although the engine has a multithreaded design. Therefore, we apply optimizations on the basis of replication together with an improved, hardware‐aware usage of the underlying resources such as NUMA nodes and CPU caches. Thanks to our optimizations, we achieve speedups from a factor of 2 up to a factor of 20 (depending on the target machine) when compared with a baseline execution ‘as is’. Copyright © 2012 John Wiley & Sons, Ltd.     

Adaptive security protocol selection for mobile computing

The mobile computing paradigm has introduced new problems for application developers. Challenges include heterogeneity of hardware, software, and communication protocols, variability of resource limitations and varying wireless channel quality. In this scenario, security becomes a major concern for mobile users and applications. Security requirements for each application are different, as well as the hardware capabilities of each device. To make things worse, wireless medium conditions may change dramatically with time, incurring great impact on performance and QoS guarantees for the application. Currently, most of the security solutions for mobile devices use a static set of algorithms and protocols for services such as cryptography and hashes.In this work we propose a security service, which works as a middleware, with the ability to dynamically change the security protocols used between two peers. These changes can occur based on variations on wireless medium parameters and system resource usage, available hardware resources, application-defined QoS metrics, and desired data “security levels”. We compare our solution to some widespread static security protocols, demonstrate how our middleware is able to adapt itself over different conditions of medium and system, and how it can provide a performance gain in the execution of cryptographic primitives, through the use of data semantics.     

开放结构智能舰资源管理系统体系研究

基于中间件的开放结构智能舰资源管理系统(OARM)是一种独立的系统软件或服务,分布式舰艇系统借助这种服务在不同的技术之间共享资源,总的作用是用来屏蔽各级分系统网络硬件平台的差异性和操作系统与网络协议的异构性,使运行于不同技术平台的分系统能够平滑集成。本文对OARM的体系进行研究,给出了OARM的总体结构和部署模型。     

A role for Pareto optimality in mining performance data

Improvements in performance modeling and identification of computational regimes within software libraries is a critical first step in developing software libraries that are truly agile with respect to the application as well as to the hardware. It is shown here that Pareto ranking, a concept from multi‐objective optimization, can be an effective tool for mining large performance datasets. The approach is illustrated using software performance data gathered using both the public domain LAPACK library and an asynchronous communication library based on IBM LAPI active message library. Copyright © 2005 John Wiley & Sons, Ltd.     

Model driven middleware: A new paradigm for developing distributed real-time and embedded systems

Distributed real-time and embedded (DRE) systems have become critical in domains such as avionics (e.g., flight mission computers), telecommunications (e.g., wireless phone services), tele-medicine (e.g., robotic surgery), and defense applications (e.g., total ship computing environments). These types of system are increasingly interconnected via wireless and wireline networks to form systems of systems. A challenging requirement for these DRE systems involves supporting a diverse set of quality of service (QoS) properties, such as predictable latency/jitter, throughput guarantees, scalability, 24x7 availability, dependability, and security that must be satisfied simultaneously in real-time. Although increasing portions of DRE systems are based on QoS-enabled commercial-off-the-shelf (COTS) hardware and software components, the complexity of managing long lifecycles (often ∼15-30 years) remains a key challenge for DRE developers and system integrators. For example, substantial time and effort is spent retrofitting DRE applications when the underlying COTS technology infrastructure changes.This paper provides two contributions that help improve the development, validation, and integration of DRE systems throughout their lifecycles. First, we illustrate the challenges in creating and deploying QoS-enabled component middleware-based DRE applications and describe our approach to resolving these challenges based on a new software paradigm called Model Driven Middleware (MDM), which combines model-based software development techniques with QoS-enabled component middleware to address key challenges faced by developers of DRE systems — particularly composition, integration, and assured QoS for end-to-end operations. Second, we describe the structure and functionality of CoSMIC (Component Synthesis using Model Integrated Computing), which is an MDM toolsuite that addresses key DRE application and middleware lifecycle challenges, including partitioning the components to use distributed resources effectively, validating software configurations, assuring multiple simultaneous QoS properties in real-time, and safeguarding against rapidly changing technology.     

CIM—the integration of manufacturing and information systems

The integration of computers within the manufacturing environment has long been a method of enhancing productivity. Their use in many facets of a manufacturing enterprise has given industries the ability to deliver low-cost, high-quality competitive products. As computer technology advances, we find more and more uses for new hardware and software in the enterprise. Over a period of time, we have seen many “islands” of computer integration. Distinct, fully functional hardware and software installations are a common base for many industries. Unfortunately, these islands are just that, separate, distinct and functional but non-integrated. The lack of integration within these information systems make it difficult for end users to see the same manufacturing data. We are finding the need for a “single image” real-time information system to provide the enterprise with the data that is required to plan, justify, design, manufacture and deliver products to the customer. Unfortunately, many industries have a large installed base of hardware and software. Replacement of current systems is not a cost-justified business decision. An alternative would be the migration of current systems to a more integrated solution. The migration to a computer-integrated manufacturing (CIM)-based architecture would provide that single image real-time information system.

The effort and skills necessary for the implementation of a CIM-based architecture would require active participation from two key organizations: Manufacturing and information systems (I/S). The manufacturing engineers, process engineers and other manufacturing resource would be the cornerstone for obtaining requirements. The ability to effectively use I/S is a critical success factor in the implementation of CIM. I/S has to be viewed as an equal partner, not just as a service organization. Manufacturing management needs to understand the justification process of integrating computer systems and the “real” cost of integration versus the cost of non-integrated manufacturing systems. The active participation of both organizations during all phases of CIM implementation will result in a effective and useful integrated information system.     

Improving TLB performance on current chip multiprocessor architectures through demand‐driven superpaging

Translation Lookaside Buffers (TLBs) can play a critical role in improving the performance of emerging parallel workloads. Most current chip multiprocessor systems include multilevel TLBs and provide support for superpages both at the hardware and software level. Judicious use of superpages can significantly cut down the number of TLB misses and improve overall system performance. However, indiscriminate superpage allocation results in page fragmentation and increased application footprint, which often outweigh the benefits of reduced TLB misses. Previous research has explored policies for smart allocation of superpages from an operating system perspective. This paper presents a compiler‐based strategy for automatic and profitable memory allocation via superpages. A significant advantage of a compiler‐based approach is the availability of data‐reuse information within an application. Our strategy employs data‐locality analysis to estimate the TLB demands for both single‐threaded and multi‐threaded programs and uses this metric to apply selective superpage allocation. Apart from its obvious utility in improving TLB performance, this strategy can be used to improve the effectiveness of certain data‐layout transformations and can be a useful tool in benchmarking and automatic performance tuning. We demonstrate the effectiveness of this strategy with experiments on three multicore platforms on a workload that contains both sequential and parallel applications. Copyright © 2012 John Wiley & Sons, Ltd.     

消息中间件在数据转换传输平台中的应用

提出了一种利用中间件产品构建数据转换传输的平台系统的思想。给出了利用消息中间件开发银行代收代付应用的商户端的解决方案。以电力公司利用IBM MQSeries中间件构建多银行代缴居民电费平台为实例,阐述了在异种操作系统和分布数据库的复杂情况下,利用消息中间件所带来的优势。消息中间件的使用使系统具有良好的可扩展性和可移植性。把含有多个数据库、多种操作系统的企业应用结合成一个协同工作的有机整体,真正实现了企业的分布式应用。该方案不仅适用于银行代理业务的商户端应用,也适用于任何需要进行数据转换和传输的系统。