基于柔性衬底的平面螺旋电感的计算与仿真

提出了一种基于柔性衬底的平面螺旋电感,介绍了柔性衬底的优点,对比了平面电感的结构类型,给出了平面螺旋电感的自感、电容、串联电阻及互感的计算方法,并对方形平面电感进行了仿真。     

射频电路中平面螺旋电感的计算

介绍了单晶集成电感、单晶传输线变压器以及将其作为balun的运用方案.对射频电路中平面螺旋电感的分布参数模型进行了分析,进而讨论了平直导体的电感值的理论计算方法,然后以此为基础,以两圈的长方形、一圈的平面螺旋线圈电感和正方形平面螺旋电感为例计算了其电感值.     

超宽带锥形电感特性研究

锥形螺旋电感是一种新型电感,在较宽的频带内有良好的一致性,在毫米波电路和光载无线通信系统（RoF Radio-over-Fiber）中有广泛的应用.本文对锥形螺旋电感感值、螺旋电感长度、直流电阻的计算方法进行了研究,给出了精确计算方法,其中,电感值误差在10.2%以内,直流电阻误差在6.5%以内;对锥形空心螺旋电感微波特性进行研究,提出了一种等效模型,该模型拟合计算结果与实测曲线有较好的一致性,使用该模型给出了螺旋电感宽带特性的详细理论推导,同时利用该模型首次对锥形螺旋电感的宽带特性进行了直观解释;最后,将绕制参数对电感微波性能的影响进行分析,引入单位长度电感量参数α和电感量-频率参数β,可对超宽带锥形电感微波特性进行优化,对某些特性进行快速优化.     

螺旋电感品质因数Q的GP优化

为了提高螺旋电感的品质因数,综合多种变量进行高效的优化,提出一种GP优化的方法来得到螺旋电感品质因数最佳值.该方法通过matlab仿真分析了集成电路螺旋电感的一种物理模型,找出了对螺旋电感品质因数有影响的几个变量.在此基础上对螺旋电感模型整体进行了建模,在确定的电感值及一定限制条件下,用matlab进行螺旋电感品质因数Q的严格的GP优化.仿真结果表明,与遗传算法和等Q值线相比,GP优化的方法分别提高了14.5%和20.2%.     

片上螺旋电感宽频带等效电路模型的建立

介绍了一种简单而有效的对片上螺旋电感建立集总等效电路模型的方法,并提出了用电容和电感补偿等效代替的思想,实现了9个参数的宽频带电路。通过仿真ADS中空气桥横跨式结构和电介质隔离地下通道式结构,该等效模型在26~40GHz带宽内获得了S参数、有效电感值和Q值比较好的拟合效果,为片上螺旋电感的提参建模提供了快速、可行的方案。     

射频集成电路对称型螺旋电感研究

针对片上集成螺旋电感的建模,研究并设计了相关的优化方法。分析了已有电感结构,提出了一种高性能的优化方案,使螺旋电感的品质因数和差分特性都有了显著的提高,为螺旋电感设计中品质因数和电感值的折中提供更大的选择面。该优化设计尤其适合高性能全差分压控振荡器对高性能螺旋电感的需要;优化设计选取典型的单层螺旋电感作为测试对象,工作频率为2.439GHz,芯片面积最大值限定为250μm×250μm,采用ASITIC提供的默认工艺。     

RF平面螺旋微电感的物理模型

为了在RF频率域内准确模拟RF平面螺旋微电感的性能，讨论了一种计算RF平面螺旋微电感的物理模型，此模型采用Greenhouse法计算微电感的电感量，在计算微电感Q值时，考虑了诸如涡流、衬底电阻及各种寄生电容等因素，寄生电容包括电感与终端引出层间的交叉电容，电感与衬底间的电容，衬底电容等。这种模型可以计算不同布局及参数的微电感，为微电感的设计及其性能的优化提供了一种很好的方法。     

基于遗传算法的片上螺旋电感模型优化方法

给出了一种基于遗传算法的片上螺旋电感宽带电路模型优化方法。通过对螺旋电感Y参数变化规律的分析,首先给出一种能够工作在高频段的电路模型结构。对每个频段内电路模型的参数优化被认为是一个误差最小化的多目标优化问题,将具有全局搜索能力和鲁棒性能的遗传算法引入到该优化过程中。介绍了遗传算法的优化过程以及其中采用的子频带划分方法。优化结果表明,针对不同几何参数的螺旋电感,该优化方法都能得到误差在5%以内的宽频带电感模型。     

双层螺旋RF MEMS电感的模拟与设计

分析了双层螺旋电感的等效电路模型,研究了一种与传统CMOS工艺兼容的MEMS工艺,通过腐蚀电感结构下的硅衬底使电感悬空.利用HFSS软件对一些双层螺旋微电感进行了模拟,模拟结果表明,相比传统单层电感,双层电感可以减少60%的芯片面积,10nH的电感也只需要很小的面积,经过MEMS后处理的双层螺旋电感的最大Q值都超过了20.     

磁性薄膜微电感器件的研究进展

综述了磁性薄膜微电感的研究现状,介绍了四种不同电感器件的结构设计(平面螺旋型,磁芯螺线管,曲折结构及夹心条状结构)及其优缺点和磁芯材料(坡莫合金,铁氧体,非晶,纳米晶软磁)对电感器件的影响。     

Physical modeling of spiral inductors on silicon

This paper presents a physical model for planar spiral inductors on silicon, which accounts for eddy current effect in the conductor, crossover capacitance between the spiral and center-tap, capacitance between the spiral and substrate, substrate ohmic loss, and substrate capacitance. The model has been confirmed with measured results of inductors having a wide range of layout and process parameters. This scalable inductor model enables the prediction and optimization of inductor performance     

新颖的常规硅工艺实现的侧向螺线型片上集成电感

提出了一种用常规硅工艺实现的片上集成电感的螺线型新结构．制造工艺使用标准双层金属布线的常规硅工艺．测量了螺线型集成电感的S参数，从测量数据计算了集成电感的参量．实验的侧向螺线型片上集成电感的Q值峰值为1.3，电感量为22nH．对用两层金属层实现的侧向螺线型片上集成电感和单层金属的常规平面螺旋电感的实验结果进行了比较，电感量和Q值与常规平面螺旋电感有可比性．     

新颖的常规硅工艺实现的侧向螺线型片上集成电感

提出了一种用常规硅工艺实现的片上集成电感的螺线型新结构．制造工艺使用标准双层金属布线的常规硅工艺．测量了螺线型集成电感的S参数，从测量数据计算了集成电感的参量．实验的侧向螺线型片上集成电感的Q值峰值为1.3，电感量为22nH．对用两层金属层实现的侧向螺线型片上集成电感和单层金属的常规平面螺旋电感的实验结果进行了比较，电感量和Q值与常规平面螺旋电感有可比性．     

S-parameter formulation of quality factor for a spiral inductor in generalized two-port configuration

This paper formulates various quality (Q) factors associated with the applications of on-chip spiral inductors to radio-frequency integrated circuits using S-parameters. The formulations start with the Q factor of a spiral inductor in a generalized two-port configuration based on a new complex-power approach and then extend to the Q factors of a tank and matching circuits that use the spiral inductors. In the demonstration, the two-port S-parameters for a series of CMOS spiral inductors have been measured to further generate such various Q factors for a many-sided evaluation of the inductor performance.     

30-100-GHz inductors and transformers for millimeter-wave (Bi)CMOS integrated circuits

Silicon planar and three-dimensional inductors and transformers were designed and characterized on-wafer up to 100 GHz. Self-resonance frequencies (SRFs) beyond 100 GHz were obtained, demonstrating for the first time that spiral structures are suitable for applications such as 60-GHz wireless local area network and 77-GHz automotive RADAR. Minimizing area over substrate is critical to achieving high SRF. A stacked transformer is reported with S/sub 21/ of -2.5 dB at 50 GHz, and which offers improved performance and less area (30 /spl mu/m/spl times/30 /spl mu/m) than planar transformers or microstrip couplers. A compact inductor model is described, along with a methodology for extracting model parameters from simulated or measured y-parameters. Millimeter-wave SiGe BiCMOS mixer and voltage-controlled-oscillator circuits employing spiral inductors are presented with better or comparable performance to previously reported transmission-line-based circuits.     

Design and modeling of a micromachined high-Q tunable capacitor with large tuning range and a vertical planar spiral inductor

In wireless communication systems, passive elements including tunable capacitors and inductors often need high quality factor (Q-factor). In this paper, we present the design and modeling of a novel high Q-factor tunable capacitor with large tuning range and a high Q-factor vertical planar spiral inductor implemented in microelectromechanical system (MEMS) technology. Different from conventional two-parallel-plate tunable capacitors, the novel tunable capacitor consists of one suspended top plate and two fixed bottom plates. One of the two fixed plates and the top plate form a variable capacitor, while the other fixed plate and the top plate are used to provide electrostatic actuation for capacitance tuning. For the fabricated prototype tunable capacitors, a maximum controllable tuning range of 69.8% has been achieved, exceeding the theoretical tuning range limit (50%) of conventional two-parallel-plate tunable capacitors. This tunable capacitor also exhibits a very low return loss of less than 0.6 dB in the frequency range from 45 MHz to 10 GHz. The high Q-factor planar coil inductor is first fabricated on a silicon substrate and then assembled to the vertical position by using a novel three-dimensional microstructure assembly technique called plastic deformation magnetic assembly (PDMA). Inductors of different dimensions are fabricated and tested. The S-parameters of the inductors before and after PDMA are measured and compared, demonstrating superior performance due to reduced substrate loss and parasitics. The new vertical planar spiral inductor also has the advantage of occupying much smaller silicon areas than the conventional planar spiral inductors.     

Failure mode analysis of MEMS suspended inductors under mechanical shock

Micro-electromechanical system (MEMS) suspended inductors have been widely studied in recent decades because of their excellent radio frequency performance. However, few studies have been performed on the failure analysis of MEMS suspended inductors under mechanical shock. In this study, the failure of MEMS suspended inductors with a planar spiral coil is investigated through analytical and experimental methods. We present a stress and deformation analysis to study the failure mode of the suspended inductors under shock. To verify the theoretical analysis, MEMS inductors are designed and fabricated, and shock tests are carried out. The shock tests show that the failure mode of the MEMS suspended inductors is a fracture that occurs at the ends of the inductor coil, and the test results agree with the theoretical analysis.     

一种用以改善硅衬底螺旋电感性能的局域介质增厚新技术

提出了一种用于提高硅基螺旋电感性能的局部介质增厚技术.这种技术通过淀积、光刻和湿法腐蚀工艺,局部增加电感下方的氧化层厚度,以降低衬底损耗和提高电感性能.所采用的结构及工艺简单、成本低廉,与CMOS工艺兼容良好.用这种技术制作的几种不同电感量的方形螺旋电感、品质因数和自谐振频率均显著提高.10,5和2nH的电感,品质因数的峰值分别提高了46.7%,49.7%和68.6%;而自谐振频率的改善更明显,分别达到了92.1%,91.0%及不低于68.1%.     

A Novel Local-Dielectric-Thickening Technique for Performance Improvements of Spiral Inductors on Si Substrates

A novel local-dielectric-thickening technique is presented for performance improvements of Si-based spiral inductors.This technique employs the processes of deposition,photolithography,and wet-etching,to locally thicken the oxide layer under the inductor,which can decrease the substrate loss and improve the inductor performance.Both the structures and processes are compact,economical,and compatible with CMOS processing.Several square spiral inductors with different inductances are fabricated,and the quality factors and the self-resonant frequencies both increase clearly with this proposed technique:for the 10,5，and 2nH inductors,the peak quality factors are effectively improved by 46.7%,49.7%，and 686%,respectively;however,the improvement percents of the selfresonant frequencies are more significant,which are 92.1%,91.0%,and no less than 68.1%，respectively.