金属电极的腐蚀特性研究

对金属电极的腐蚀特性进行了研究。实验中设计了多种不同的金属电极,通过改变电极材料、电极厚度、电极层数、腐蚀液成分及温度等条件,研究了金属电极的腐蚀特性。通过研究发现,电极的腐蚀特性跟电极材料、电极厚度、电极层数、电极的缺陷及应力、腐蚀液成分及温度等条件有关。最后设计了一种打底层金属材料为Tiw,层厚20 nm,上层金属为Au,层厚度为200 nm的金属电极,在覆盖一层光刻胶,并对光刻胶进行后烘坚膜的情况下,在常温下,用HF溶液腐蚀1 h后,SOIMEMS微结构完全释放,金属电极还十分完好。     

TMAH腐蚀液制作硅微结构的研究

通过各向异性腐蚀硅微结构工艺,研究了四甲基氢氧化铵(TMAH)腐蚀液的特性,包括硅(100)晶面腐蚀速率与TAMH溶液浓度、温度、pH值以及过硫酸铵添加剂的关系,并采用原子力显微镜研究了不同腐蚀条件下硅的表面形貌,研究表明:随TMAH溶液的浓度的降低和腐蚀温度的提高,腐蚀速率提高,硅腔的表面粗糙度增大;过硫酸铵添加剂明显改善了硅微腔的表面平整度.本研究所确定的最佳腐蚀工艺条件为:溶液中TMAH浓度为25%,过硫酸铵添加剂浓度为3%,腐蚀温度80℃.在此工艺条件下腐蚀出了深度为230 μm、表面粗糙度小于50 nm的硅微腔.     

基于激光微加工Al2O3微结构Cl2传感器的制作及性能研究

以膜厚为250 μm的Al2O3膜为微结构基板、95#Al2O3瓷板为微壳结构体,设计并采用激光微加工技术制作了具有Φ0.2 mm微孔通道的微结构传感器.阐述了CuCl杂化修饰CuPc的工艺过程,并通过真空镀膜形成气敏膜.实现了主动吸气的检测模式,提高了响应时间和气敏性.通过SEM分析得到了良好的表面形貌和膜尺寸,用做电极和加热器Pt膜厚为500nm,敏感膜厚为150 nm,微壳深度为150～200μm.测试结果表明对Cl2具有较好的敏感响应,灵敏度为0.01%浓度下0.25倍,并呈现P型半导体的变化规律.研究了通气状态和加热电压对传感器响应和气敏性的影响.     

影响牺牲层腐蚀速率的因素研究

精确预测腐蚀速率对于避免过腐蚀和节省时间,从而提高MEMS器件加工的效率具重大意义.通过改变牺牲层材料、腐蚀液浓度、温度和牺牲层结构来改变腐蚀速率是常用的方法.在前人腐蚀模型基础上考虑扩散系数是浓度和温度的函数,腐蚀速率常数是温度的函数,得到了修正模型.从修正模型中找出影响腐蚀速率的各种因素的对应参数,并对其影响腐蚀速率的机理进行详细地研究,这样就为通过修改某些因素来改变腐蚀速率提供了依据.     

Cr薄膜的沉积与湿法刻蚀工艺研究

通过台阶仪和扫描电镜、原子力显微镜测试观察了PVD方法制作Cr薄膜的溅射速率和表面形貌,实验分析了相关工艺参数对溅射速率的影响情况,并对薄膜的湿法刻蚀工艺进行了初步研究.同时给出了Cr膜与其腐蚀后的电阻图形的显微镜照片.     

几种基于MEMS的纳米梁制作方法研究

特征尺度在纳米量级的梁结构是多种纳机电器件的基本结构.提出了几种基于MEMS技术的纳米梁制作方法,通过利用MEMS技术中材料与工艺的特性实现单晶硅纳米梁的制作.在普通(111)硅片上,利用各向异性湿法腐蚀对(111)面腐蚀速率极低的特性,通过干法与湿法腐蚀相结合制成厚度在100 nm以下的纳米梁.该方法不使用SOI硅片,有效控制了成本.在(100)SOI硅片上,通过氧化减薄的方法得到厚度在100 nm以下的多种纳米梁,由于热氧化的精度高,一致性好,该方法重复性与一致性均较好.在(110)SOI硅片上,利用硅的各向异性腐蚀特性以及(110)硅片的晶向特点,制作宽度在100 nm以下的纳米梁,梁的两个侧面是(111)面.     

EPW腐蚀液中制作近似圆形硅膜研究

研究了《100》单晶硅在EPW腐蚀液中制作近似圆形硅膜,在EPW腐蚀液中因《100》单晶硅腐蚀速率各向异性,在圆形掩膜下很难实现圆形单晶硅膜.基于EPW腐蚀液中《100》单晶硅存在严重凸角削角,采用带锯齿(9个、20个、36个)结构的齿轮掩膜图形腐蚀制作近似圆形硅膜,通过采用SEM观察,随腐蚀时间增加,圆形掩膜EPW腐蚀后硅膜为近似方形,而带有36个锯齿结构的齿轮掩膜腐蚀后硅膜近似圆形.结果表明,利用掩膜锯齿结构在EPW腐蚀液中存在凸角削角现象,能够实现近似圆形硅膜的制作.     

膜厚对多晶硅纳米薄膜压阻温度特性的影响

重掺杂多晶硅纳米薄膜具有良好的压阻温度特性,用它制作高温压阻式传感器灵敏度高、成本低,具有广阔的应用前景.为优化多晶硅纳米薄膜的压阻温度特性,本文采用低压化学气相淀积(LPCVD)技术制作了不同膜厚(30～250 nm)的多晶硅薄膜,分别测试了应变系数、薄膜电阻率与工作温度的关系.利用扫描电镜(SEM)和X射线衍射实验(XRD)对薄膜进行了表征,在此基础上结合隧道压阻模型分析了膜厚对多晶硅薄膜压阻温度特性的影响,结果表明,对于淀积温度620℃、掺杂浓度2.3×1020 cm-3的多晶硅纳米薄膜,膜厚的最佳值在80 nm厚左右.     

运用研磨和化学机械抛光技术制备高品质的石英薄膜

石英薄膜的质量是决定各种石英基底的微纳器件品质高低的关键所在.阐述如何运用研磨和化学机械抛光CMP(Chemical&Mechanical Polishing)技术获得高品质石英薄膜的方法.由于石英属于高硬度材料,选用金刚石研磨液和球墨铸铁研磨盘对石英衬底进行研磨,以获得较高的研磨速率和较好的研磨后的表面粗糙度.在石英CMP中,采用特殊的“两步抛“工艺,对衬底进行抛光.第一步粗抛抛光液采用金刚石颗粒直径为0.3 μm的研磨液与SiO2颗粒直径为50 nm的抛光液相混合,第二步精抛只采用SiO2的抛光液.实验结果表明,采用上述技术,可以获得高品质的石英薄膜,厚度为(25.1±3.2)μm,表面粗糙度约为0.89 nm(RMS).     

微结构参数对多孔硅层热绝缘性能的影响

研究了多孔硅层厚度,孔隙率以及多孔硅中微晶粒尺寸三个微结构参数对其热绝缘性的影响机制.实验选用p ,p-两种掺杂浓度的硅片基底,采用电化学腐蚀法,通过改变腐蚀时间和腐蚀电流密度获得不同微结构参数的多孔硅层.分别采用显微拉曼光谱法及测量显微镜聚焦法测量了样品的热导率和厚度.研究发现,多孔硅层厚度影响热量传输路径,而孔隙率和微晶粒尺寸通过降低热导率从而使多孔硅的绝热性增强.     

Comparison of etch characteristics of KOH, TMAH and EDP for bulk micromachining of silicon (110)

Bulk micromachining in Si (110) wafer is an essential process for fabricating vertical microstructures by wet chemical etching. We compared the anisotropic etching properties of potassium hydroxide (KOH), tetra-methyl ammonium hydroxide (TMAH) and ethylene di-amine pyro-catechol (EDP) solutions. A series of etching experiments have been carried out using different etchant concentration and temperatures. Etching at elevated temperatures was found to improve the surface quality as well as shorten the etching time in all the etchants. At 120°C, we get a smooth surface (Ra?=?21.2?nm) with an etching rate 12.2???m/min in 40wt% KOH solution. At 125°C, EDP solution (88wt%) was found to produce smoothest surface (Ra?=?9.4?nm) with an etch rate of 1.8???m/min. In TMAH solution (25wt%), the best surface roughness was found to be 35.6?nm (Ra) at 90°C with an etch rate of 1.18???m/min. The activation energy and pre-exponential factor in Arrhenius relation are also estimated from the corresponding etch rate data.     

Comparison of etch characteristics of KOH,TMAH and EDP for bulk micromachining of silicon (110)

Bulk micromachining in Si (110) wafer is an essential process for fabricating vertical microstructures by wet chemical etching. We compared the anisotropic etching properties of potassium hydroxide (KOH), tetra-methyl ammonium hydroxide (TMAH) and ethylene di-amine pyro-catechol (EDP) solutions. A series of etching experiments have been carried out using different etchant concentration and temperatures. Etching at elevated temperatures was found to improve the surface quality as well as shorten the etching time in all the etchants. At 120°C, we get a smooth surface (Ra = 21.2 nm) with an etching rate 12.2 μm/min in 40wt% KOH solution. At 125°C, EDP solution (88wt%) was found to produce smoothest surface (Ra = 9.4 nm) with an etch rate of 1.8 μm/min. In TMAH solution (25wt%), the best surface roughness was found to be 35.6 nm (Ra) at 90°C with an etch rate of 1.18 μm/min. The activation energy and pre-exponential factor in Arrhenius relation are also estimated from the corresponding etch rate data.

     

Sidewall roughness control in advanced silicon etch process

In ICP-RIE process, there have been many investigations on etching rate. However, only few published reports mentioned the sidewall roughness, which is a critical issue for optical devices. Here, experimental investigations about fabrication parameters in the STS advanced silicon etch (ASE) process for sidewall roughness are performed. In our experiments, several parameters in the ASE process like over time, ramping time, Ar flow rate, platen power, and etching cycle time have been systematically studied. It is found that sidewall mean roughness can be down to 9.11 nm at etching rate of 2.5 m/min. Comparing with other published works at similar sidewall roughness (around 10 nm), our experimental data have the highest silicon etching rate. For the same STS ICP-RIE systems, our data have smallest sidewall roughness, comparing to previous data published in the litherature.The support from National Science Council of the Republic of China under grant number NSC89-2218E009-111 is acknowledged. Authors would like to thank the technical support from Precision Instrument Development Center of National Science Council, and Semiconductor Research Center of National Chiao Tung University. We especially thank Mr. Nien-Nan Chu and Mr. Sy-Hann Chen for their technical assistance in SEM and AFM.     

Improvement of sidewall roughness in deep silicon etching

The recently developed High Aspect Ratio Si Etch (HARSE) process is widely used for applications requiring silicon structures with high aspect ratios. This process relies on the alternation of sidewall passivation and silicon etching phases and enables the obtainment of high silicon etch rates and highly anisotropic profiles. This paper reports an innovative approach to improve the sidewall roughness through a multiple-step HARSE process using an ICP system. Unlike the standard HARSE process, the etching conditions for this new process are gradually altered in order to reinforce the silicon etch efficiency as a function of the silicon depth previously etched. Trenches with aspect ratios as high as 40 can be achieved. The sidewall roughness along the entire etching depth is less than 8 nm rms. In comparison with the standard HARSE process in which ripples appear on the trenches sidewall, the sidewall roughness is improved by a factor of 4. Received: 15 July 1999/Accepted: 30 July 1999     

Etching behaviour of sputter-deposited aluminium nitride thin films in H3PO4 and KOH solutions

Aluminium nitride (AlN) reactively sputter deposited from an aluminium target is an interesting compound material due to its CMOS compatible fabrication process and its piezoelectric properties. For the implementation in micromachined sensors and actuators an appropriate patterning technique is needed to form elements made of AlN. Therefore, the influence of different sputtering conditions on the vertical etch rate of AlN thin films with a typical thickness of 600 nm is investigated in an etch mixture based on phosphoric acid. Under comparable conditions, such as temperature and concentration of the etchant, thin films with a high c-axis orientation are etched substantially slower compared to films with a low degree of (002) orientation. When a high c-axis orientation is present detailed analyses of the etched topographies reveal surface characteristics with a low porosity and hence, low roughness values. From temperature dependant etching experiments an activation energy of 800(± 30) meV is determined showing a reaction-controlled etching regime independent of sputter deposition conditions. For comparison, AlN films synthesized under the same conditions were etched in potassium hydroxide (KOH) at room temperature revealing comparable etching characteristics as a function of deposition parameters. Depending on the degree of (002) orientation the topography of the etched samples show a strong increase in surface roughness with time due to a selective etching behaviour between (002) and residual crystallographic planes.     

Impact of alcohol additives concentration on etch rate and surface morphology of (100) and (110) Si substrates etched in KOH solutions

The influence of alcohol concentration on etch rate and surface morphology of (100) and (110) Si planes was investigated in this paper. The etching processes were carried out in KOH solutions with different concentrations of isopropanol and butanols. The etch rate minima versus alcohol concentration were observed for all the alcohols used in the experiments. Furthermore, close to the concentrations of etch rate minima, the smooth (110) planes were obtained. However, the (100) surfaces were covered with hillocks at these concentrations. Based on the surface tension measurements and literature reports, the explanation of appearance of the etch rate minimum was suggested. In the proposed model, the adsorption maximum corresponds to the complete formation of an alcohol monolayer on Si surface and, consequently, to the etch rate minimum. At higher concentrations of alcohol, the monolayer disappears and the etch rate increases.     

Fine ZnO patterning with controlled sidewall-etch front slope

This paper describes a wet-etching technique that solves the major difficulty of fine patterning a c-axis oriented polycrystalline ZnO film. The technique uses aqueous NH/sub 4/Cl with electrolytically added copper ions and convection flow, and for the first time, allows the ZnO film to be etched 1) with controlled etch rate ratio between the vertical and horizontal etch rates and 2) with controlled etch-front slope. The ratio between the vertical and horizontal etch rates is as high as 20 to 1, while the angle between the sidewall etch-front surface and the substrate surface can be electrically controlled between 73/spl deg/ and 106/spl deg/. Also, ZnO films can now be patterned to fine features (even sub-/spl mu/m level) with a wet etchant. The electroless galvanic etching technique described in this paper produces uniform etching over a large area (larger than 3" in diameter).     

Mechanical strengthening of Si cantilever by chemical KOH etching and its surface analysis by TEM and AFM

Mechanical strengthening of a Si cantilever by applying KOH wet etching was investigated. Two kinds of Si cantilever specimens having the different crystallographic orientations of the sidewall surfaces, i.e., Si{100} and Si{110}, were fabricated from the same SOI wafer by a Bosch process. The typical height and pitch of the scalloping formed on the sidewall were 248 and 917 nm, respectively. A 50 % KOH (40 °C) chemical wet etching was applied to increase the fracture stress of the Si cantilever. The fracture stress in the both of Si{100} and Si{110} cantilevers increased with the advance of the etching. The obtained maximum fracture stress in Si{100} and Si{110} were 4.2 and 3.7 GPa, respectively. Sidewall surface of the cantilever was analyzed to investigate the mechanical strengthening of Si cantilever by wet etching. The etched surface crystalline was analyzed by the transmission electron microscope (TEM), and confirmed that the thickness of the affected flow layer was less than 10 nm from the obtained TEM image. Then the change of the surface roughness by the KOH etching was analyzed by the atomic force microscope. The surface was smoothened with the advance of the KOH etching. The roughness value of Ra in Si{100} and Si{110} decreased to 12.1 and 37.7 nm, respectively.     

纳米厚度牺牲层腐蚀速率研究

通过大量的实验研究,建立了一套纳米量级牺牲层腐蚀行为的实验研究方法.对牺牲层厚度对腐蚀速率的影响进行了详细地研究,并得到了如下结论:当牺牲层厚度达到微米量级时,其腐蚀速率随着牺牲层厚度的增大而加快,但当其达到纳米量级时,由于固体表面存在的静电荷而产生双电层效应,这种效应对腐蚀速率的影响超过了牺牲层厚度的影响,最终使得腐蚀速率和牺牲层厚度无关.     

Pyrex玻璃的ICP刻蚀技术研究

以SF6/Ar为刻蚀气体,采用感应耦合等离子体(ICP)刻蚀Pyrex玻璃,研究气体流量、射频功率对刻蚀速率及刻蚀面粗糙度的影响.采用正交实验方法找出优化的实验参数,得到Pyrex玻璃刻蚀速率为106.8 nm/min,表面粗糙度为Ra=5.483 nm,实验发现增加自偏压是提高刻蚀速率、减小刻蚀面粗糙度的有效方法.