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1.
Lv  J. Jiang  Y.D. Zhang  D.L. Zhou  Y. 《Electronics letters》2008,44(12):733-735
A low-noise readout architecture for uncooled microbolometer focal plane arrays is described. A 40times30 uncooled microbolometer focal plane array based on the low-noise ROIC was implemented on silicon using a 0.5 mum CMOS technology. Total output noise voltage is 260 V RMS. Experimental values of voltage responsivities of 3.98 105 V/W on average at 1 Hz modulation frequency have been achieved.  相似文献   

2.
This paper describes a readout integrated circuit architecture for an infrared focal plane array intended for infrared network-attached video cameras in surveillance applications. The focal plane array consists of 352 × 288 uncooled thin-film microbolometer detectors with a pitch of 25 μm, enabling ambient temperature operation. The circuit features a low-noise readout path, detector resistance mismatch correction and a non-linear ramped current pulse scheme for the electrical biasing of the detectors in order to relax the dynamic range requirement of amplifiers and the ADC in the readout channel, imposed by detector process variation and self-heating during readout. The design is implemented in a 0.35-μm standard CMOS process and two versions of a smaller 32 × 32-pixel test chip have been fabricated and measured for evaluation. The latest test chip achieves a dynamic range of 97 dB and an input-referred RMS noise voltage of 6.4 μV yielding an estimated NETD value of 26 mK with f/1 optics. At a frame rate of 60 FPS the chip dissipates 170 mW of power from a 3.4 V supply.  相似文献   

3.
A high-performance CMOS readout integrated circuit (ROIC) with a new temperature and power supply independent background current and dark current suppression technique for room-temperature infrared focal plane array applications is proposed. The structure is composed of an improved switched current integration stage, a new current-mode background suppression circuit, and a high linearity, high voltage swing output stage. An experimental readout chip has been designed and fabricated using the Chartered 0.35 μm CMOS process. Both the function and performance of the proposed readout circuit have been verified by experimental results. The test results show that the detector bias error in this structure is less than 0.1 mV. The input resistance is close to an ideal value of zero, and the injection efficiency is almost 100%. The output voltage linearity of the designed circuit is more than 99%. The background suppression level is tunable between 8 nA–1.5 μA, and the background suppression uniformity is as high as 100%. A unit-cell occupies a 10 μm × 15 μm area and consumes less than 0.07 mW power.  相似文献   

4.
This paper presents a monolithic uncooled 8 × 8 bolometer array with polycrystalline silicon-germanium (poly-SiGe) thermistors as active elements. The poly-SiGe films are deposited by ultrahigh vacuum vapor deposition (UHV/CVD) system and the dependence of the temperature coefficient of resistance (TCR) on annealing temperature has been investigated. To decrease the thermal conductance of the bolometer, the poly-SiGe thermistor was formed on a four leg suspended microbridge. The improved porous silicon micromachining techniques described here enable the integration of the bolometer array with the MOS readout circuitry. The measurements and calculations show that the mean responsivity is 1.07 × 104 V/W with an uncorrected uniformity of 10.5% and a thermal response time of 10.5 ms, and the detectivity of 3.75 × 108 cm Hz1/2/W is achieved at a chopping frequency of 30 Hz and a bias voltage of 5 V.  相似文献   

5.
In this paper, the integration of an experimental 32 × 32 uncooled IR microbolometer array with an unplanar CMOS Readout Integrated Circuit (ROIC) is presented. A vanadium oxide film fabricated by low temperature reactive ion beam sputtering is utilized as thermal-sensitive material in the bolometric detectors Before the integration, the unplanar ROIC for commercial use is first planarized by bisbenzocyclobutene film, then a electroless nickel-plating on ohmic contact areas is accomplished. Finally the bolometer array is fabricated using a micromachining process, which is completely compatible with CMOS technology. Measurements and calculations for the as-fabricated samples show that the responsivity of 1.4 × 104 V/W and the detectivity of 2.1 × 108cmHz1/2W?1 and a thermal response time of 10ms are obtained at a pulse bias of IV.  相似文献   

6.
A new CMOS readout circuit for VO2-based uncooled FPAs is presented in this paper. The on-chip readout circuit consists of three major parts: An input circuit of BCDI structure, a column-shared integration circuit of CTIA structure, and a common CDS output circuit. The simple configuration of the input circuit makes it possible to operate more circuits in parallel, and increases the integration time and number of pixels, the column-shared integration circuit which is suitable for small pixel size provides low noise, high gain, a highly stable detector bias, and high photon current injection efficiency, and the common CDS output circuit is utilized to reduce or eliminate low-frequency noise of the readout circuit. An experimental readout chip for 50-μm-pitch 32×32 element VO2-based uncooled FPAs has been fabricated. The measurement results of the fabricated readout chip have successfully verified its readout function and excellent performance.  相似文献   

7.
非致冷微测热辐射计阵列的设计   总被引:1,自引:0,他引:1  
非致冷微型热辐射计焦平面阵列技术在国内已成为研究热点。介绍了微测热辐射计的原理并对其作了简化的计算分析,给出了微测热辐射计的结构、材料、封装和读出电路等重要部分的一些设计方案。  相似文献   

8.
In this paper, high performance read-out integrated circuits (ROIC) for infrared (IR) image sensor applications is proposed. Because an uncooled microbolometer image sensor, used in an IR image sensor, is made by a micro electro mechanical systems process, the resistance of bolometer by each process does not appear same value under same temperature condition. This resistance variation generates a different output signal for same input by each chip. In order to improve on these drawbacks, a ROIC, which compensates for the error described above, was designed. Instead of a single input mode, a differential input mode ROIC was proposed and thus, a new circuit structure was proposed. Using results from a computer simulation, improvements such as that the effect of the process error was decreased 10–12% without an additional compensation circuit was found. Based on the simulation results, a prototype device including a ROIC and a micro bolometer with 16 × 16 cell arrays was fabricated and characterized.  相似文献   

9.
The next generation of infrared (IR) sensor systems will include active imaging capabilities. One example of such a system is a gated active/passive system. The gated active/passive system promises target detection and identification at longer ranges compared to conventional passive-only imaging systems. A detector that is capable of both active and passive modes of operation opens up the possibility of a self-aligned system that uses a single focal plane. The mid-wave infrared (MWIR) HgCdTe electron injection avalanche photodiode (e-APD) provides state-of-the-art 3 μm to 5 μm performance for the passive mode and high, low-noise, gain in the active mode, and high quantum efficiency at 1.5 μm. Gains of greater than 1000 have been measured in MWIR e-APDs with a gain-independent excess noise factor of 1.3. This paper reports the application of the mid-wave HgCdTe e-APD for near-IR gated-active/passive imaging. Specifically a 128 × 128 focal-plane array (FPA) composed of 40-μm-pitch MWIR cutoff APD detectors and custom readout integrated circuit was designed, fabricated, and tested. Median gains as high as 946 at 11 V bias with noise equivalent photon inputs as low as 0.4 photon were measured at 80 K and 1 μs gate times. This subphoton sensitivity is consistent with the high gains, low excess noise factor, and low effective gain normalized dark-current densities, near or below 1 nA/cm2, that were achieved in these FPAs. A gated imaging demonstration system was designed and built using commercially available parts. High resolution and precision gating was demonstrated in this system by imagery taken at ranges out to 9 km.  相似文献   

10.
《Microelectronics Journal》2007,38(6-7):735-739
A new structure uncooled amorphous silicon (a-Si) microbolometer for infrared (IR) detection has been fabricated and characterized. New type of thermal isolation and IR absorption structures based on polyimide (PI) and bottom metal reflective layer are presented. The fabrication process is described in this paper. The as-prepared microbolometer has the advantage of low cost, high yield and moderate performance. The dependence of resistance with different aspect ratio on operating temperature has been investigated and the temperature coefficient of resistance (TCR) is achieved. Based on the measured responsivity and noise characteristics, the influence of detectivity on chopping frequency is discussed. According to the measurements and calculations results, the maximal TCR is −2.8% and at a bias voltage of 5 V, the maximum detectivity of 1.7×108 cm Hz1/2 W−1 is achieved at chopping frequency of 30 Hz.  相似文献   

11.
非制冷焦平面热像仪温度控制设计   总被引:4,自引:3,他引:1  
在分析法国ULIS公司生产的320×240长波红外非制冷微测辐射热计焦平面阵列探测器UL01011技术参数的基础上,论述了微测辐射热计非制冷红外焦平面热像仪温度控制的必要性,指出了温度控制设计的实质。并讨论了单片机、线性模式单芯片热电制冷器控制器和开关模式单芯片热电制冷器控制器温控方案的优缺点。提出了使用AD公司生产的全新单芯片热电制冷器控制器ADN8830的温控设计方案,以该芯片为核心设计出适合320×240长波红外非制冷微测辐射热计焦平面阵列探测器UL01011的温度控制电路,该电路能够把焦平面阵列温度变化控制在30±0.01℃范围内,使探测器工作在最佳温度。该方案功耗低、效率高、体积小,是一种较好的温控设计方案。  相似文献   

12.
This paper presents a low noise accelerometer microsystem with a highly configurable capacitive interface circuit. A programmable capacitive readout circuit is designed to minimize the offset and gain error due to the parasitic capacitance mismatch and the process variations. The interface circuit is implemented in a 0.5 μm 2P3M CMOS technology with EEPROM. The interface circuit and MEMS sensing element are integrated in a single package, and consist the accelerometer microsystem. The supply voltage and supply current of the system are 5 V and 1.17 mA, respectively. The input range and gain are 2.5 V and 0.5 V/g, respectively. The max–min gain error and max–min offset error after calibration was measured to be 1.2% FSO and 3.3% FSO, respectively. The signal to noise ratio (SNR) and noise equivalent resolution (NER) are measured to be 93.1 dB and 110.6 μg/√Hz, respectively, when a 40 Hz, 5 g sinusoidal input acceleration is applied.  相似文献   

13.
针对非制冷微悬臂梁电容式红外探测器,设计了一款焦平面读出电路.根据电路噪声建模与分析,对电路进行了优化设计以抑制噪声.采用0.35μm的CMOS工艺设计,制造了16×16读出电路原型.测试结果表明,5V电源电压、50Hz帧频下电路总功耗为16.5mW,典型工作模式下线性度为99.2%,通道一致性大于97%,等效输入噪声电荷小于150e.  相似文献   

14.
偏置电压对于非制冷红外成像系统起着关键作用,新一代红外焦平面阵列读出电路结构要求精度更高、可调范围更大、更加稳定的偏置电压.从电压的产生原理入手,设计了单片机控制数字电位器、运算放大器产生偏压及引入ADC器件TLV2544的闭环反馈自动控制系统结构,结合开发的电脑界面控制窗口更加方便控制偏压的输出.通过实际测试,该系统...  相似文献   

15.
A pixelwise readout circuit for application in microbolometer focal plane arrays (FPAs) is studied. A current mirroring injection input circuit that is suitable for a pixelwise architecture and has high responsivity is proposed. The noise equivalent temperature difference can be improved to 31 mK.  相似文献   

16.
李凯  周云  蒋亚东 《红外》2011,32(9):1-4
设计了一种用于新型非致冷红外焦平面阵列读出电路的低温漂低压带隙基准电路.提出了同时产生带隙基准电压源和基准电流源的技术.通过改进带隙基准电路中的带隙负载结构及基准核心电路,可以分别对基准电压和基准电流进行温度补偿.在0.5μm CMOS N阱工艺条件下,采用Spectre软件进行了模拟验证.仿真结果表明,在3.3 V条...  相似文献   

17.
A fully CMOS based voltage reference circuit is presented in this paper. The voltage reference circuit uses the difference between gate-to-source voltages of two MOSFETs operating in the weak-inversion region to generate the voltage with positive temperature coefficient. The reference voltage can be obtained by combining this voltage difference and the extracted threshold voltage of a saturated MOSFET which has a negative temperature coefficient. This circuit, implemented in a standard 0.35-μm CMOS process, provides a nominal reference voltage of 1.361 V at 2-V supply voltage. Experimental results show that the temperature coefficient is 36.7 ppm/°C in the range from −20 to 100°C. It occupies 0.039 mm2 of active area and dissipates 82 μW at room temperature. With a 0.5-μF load capacitor, the measured noise density at 100 Hz and 100 kHz is 3.6 and 2 5 \textnV/?{\textHz} , 2 5\,{\text{nV}}/\sqrt {\text{Hz}} , respectively.  相似文献   

18.
郑磊 《电子世界》2013,(13):43-44
对一种响应近红外的新型量子光电探测器特性进行测试和分析,给出了2×8探测器阵列和读出电路的对接测试结果,设计初步的成像系统采集显示焦平面输出。探测器有一个-0.8V的阈值电压,偏压大于阈值电压后器件响应率远大于1A/W,且响应率随光照功率增大减小。2×8探测器阵列与设计的读出电路通过Si基板对接后在77K条件测试,读出电路的线性度好于99.5%,信噪比达到67dB,探测器偏压为-1.5V,积分时间为200μs时探测器率达到1.38×1010cmHz1/2/W,达到实际应用的要求。设计了数据采集卡和成像系统验证了对接样品的实用性。  相似文献   

19.
A CMOS current-mode analog multiplier/divider circuit is presented. It is suited to standard CMOS fabrication and can be successfully employed in a wide range of analog signal processing applications. Measurement results for a 0.5 μm CMOS test chip prototype verify the approach employed. The circuit consumes 120 μW using a single supply voltage of 1.5 V and requires a silicon area of 150 × 140 μm.  相似文献   

20.
二极管非制冷红外探测器及其读出电路设计   总被引:1,自引:0,他引:1       下载免费PDF全文
针对非制冷红外技术的低成本高性能应用,提出了基于SOI的二极管红外探测器及其读出电路的集成设计方案。阐述了二极管非制冷红外探测器的基本原理和工艺实现。对探测器的电学特性进行理论推导,得出读出电路的设计指标。采用连续时间自稳零电路结构实现探测器输出信号的低噪声低失调放大,采用级联滤波器以减弱开关非理想因素的影响,并采用片内电容采样保持,使得I/O引脚数较少,从而减小版图面积。采用spectre工具进行仿真,在CSMC 0.5 m 2P3M CMOS工艺下实现。结果表明:读出电路性能良好,闭环增益为65.8 dB,等效输入噪声谱密度为450 nV/Hz,等效输入失调电压100 V以内,功耗为5 mW,能实现探测器信号的准确读出。  相似文献   

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