Effect of capping silicon nitride layer and nitrided gate oxide on hump of transistors

In this letter, we investigate the effect of capping silicon nitride and nitrided gate oxide on the hump in the sub-threshold slope of various transistors. Silicon wafers having both high- and low-voltage transistors are fabricated. The thin gate oxide is grown by nitric oxidation, while two step process of dry oxidation and low-pressure chemical vapor deposition (LPCVD) is used for the thick gate oxide. Note that the thickness of thin gate oxide is 4.5 nm, and 29 nm for thick gate oxide. It appears that both low-voltage nMOS and pMOS do not show any hump, nor does high-voltage pMOS. The subthreshold hump of high-voltage nMOS depends on process conditions. It shows severe hump without capping silicon nitride layer due to moisture diffusion during thermal anneal after interlayer oxide deposition by LPCVD. It also appears that nitrided oxide is effective to prevent hump by stopping moisture diffusion.     

Cr,Ca:Y3Al5O12晶体中四配位四价铬离子激光中心的形成

在以中频感应提拉法生长Cr,Ca:Y3Al5O12晶体的基础上,根据不同Ca/Cr掺杂浓度比的晶体于空气中退火前后的吸收光谱数据,建立了四配位四价Cr激光中心形成的缺陷反应方程,认为Cr3+到Cr4+的价态转变与晶体中带有两个而不是一个正电荷的氧离子空位有关。     

Study of 90-nm MOSFET subthreshold hump characteristics using newly developed MOSFET array test structure

We report 90-nm MOSFET subthreshold hump characteristics obtained for the first time by using a newly developed MOSFET array test structure. The array contains small-scale device-under-test groups with a new poly-Si gate layout pattern, which eliminates the influence of gate leakage and off leakage currents observed on measured MOSFET parameter data such as Vth, Ion, and subthreshold slope. We confirmed that subthreshold humps occur at random in an array. The rate at which humps occur is expressed as a percentage with respect to the whole array (referred to as the hump occurrence rate); the rate depends on chips from a wafer. It is also confirmed that the influence of subthreshold humps on /spl sigma/(Vth) is not negligible, and we revealed that it is important to design RF/analog circuits with an appropriate current density to reduce their influence. By extracting hump variations using a MOSFET array, it is possible to accurately estimate and reduce the standby current in logic large-scale integration (LSI) chips.     

Effect of the state of vacancy equilibrium on diffusion of chromium impurity in gallium arsenide

The results of studying the diffusion of Cr impurity in GaAs according to electrical measurements are reported. Dependences of the diffusion coefficient and limiting solubility of electrically active Cr atoms in GaAs on temperature (at fixed pressures of As vapors) and on the pressure of As vapors (at fixed temperatures) are determined. The dependence of the Cr diffusion coefficient in GaAs on the ratio between the volume of the sample under study to the volume of the cell in the case of pronounced deviation from the crystal’s stoichiometry towards Ga excess is established. The obtained experimental data are analyzed on the basis of concepts concerning the dissociative mechanism of migration of Cr atoms in the GaAs crystal lattice; according to this mechanism, the diffusion coefficient depends heavily on the concentration of Ga vacancies.     

Cr对钙钛矿型氧敏材料性能的影响

利用固相合成法制备了不同Cr含量的氧敏陶瓷样品,研究了添加剂Cr对钙钛矿型氧敏材料性能的影响,测量了不同氧分压下的阻–温特性和氧敏特性。结果表明:在SrTiO3中Cr离子替钛位可使SrTiO3实现p型掺杂;Cr掺杂促进了氧空位的产生,加强环境氧与晶格氧的交换,提高了氧灵敏度,使其达到9;Cr离子变价增加了空穴载流子浓度,提高了材料的电导率,使电阻值降低到几千欧。     

黄浦江不同水质指标的光谱响应模型比较研究

对黄浦江全河段进行了光谱反射率和典型水质参数的同步测量,测量的水质参数包括总磷(TP)、总氮(TN)、溶解氧(DO值)、高锰酸盐指数(CODMn)、化学需氧量(CODC r)、五日生化需氧量(BOD5)、悬浮物浓度(TSS)、浊度(Turb)和氨氮(NH3-N)共9个水质指标,分析了9个水质指标之间的相关关系.研究了单波段归一化反射率与各水质指标的线性关系模型.结果表明,单波段光谱反射率与除氨氮和化学需氧量2个水质指标之外的其余7个水质指标有较好的相关关系,光谱反射率的比值与水质指标的相关性得到一定提高,与氨氮和化学需氧量2个水质指标的相关系数也大于0.5.     

光纤激光焊接工艺参量对底部驼峰的影响

为了研究高功率光纤激光焊接工艺参量对底部驼峰倾向的影响,采用单一变量方法研究了激光功率、焊接速度、离焦量、下表面保护气体流量及焊接方位的变化对底部驼峰的影响。结果表明,随激光功率的增加,底部驼峰倾向先加大后减小;焊接速率提高时,底部驼峰高度先增加后减小,驼峰间距明显减小;离焦量在0mm附近时,底部驼峰倾向较大;适当的下表面保护气体流量有助于减小底部驼峰倾向,最佳流量为15L/min;焊接方位为60时,一定程度上可减小底部驼峰倾向。优化后的工艺参量合理, 可有效地消除底部驼峰。     

SOI-LDMOS器件改善电安全工作区后驼峰现象的研究

研究了高压SOI-LDMOS器件在引入P-sink结构改善电安全工作区(E-SOA)后I-V特性曲线呈现的驼峰现象(hump)。首先将驼峰现象出现后器件的源端总电流分成电子电流与空穴电流单独分析,确定高栅压下电子电流阶梯上升是驼峰现象产生的表面原因,进而通过仿真分析出Kirk效应导致的空穴电流在表面漂移区中电导调制是驼峰现象产生的根本原因。最后,根据对驼峰现象的分析,设计出新器件结构成功消除了驼峰现象,为今后不同类型LDMOS器件改善I-V曲线驼峰现象提供了理论指导。     

Magnetic Properties of Vacancies and Doped Chromium in a ZnO Crystal

The electronic and magnetic properties of ZnO containing Cr doped atoms and Zn and O vacancies in its crystal structure are theoretically investigated. Calculations are performed using Atomistix Tool Kit and Vienna Ab-initio Simulation Package software implementing the electron density functional theory method with the Hubbard correction. It is shown that the magnetic moment of a defect supercell strongly depends on the impurity concentration and presence of vacancies. The doping of an oxygen atom increases the probability of zinc-vacancy formation.     

Mode coupling effects of the cutoff wavelength characteristics ofdispersion-shifted and dispersion-unshifted single-mode fibers

The authors present theoretical background and experimental results to clarify the nature of the hump in the cutoff region of different types of single-mode fibers and discuss its implications. A theoretical model in terms of the coupling between the whispering-gallery mode formed near the silica-cladding/primary-coating boundary and the first higher-order core mode is presented to explain the presence of the hump. An experimental verification of this theoretical model is presented for these fibers. In addition, the curvature sensitivity of the hump is studied for these three fiber types. The results of the study show that for both dispersion-shifted and matched-cladding, dispersion-unshifted fibers, the hump is curvature sensitive and occurs at intermediate (28 and 15 cm) bend diameters. At large (40 cm) and small (10 cm) bend diameters, the hump was not observed in the cutoff region of these two fiber types. However, in the case of the depressed-cladding fiber, the hump was found to be curvature insensitive and occurred at all bend diameters (40, 28, 15, and 10 cm) used in this study     

Chromium etching characteristics using a planar type plasma reactor

The dry etching characteristics of Cr film in the CCl₄/O₂ mixed gas plasma have been investigated with a variety of etching parameters in the planar type reactor with the 13.56 MHz rf power. Moreover the dry etching resistance of EB resists and variation of the feature size on a 12.5 and 15 cm Cr-Mask are described. The etch rate of Cr film depends strongly on the etchant gas composition ratio, the electrode separation and the electrode surface materials. In the cathode coupling mode with a gas pressure of 0.2 Torr, a gas flow rate of CCl₄/O₂ of 0.5, electrode separation of 80 mm and rf power density of 0.38 W/cm², the following results are obtained: (1) The etch rate of Cr film is about 30 nm/min, Paper presented partially at 23rd Annual Electronic Materials Conference, University of California, Santa Barbara, California, June 24, 1981.     

Enhanced low-temperature corner current-carrying inherent toshallow trench isolation (STI)

The subthreshold hump in the current-voltage (I-V) characteristics caused by the current-carrying corner in shallow-trench-isolated (STI) n-channel MOSFET's is significantly enhanced at reduced temperatures. Numerical simulations show that the sensitivity of the corner channel's threshold voltage to temperature is smaller than that of the center channel's threshold voltage. This, together with the reduced subthreshold swing at low temperatures, contribute to an enhanced subthreshold hump, and is potentially important for emerging cryogenic applications     

Stress-Induced Hump Effects of p-Channel Polycrystalline Silicon Thin-Film Transistors

Positive bias temperature instability in p-channel polycrystalline silicon thin-film transistors is investigated. The stress-induced hump in the subthreshold region is observed and is attributed to the edge transistor along the channel width direction. The electric field at the corner is higher than that at the channel due to thinner gate insulator and larger electric flux density at the corner. The current of edge transistor is independent of the channel width. The electron trapping in the gate insulator via the Fowler–Nordheim tunneling yields the positive voltage shift. As compared to the channel transistor, more trapped electrons at the edge lead to more positive voltage shift and create the hump. The hump is less significant at high temperature due to the thermal excitation of trapped elections via the Frenkel–Poole emission.      

Effect of electronegative impurities on electronic conduction in compressed nitrogen

Measurements of pulsed electron currents in compressed nitrogen show that appreciable attachment occurs to oxygen impurity of the order of 10 parts per million, and that the process depends on the partial pressure of oxygen, as well as on the ratio of electric field and gas density, E/p.     

The rate variability-distortion (VD) curve of encoded video and its impact on statistical multiplexing

Encoded video is expected to contribute a significant portion of the load on future communication systems and networks, which often employ statistical multiplexing. In such systems, the number of video streams that can be supported depends both on the mean bit rate as well as bit rate variability of the video streams. At the same time, the utility (revenue) earned from video streaming depends both on the number of supported video streams as well as their quality level. In this paper we examine the interplay between video quality, traffic variability, and utility for open-loop encoded video. We introduce the rate variability-distortion (VD) curve which relates the bit rate variability to the quality level of an encoded video. We find that the VD curve generally exhibits a characteristic "hump" behavior of first increasing, peaking, and subsequently decreasing variability for increasing quality. We examine the impact of video content characteristics, encoding parameters, and traffic smoothing on the VD behavior. We describe a methodology for assessing (i) the set of the video streams that can be supported with a statistical quality of service requirement, and (ii) the utility earned from video streaming over a link. This methodology is based on the rate-distortion and rate variability-distortion characteristics of the videos. We find that the statistical multiplexing gain and the utility as a function of the video quality level typically exhibit a "hump" similar to the VD curve.     

Substrate current characterization and optimization of high voltage LDMOS transistors

A 30-V LDMOS integrated with a standard 0.15 μm CMOS process is investigated for its double-hump substrate current (I_b) characteristics. The origin of this abnormal second substrate current hump is explained by Kirk effect. The impact of this second hump of I_b on reliability and device performance is observed. An analytical expression for the second hump of I_b is established by calculating the impact ionization in the drift region according to the electric field distribution obtained by solving Poisson’s equation. The calculated results are compared against the silicon data under various gate/drain bias voltages showing excellent consistency. Additionally, based on the derived expressions for substrate current, the process parameters are optimized achieving much lower substrate current and better reliability performance.     

台达变频器在切削力测量实验中的应用

切削力是金属切削中的重要现象之一,与切削速度呈驼峰曲线关系。为了使车削中的切削速度不受工件直径变化影响,而得到清晰完整的驼峰曲线,采用台达变频器对机床主电机进行无级调速,从而使主轴转速由主电机工作频率和调速手柄共同决定。实验结果表明无级调速可得到较理想的驼峰曲线。     

Characterisation of a new hump-free device structure for smart power and embedded memory technologies

A new device structure suitable for smart power and embedded memory technologies is presented that provides ideal hump-free subthreshold behaviour for shallow trench isolations by locally thickening the gate dielectric. This device structure is compared with an alternative approach to remove the hump effect, an improved process that reduces the oxide recess of the isolating trench. The new device offers a superior subthreshold slope. Emphasis has been placed not only on the hump effect but also on the reliability characterisation. The gate integrity of the new structure is comparable and only a minor degradation of the hot-carrier lifetime is observed. The new device structure provides an easy way to remove the hump without any change in the process and is applicable to every technology that offers more than one gate dielectric.     

High speed and high density static induction transistor memory

Describes a high speed and high density dynamic RAM utilizing a static induction transistor (SIT) structure. The main conduction mechanism of an SIT is carrier injection control due to the potential hump at the intrinsic gate, where the potential hump is capacitively controlled by the gate and the drain voltage in a basic operation. The SIT forms a dynamic RAM memory cell if one of the drain and the source regions is set as a floating region directly connected to the storage capacitor. Basic operation of a single SIT memory cell is experimentally demonstrated in this paper.     

2.79 μm YSGG:Cr:Er laser pumped at 790 nm

2.79 μm quasi-CW laser operation at room temperature was achieved from a YSGG:Cr:Er crystal. The output from the crystal, which was longitudinally pumped with a Ti:sapphire laser at 790 nm, was self-terminating. Under quasi-CW pumping, the length of the emitted pulses decreased exponentially with increasing pump power. The self-terminating behavior is explained by thermal effects with a computer simulation of the population mechanisms in the crystal. This simulation considers not only the common cross-relaxation and up-conversion processes, but also the inverse processes. They turn out to be of the same importance as the normal processes. The YSGG:Cr:Er crystal depends so critically on the laser parameters that it is an ideal candidate for testing the system of rate equations