聚合物薄膜场效应晶体管研究进展

有机薄膜场效应晶体管（OFET）在电子报纸、智能识别卡、大面积平板显示及柔性显示、传感器、数字逻辑电路等方面具有非常广阔的应用前景。在OFET家族中，聚合物半导体膜因具有机械性能好、热稳定性高、成膜方法简单经济以及特别适合于制备大面积器件等特点，而使聚合物薄膜场效应晶体管（PFET）近几年来倍受关注。本文概述PFET的基本结构和工作原理、器件设计和制备以及相关的研究进展，最后讨论PFET器件未来的研究方向。     

有机发光晶体管的研究进展

兼备有机发光二极管及薄膜场效应晶体管特性的有机发光晶体管(OLET)不仅可能取代薄膜晶体管驱动的液晶显示,应用于大面积的全有机有源矩阵柔性显示中,还在集成电路信号处理等方面具有潜在的应用价值.文章概述了OLET的发展进程,并从器件结构、工作原理和材料等方面对其进行了概述.     

无结场效应管——新兴的后CMOS器件研究进展

迄今为止,现有的晶体管都是基于PN结或肖特基势垒结而构建的。在未来的几年里,CMOS制造技术的进步将导致器件的沟道长度小于10nm。在这么短的距离内,为使器件能够工作,将不得不采用非常高的掺杂浓度梯度。进入纳米领域,常规CMOS器件所面临的许多问题都与PN结相关,传统的按比例缩小将不再足以继续通过制造更小的晶体管而获得器件性能的提高。半导体工业界正在努力从器件几何形状,结构以及材料方面寻求新的解决方案。文中研究了无结场效应器件制备工艺技术及其进展,这些器件包括半导体无结场效应晶体管、量子阱场效应晶体管、碳纳米管场效应晶体管、石墨烯场效应晶体管、硅烯场效应晶体管、二维半导体材料沟道场效应晶体管和真空沟道场效应管等。这些器件有可能成为适用于10nm及以下技术节点乃至按比例缩小的终极器件。     

石墨烯场效应晶体管研究进展

制备场效应晶体管的石墨烯主要分三种类型:大面积单层石墨烯、石墨烯纳米带和双层石墨烯片。文中介绍了这三类石墨烯场效应晶体管器件的研究进展和标志性成果,探讨了石墨烯对于场效应晶体管的影响。研究认为:与大面积单层石墨烯晶体管相比,由石墨烯纳米带制得的石墨烯场效应晶体管的开关比和电流密度等性能能够大幅度提升,可应用于逻辑电路;与大面积单层石墨烯和石墨烯纳米带相比,双层石墨烯晶体管具有更高的开关比,因此其实际应用的潜力最大。     

易于集成的有机薄膜场效应晶体管的制备

用有机半导体并五苯作为有源层,聚四氟乙烯作为绝缘层,采用全蒸镀方式在真空室一次性制备了正装结构的有机薄膜场效应晶体管(OTFT)。薄的有机绝缘层使得器件工作在低电压下,有机薄膜场效应晶体管易于与显示像素(有机发光二极管(OLED))集成在同一个透明的刚性或者柔性衬底上。研究了有机薄膜场效应晶体管的源漏接触电阻和沟道电阻对器件性能的影响,结果表明接触电阻是影响器件性能的主要因素。在透明的玻璃衬底上实现了有机薄膜场效应晶体管对同一衬底上100μm×200μm红色有机发光二极管的驱动。     

YMnO3薄膜的铁电性能及其应用

对金属－铁电体－半导体场效应晶体管器件而言，具有六方晶系结构的稀土锰酸盐（ＲｅＭｎＯ３）是性能优良的薄膜材料，它们的介电常数低，仅仅只有单一的极化轴，没有挥发性的元素Ｐｂ、Ｂｉ等。本文作者对ＲｅＭｎＯ３材料的结构特性、制备方法及其铁电性能等进行了介绍，并指出存在的困难及其发展方向。     

磷钨酸涂覆ISFET制作DrugFET的研究

用磷钨酸涂覆离子敏感场效应晶体管（ＩＳＦＥＴ）制成药物敏感场效应晶体管（ＤｒｕｇＦＥＴ），该器件具有全固态化，易微型化，集成化和多功能化等特点，用其对药物制剂的含量进行测定，所得结果和药典分析结果一致。     

聚合物栅绝缘层厚度对并五苯有机场效应管性能的影响

采用不同厚度的聚甲基丙烯酸甲酯(PMMA)作为栅绝缘层,制备了并五苯有机场效应晶体管(OFET)。测量了不同厚度的PMMA的介电特性,并详细分析了栅绝缘层厚度对器件性能的影响。其中,采用260nm厚的PMMA栅绝缘层的OFET具有比采用其它厚度的器件更优越的性能,其场效应迁移率、阈值电压与开关电流比分别达到3.39×10-3 cm2/Vs、-19V和103。     

大跨导n型Si／SiGe调制掺杂场效应晶体管

报道了第一支0．25um栅长n型Si/SiGe调制掺杂场效应晶体管的制作和器件特性结果，器件用于超高真空／化学汽相淀积（UHV／CVD）制作的器件，在300K（77K）下，应变Si沟道的迁移率和电子薄层载流子的深度为1500（9500）cm2/V.s和2．5×10^12(1.5*10^10)cm^-2，器件电流和跨导分别为325mA/mm和600mS/mm，这些值远优于Si MESFET，它们可与所获得的GaAs/Al-GaAs调制掺杂晶体管的结果相媲美。     

全离子注入自对准难熔金属氮化物复合栅GaAs MESFET技术研究

本文研究了先进的全离子注入自对准难熔金属氮化物复合栅ＧａＡｓＭＥＳＦＥＴ场效应晶体管的工艺技术．首次使用Ｍｏ／ＺｒＮ作为复合栅的材料，ＡＩＮ薄膜作为器件介质钝化层，制作出了可用于ＧａＡｓ超高速集成电路的场效应晶体管，晶体管的跨导为１６０ｍＳ／ｍｍ，其栅漏反向击穿电压大于５Ｖ．     

Improving hydrogenation efficiency of polycrystalline silicon thin film transistors by a new approach

In this paper, a new hydrogenation process of poly-Si thin film for the fabrication of poly-Si thin film transistors (TFTs) is proposed. In the new approach, the hydrogenation of TFTs is performed before deposition of contact metal. N-channel and p-channel poly-Si TFTs with various channel lengths and widths were fabricated with the new and conventional processes for comparison. The results verified that the efficiency of hydrogenation has been improved remarkably by the new process. The field-effect mobility of carriers, the on state current, threshold voltage and the on/off states current ratio have been greatly improved, and the trap state density has been reduced significantly.     

Polylactic acid as a biodegradable material for all-solution-processed organic electronic devices

In this paper we report on the fabrication of spin-coated biodegradable polylactic acid (PLA) thin films to be used as substrates for the realisation of all-solution-processed organic electronic devices. The full mechanical and electrical characterisation of these substrates shows that they exhibit good mechanical and dielectric properties and are therefore suitable for the fabrication of disposable electronics. To demonstrate practically the functionality of such PLA thin films, organic electronic devices were realised on the top of them, exclusively by means of solution-process fabrication techniques and in particular inkjet-printing. Also, a photonic curing procedure is here presented as a means for sintering the conductive inks without heating up the PLA substrates. Two types of organic transistors were fabricated on the top of PLA: organic field-effect transistors (OFETs), where the PLA film was used not only as a substrate but also as the gate dielectric, and all-inkjet-printed organic electrochemical transistors (OECTs). The second typology of transistors exhibited one of the highest transconductance reported so far in the literature (up to 2.75 mS). This study opens an avenue for the fabrication of disposable, low-cost organic electronic devices.     

Soluble pentacene thin-film transistor using a high solvent and heat resistive polymeric dielectric with low-temperature processability and its long-term stability

Solution processable organic thin-film transistors (OTFTs) were fabricated using 6,13-bis(triisopropyl-silylethynyl) pentacene (TIPS-pentacene) and low-temperature processable polyimide gate dielectric. The TIPS-pentacene OTFT with the dielectric was found to have a field-effect mobility of 0.15 cm²/Vs, which is comparable to that of OTFT with an inorganic dielectric. The OTFTs with the polyimide dielectric did not show any significant performance degradation as time passed. A field-effect mobility of the OTFTs in 60 days was found to be almost identical to that of pristine OTFT. The combination of TIPS-pentacene and our polyimide gate dielectric can be one of the potential candidates for the fabrication of stable OTFTs for large-area flexible electronics.     

Planarized copper gate hydrogenated amorphous-silicon thin-filmtransistors for AM-LCDs

We report the first fabrication of inverted-staggered back-channel-etch hydrogenated amorphous-silicon (a-Si:H) thin-film transistors (TFTs) with a planarized Cu gate electrode. The Cu gate-planarized (GP) a-Si:H TFTs, incorporating benzocyclobutene and a-SiN_x:H as a double-layer gate insulator, had a field-effect mobility of 0.75 cm²/V-s, a threshold voltage of 4.92 V, and a subthreshold swing (S) of 0.48 V/dec. These results demonstrate that the GP-TFTs can have an electrical performance comparable with the conventional TFTs without gate planarization. Thus, the gate planarization technology is suitable for application in large-area and high-resolution active-matrix liquid-crystal displays     

Transfer printing approach to all-carbon nanoelectronics

Transfer printing methods are used to pattern and assemble monolithic carbon nanotube (CNT) thin-film transistors on large-area transparent, flexible substrates. Airbrushed CNT thin-films with sheet resistance 1 kΩ sq⁻¹ at 80% transparency were used as electrodes, and high quality chemical vapor deposition (CVD)-grown CNT networks were used as the semiconductor component. Transfer printing was used to pre-pattern and assemble thin film transistors on polyethylene terephthalate (PET) substrates which incorporated Al₂O₃/poly-methylmethacrylate (PMMA) dielectric bi-layer. CNT-based ambipolar devices exhibit field-effect mobility in range 1-33 cm²/V s and on/off ratio ∼10³, comparable to the control devices fabricated using Au as the electrode material.     

Short-channel GaAs FET fabricated like a MESFET but operating like a JFET

Normally-on GaAs field-effect transistors (FETs) having 1 ?m gate lengths and 4 ?m channel lengths were fabricated in structures grown by molecular beam epitaxy (MBE). The unique part of this device is the very thin p+/n+ structure used to replace the conventional Schottky barriers. The device fabrication procedure is identical to that of a Schottky barrier FET (MESFET), but the devices exhibit characteristics similar to that of a junction field-effect transistor (JFET). This new device, the `camel diode gate FET?, is expected to have applications in both logic and power devices.     

Making GaAs integrated circuits

Digital gallium arsenide (GaAs) integrated circuits offer prospects for high-performance electronics, particularly for increased speed and radiation hardness. Prototype GaAs devices fabricated in technologies ranging from ion-implanted metal semiconductor field-effect transistors (MESFETs) and junction field-effect transistors (JFETs) to epitaxial heterostructures, such as high-electron-mobility transistors (HEMTs) and heterojunction bipolar transistors (HBTs), have demonstrated these advantages. While these GaAs technologies share many common fabrication features, the unique characteristics of each and GaAs materials present significant manufacturing challenges. It is argues that to produce real integrated circuits (ICs) for system applications, the disciplines and rigors of a production environment as well as the innovations of research and development are required     

High-performance solution-processed organic transistors with electroless-plated electrodes

Electroless-plated gold and platinum films are used as source and drain electrodes in high-performance solution-processed organic field-effect transistors (OFETs), representing a promising large-area, near-room-temperature and vacuum-free technique to form low-resistance metal-to-semiconductor interfaces in ambient atmosphere. Developing non-displacement conditions using a Pt-colloidal catalyst for soft electroless plating, the electrodes are deposited on crystallized thin films of 2,9-didecyl-dinaphtho[2,3-b:2′,3′-f]thieno[3,2-b]thiophene (C₁₀-DNTT) without significant damage to the semiconductor material. The top-contact OFETs show remarkable performance, with a mobility of 6.0 cm² V^?1 s^?1. The method represents a practical fabrication technique to mass-produce circuitry arrays of nearly best-performing OFETs for the printed electronics industry.     

On the intrinsic limits of pentacene field-effect transistors

Performance limits for pentacene based field-effect transistors are investigated using single- and polycrystalline devices. Whereas the charge transport in single crystalline devices is band-like with mobilities up to 10⁵ cm²/V s at low temperatures, temperature-independent or thermally activated charge transport can be observed in polycrystalline thin film transistors depending on the growth conditions. Trapping and grain boundary effects significantly influence the temperature dependence of the field-effect mobility. Furthermore, the device performance of p-channel transistors (mobility, on/off ratio, sub-threshold swing) decreases slightly with increasing trap densities. However, the formation of an electron accumulation layer (n-channel) is significantly stronger affected by trapping processes in the thin film devices. Single crystalline p-channel devices exhibit at room temperature mobilities as high as 3.2 cm²/V s, on/off-ratios exceeding 10⁹, and sub-threshold swings as low as 60 mV/decade. Slightly diminished values are obtained for transistors working as n-channel devices (2 cm²/V s, 10⁸, and 150 mV/decade).