Co?N graphene encapsulated cobalt catalyst for H2O2 decomposition under acidic conditions

Hydrogen peroxide (H₂O₂) has been listed as one of the 100 most important chemicals in the world. However, huge amount of residual H₂O₂ is hard to timely decomposed into O₂ and H₂O under acidic condition, easily resulting in explosion hazard. Here, we reported a core–shell structure catalyst, that is graphene with Co N structure encapsulated Co nanoparticles. Co N graphene shell serves as the active site for the H₂O₂ decomposition, and Co core further enhance this decomposition. Benefiting from it, the H₂O₂ decomposition were close to 100% after 6 cycles without pH adjustment, which increased 6 orders of magnitude compared with no catalyst. At the same time, the O₂ generation reached 99.67% in 2 h with little metal leaching, and ·OH has been greatly inhibited to only 0.08%. This work can cleanly remove H₂O₂ with little deep oxidation and protect the process of H₂O₂ utilization to achieve a safer world.     

基于SOI衬底的宽带低损耗声表面波滤波器研究

使用结构为42°Y-X LiTaO₃(600 nm)/SiO₂(500 nm)/Si的SOI衬底，通过抑制横向模式等优化设计，研制了单端谐振器和声表面波滤波器。经测试，谐振器的谐振频率为1.5 GHz，品质因数(Q)值高达4 000；滤波器的中心频率为1 370 MHz，插入损耗为-1.2 dB，1 dB带宽为74 MHz，相对带宽达到5.4%，阻带抑制大于40 dB，且温度系数在-55~+85 ℃时优于-9×10^-6/℃。该产品具有高频、宽带、低损耗、低温漂、高阻带抑制的特点，其性能指标优异，具有很好的实用性。     

Dynamic voltage scaling based energy-minimized partial task offloading in fog networks

Wireless Networks - With the dynamic voltage scaling (DVS) technology, the terminal node (TN) can dynamically adjust its computational speed, thus providing a new way to save energy during task...     

Graph-Theoretic Method on Topology Identification of Stochastic Multi-weighted Complex Networks with Time-Varying Delayed Coupling Based on Adaptive Synchronization

Neural Processing Letters - This paper is concerned with topology identification of stochastic multi-weighted complex networks based on adaptive synchronization. Different from previous work,...     

高光谱成像用高帧频CMOS图像传感器北大核心

针对高帧频、全局曝光和光谱平坦等成像应用需求,设计了一款高光谱成像用CMOS图像传感器。其光敏元采用PN型光电二极管,读出电路采用5T像素结构。采用列读出电路以及高速多通道模拟信号并行读出的设计方案来获得低像素固定图像噪声(FPN)和非均匀性抑制。芯片采用ASMC 0.35μm三层金属两层多晶硅标准CMOS工艺流片,为了抑制光电二极管的光谱干涉效应,后续进行了光谱平坦化VAE特殊工艺,并对器件的光电性能进行了测试评估。电路测试结果符合理论设计预期,成像效果良好,像素具备积分可调和全局快门功能,最终实现的像素规模为512×256,像元尺寸为30μm×30μm,最大满阱电子为400 ke^(-),FPN小于0.2%,动态范围为72 dB,帧频为450 f/s,相邻10 nm波段范围内量子效率相差小于10%,可满足高光谱成像系统对CMOS成像器件的要求。