基于印刷双层电极的氧化物薄膜晶体管

为满足印刷显示的大面积制备、低信号延迟的需求,有必要开发应用于氧化物薄膜晶体管(TFTs)的低电阻印刷电极。研究发现喷墨打印Ag和氧化物有源层的界面接触特性较差,导致基于Ag电极的氧化物TFT性能很差。通过在Ag电极和有源层中间插入喷墨打印的氧化铟锡(ITO)电极,可以阻隔Ag纳米颗粒扩散入有源层。此外,ITO电极可以与Ag和有源层形成良好的接触特性,大幅降低了接触电阻。基于Ag/ITO双层电极的TFT较基于单层Ag电极的性能大幅提升:迁移率达16.0cm~2·V~(-1)·s~(-1),开关比达6.2×10~7,亚阈值摆幅为174mV/Decade,阈值电压为-2.0V。该结果证明了印刷Ag电极在氧化物TFT的应用潜力,并有助于建立导电氧化物薄膜和金属导电纳米材料堆叠结构的复合导电薄膜体系,实现优势互补。     

溅射法制备钇掺杂铟锌氧薄膜和器件特性研究王丹丹,王卿璞*,王汉斌,张锡健,武丽伟,李福杰,袁帅中国,济南,山东大学物理学院

室温下,采用射频磁控溅射法分别在钠钙玻璃和P型硅衬底上制备了不同厚度的钇掺杂铟锌氧薄膜。研究了薄膜的结构形貌和光学特性。以P型硅为栅极制备了底栅结构的YIZO薄膜晶体管,并研究了器件的输出和转移特性。研究发现,室温下制备的所有Y掺杂IZO薄膜均为非晶结构,YIZO薄膜晶体管均为n沟道耗尽型器件。有源层厚度为20nm的器件的开关电流比超过105,亚阈值摆幅为2.20 V/decade,阈值电压为-1.0V, 饱和迁移率为0.57 cm2/ V·s。     

氧化锌基薄膜晶体管制备与研究

以玻璃为衬底,利用金属有机化学气相沉积(MOCVD)方法,在360℃附近实现ZnO薄膜的生长.利用ZnO为有源层制备底栅型薄膜晶体管.SiO2 被用作栅绝缘材料以有效的抑制漏泄电流的产生,达到氧化锌薄膜晶体管 (ZnO-TFT) 成功运作目的.ZnO-TFT 的电流开关(on/off)比达到104以上.ZnO-TFT 在可见光区平均光透过率大约为80%.以上表明利用ZnO 替代传统 Si 材料作有源层材料制备透明薄膜晶体管是可能的.     

超临界流体改善IGZO薄膜晶体管光电特性研究

随着高速、高分辨率、全透明的显示技术不断发展，对全透明薄膜晶体管(Thin-Film Transistor, TFT)的电学和光学性能均提出了更高的要求。首先在玻璃衬底上制备了以非晶铟镓锌氧化物(Amorphous Indium-Gallium-Zinc Oxide, a-IGZO)为有源层、铟锡氧化物(Indium Tin Oxide, ITO)为电极的全透明薄膜晶体管。并以低温环保的超临界流体技术进一步改善器件特性，超临界流体具有高溶解和高渗透性，可进入器件内部，修复材料中的断键，消除器件的缺陷，进而提升器件综合性能。实验结果表明，处理后器件的亚阈值摆幅从451.44 mV/dec下降至231.56 mV/dec,载流子迁移率从8.57 cm²·V^-1·s^-1增至10.46 cm²·V^-1·s^-1,电流开关比提升了一个数量级。此外，超临界处理后器件的光电应力稳定性和光学透明度均得到有效改善。     

并五苯有机薄膜晶体管电学性能研究

制作了以并五苯为半导体有源层材料的有机薄膜晶体管。用热氧化的方法制备了一层230nm的二氧化硅栅绝缘层并用原子力显微镜(AFM)分析了表面形貌。研究了器件的电学性能,得到的并五苯有机薄膜晶体管器件载流子迁移率为8.9×10-3cm2/V.s,器件的阈值电压和开关电流比分别为-8.2V和1.0×104。     

有机介质层铟锌氧化物薄膜晶体管

利用直流磁控溅射方法在玻璃基板上室温制备非晶铟锌氧化物半导体薄膜,薄膜表面平整。采用旋涂法室温制备聚四乙烯苯酚有机介质层。以铟锌氧化物薄膜作为沟道层、聚四乙烯苯酚作为介质层,成功制备了顶栅结构的薄膜晶体管。测试结果表明,所制备的薄膜晶体管具有饱和特性且为耗尽工作模式,薄膜晶体管的阈值电压为3.8V,迁移率为25.4cm2.V-1.s-1,开关比为106。     

粉末靶磁控溅射制备AZO/Ag/AZO透明导电薄膜的特性

室温下采用射频磁控溅射粉末靶,在玻璃基底上制备了掺铝氧化锌/银/掺铝氧化锌(AZO/Ag/AZO)三层透明导电薄膜.通过优化中间银层厚度,优化了三层透明导电薄膜的光电性能.采用原子力显微镜和X射线衍射仪分别对薄膜的形貌和结构进行检测分析;采用紫外可见分光光度计和霍尔效应仪分别对薄膜的光电性能进行检测分析.结果表明,所制备的三层膜表面平整,颗粒大小错落均称;三层膜呈现多晶结构,AZO层薄膜具有(002)择优取向的六方纤锌矿结构,Ag层薄膜具有(111)择优取向的立方结构;当三层薄膜为AZO (20 nm) /Ag(12 nm) /AZO (20 nm)时,在550 nm处的透光率为88％,方块电阻为4.3Ω/□,电阻率为2.2×10-5 Ω·cm,载流子浓度为2.8×1022/cm3,迁移率为10 cm2/ (V·s),品质因子为3.5×10-2 Ω-1.     

高场效应迁移率铁电栅二氧化锡薄膜晶体管的研究

采用溶胶-凝胶法(Sol-Gel)制备了以n型Si为栅极、二氧化锡(SnO2)薄膜为沟道层、(Bi,Nd)4Ti3 O12 (BNT)薄膜为绝缘层的薄膜晶体管.晶体管呈现出n沟道增强型性能,其开态电流I.n=25 μA,场效应迁移率μsat=0.3 cm2·V-1·s-1.BNT铁电薄膜的自发极化以及载流子与极化的耦合作用是晶体管具有较大开态电流和较高场效应迁移率的主要原因.     

溅射功率变更对In-Sn-Zn-O TFT器件性能的影响研究

以硅作为衬底,以采用不同直流(DC)磁控溅射功率制备的ITZO薄膜作为有源层制备了薄膜晶体管(TFTs)器件.在溅射功率从80 W变化到160 W的过程中,对ITZO TFTs的电气性能和稳定性进行了研究.当溅射功率为80 W时,器件具有最低的有源层载流子浓度(Nd)2.58×1017cm-3以及有源层与栅极绝缘层接触面最小的缺陷阱密度(Nt)5.677×1011cm-2,器件显示出优秀的电气性能.例如:0.156 V/dec的亚阈值摆幅(SS)、-3.596 V的开启电压(VON)、-1.872 V的阈值电压(VTH)和高达7.773×108的电流开关比(ION/IOFF).与此同时,在负向偏置压力下,该器件也显示出最强的电气稳定性.由测试结果看出,较低的溅射功率有助于ITZO TFTs器件性能的提升.     

高性能ZnSnO∶Li/ZnSnO双有源层TFT电学性能的研究

双有源层以迁移率高、开关比高、大面积均匀性好等优点成为近年研究热点。采用射频磁控溅射方法，制备了ZnSnO∶Li/ZnSnO薄膜晶体管(TFT),对其电学特性进行了测试，并研究了器件迁移率提高的原因及其内在的微观机制。研究发现，ZTO∶Li/ZTO TFT表现出了良好的电学特性，其场效应迁移为率为13.98 cm²/(V·s),亚阈值摆幅为0.84 V/dec,开关比为1.13×10⁹。通过XPS对其薄膜进行分析发现，Li的引入导致薄膜中氧和金属结合键的浓度增加，氧空位浓度减少，从而使得TFT的迁移率增大，开关比增大，亚阈值摆幅减小。     

Short-channel amorphous-silicon thin-film transistors

Amorphous-silicon thin film transistors (TFTs) with submicrometer-long bottom-gate have been fabricated and their characteristics were evaluated. By the desirable effects of highly conductive source and drain of excimer-laser crystallized Si film, the mobility was hardly decreased from about 1.0 cm²/Vs for the 15-μm long TFT to about 0.9 cm²/Vs for the 0.5-μm long TFT. Detailed effects of the gate electrode thickness and length have been discussed on the TFT characteristics     

High-performance poly-Si TFTs with ECR-plasma hydrogen passivation

High-performance thin-film transistors (TFTs) with electron-cyclotron resonance (ECR) plasma hydrogen passivation fabricated by the use of laser-recrystallized multiple-strip-structure poly-Si film are discussed. These TFTs have n-channel enhancement-mode characteristics with a large transconductance, a high switching ratio, and a threshold voltage as low as 0.4 v. The ECR-plasma hydrogen passivation of laser-recrystallized poly-Si, reduces the trap density of poly-Si and increases the carrier mobility thus, desirable TFT characteristics are obtained. This passivation increased the transconductance (g_m) of a TFT and decreased the leakage current between the source and the drain. As a result, a switching ratio as high as 2.5×10⁹ and very low leakage current of the order of 10¹⁴ A can be achieved by these high-performance TFTs     

Transparent Thin-Film Transistors Using ZnMgO as Dielectrics and Channel

An enhancement-mode ZnMgO transparent thin-film transistor (TFT) is fabricated, in which cubic-phase ZnMgO (C-ZnMgO) is used as gate insulator and hexagonal-phase ZnMgO (H-ZnMgO) is used as channel. The multilayers of C-ZnMgO and H-ZnMgO are grown on patterned indium-tin-oxide-coated glass in successive fashion at low temperature. Capacitor-voltage characteristics measured across the gate show that the H-ZnMgO channel is n-type. The C-ZnMgO isolating layer demonstrates low leakage current characteristics, i.e., 4 times 10^-7 A/cm², at a bias of 10 V. The transparent TFTs display a typical channel mobility of 1.5 cm² V^-1 s^-1 and an on/off ratio of 10⁴.     

Fabrication of thin film transistors using a Si/Si1-xGex/Si triple layer film on a SiO2 substrate

A novel approach that can reduce the thermal budget in the fabrication of thin film transistors (TFTs) using a Si/Si_0.7Ge_0.3/Si triple film as an active layer was proposed. The crystallization behavior of the triple film was described and device characteristics of Si/Si_0.7Ge_0.3 /Si TFTs were compared with those of Si TFTs and of SiGe TFTs. The triple film was completely crystallized only after a 25-h anneal at 550°C. N-channel polycrystalline Si/Si_0.7Ge_0.3/Si TFTs had a field-effect mobility of 57.9 cm²/Vs and an I_on/I_off ratio of 5.7×10⁶. This technique provides not only a shorter time processing capability than Si TFT's technology but also superior device characteristics compared to SiGe TFTs     

Mirrored OLED pixel circuit for threshold voltage and mobility compensation with IGZO TFTs

In this paper, pixel circuit using mirroring structure with Indium–Gallium–Zinc oxide (IGZO) thin film transistors (TFTs) for active matrix organic light emitting diode (AMOLED) display is proposed. This pixel circuit consists of only four TFTs, and one capacitor. Due to the mirroring structure, characteristic of the driving TFT can be precisely sensed by the sensing TFT, which is deployed in a discharging path for gate electrode of the driving TFT. This discharging process is strongly dependent on threshold voltage (V_T) and effective mobility of the sensing TFT. Circuit operating details are discussed, and compensation effects for threshold voltage shift and mobility variations are verified through numerical derivation and SPICE simulations. Furthermore, compared with conventional schematics, the proposed pixel circuit might have much simplified external driving circuits, and it is a promising alternative solution of high performance AMOLED display.     

Channel Protection Layer Effect on the Performance of Oxide TFTs

We have investigated the channel protection layer (PL) effect on the performance of an oxide thin film transistor (TFT) with a staggered top gate ZnO TFT and Al‐doped zinc tin oxide (AZTO) TFT. Deposition of an ultra‐thin PL on oxide semiconductor films enables TFTs to behave well by protecting the channel from a photo‐resist (PR) stripper which removes the depleted surface of the active layer and increases the carrier amount in the channel. In addition, adopting a PL prevents channel contamination from the organic PR and results in high mobility and small subthreshold swings. The PL process plays a critical role in the performance of oxide TFTs. When a plasma process is introduced on the surface of an active layer during the PL process, and as the plasma power is increased, the TFT characteristics degrade, resulting in lower mobility and higher threshold voltage. Therefore, it is very important to form an interface using a minimized plasma process.     

Fully self-aligned tri-layer a-Si:H thin-film transistors withdeposited doped contact layer

We demonstrate a new self-aligned TFT process for hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs). Two backside exposure photolithography steps are used to fabricate fully self-aligned tri-layer TFTs with deposited n⁺ contacts. Since no critical data alignment is required, this simple process is well suited to fabrication of short channel TFTs. We have fabricated fully self-aligned tri-layer a-Si:H TFTs with excellent device performance, and contact overlaps <1 μm. For a 20-μm channel length TFT with an a-Si:H thickness of 13 nm, the linear region (V_DS=0.1 V) and saturation region (V_DS=25 V) extrinsic mobility values are both 1.2 cm²/V-s, the off currents are <1 pA, and the on/off current ratio is >10⁷     

Low temperature poly-Si thin-film transistor fabrication bymetal-induced lateral crystallization

A new low temperature crystallization method for poly-Si TFTs was developed: Metal-Induced Lateral Crystallization (MILC). The a-Si film in the channel area of a TFT was laterally crystallized from the source/drain area, on which an ultrathin nickel layer was deposited before annealing. The a-channel poly-Si TFTs fabricated at 500°C by MILC showed a mobility of 121 cm²/V·s, a threshold voltage of 1.2 V, and an on/off current ratio of higher than 10⁶ . These electrical properties are much better than TFTs fabricated by conventional crystallization at 600°C     

Improvement of Hydrogenated Amorphous-Silicon TFT Performances With Low-$k$Siloxane-Based Hydrogen Silsesquioxane (HSQ) Passivation Layer

A low-dielectric-constant (low-k)-material siloxane-based hydrogen silsesquioxane (HSQ) is investigated as a passivation layer in bottom-gate hydrogenated amorphous-silicon thin-film transistors (a-Si : H TFTs). The low-k HSQ film passivated on TFT promotes the brightness and aperture ratio of TFT liquid-crystal display due to its high light transmittance and good planarization. In addition, the performance of a-Si : H TFT with HSQ passivation has been improved, compared to a conventional silicon nitride (SiN_x)-passivated TFT because the hydrogen bonds of HSQ assist the hydrogen incorporation to eliminate the density of states between the back channel and passivation layer. Experimental results exhibit an improved field-effect mobility of 0.57 cm²/Vmiddots and a subthreshold swing of 0.68 V     

Bottom-gate poly-Si thin film transistors using XeCl excimer laserannealing and ion doping techniques

High mobility bottom-gate poly-Si thin film transistors (TFTs) have been successfully fabricated on a hard glass substrate using XeCl excimer laser annealing and ion doping techniques. The authors used an a-Si:H film which is deposited by a plasma-enhanced chemical vapor deposition (PECVD) as a precursor film, and then they crystallized the a-Si film by XeCl excimer laser annealing. The maximum field effect mobility and grain size obtained were 200 cm²/V-s (n-channel), and 250 nm, respectively. The poly-Si TFTs showed excellent transfer characteristics, and an ON/OFF current ratio of over 10⁶ was obtained. Successful control of the threshold voltage within 4 V using an ion doping technique is also demonstrated