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1.
在Synopsys TCAD软件环境下,模拟实现了与0.5μm标准CMOS工艺兼容的高压CMOS器件,其中NMOS耐压达到108V,PMOS耐压达到-69V.在标准CMOS工艺的基础上添加三块掩膜版和五次离子注入即可完成高压CMOS器件,从而实现高、低压CMOS器件的集成.此高压兼容工艺适用于制作带高压接口的复杂信号处理电路.  相似文献   

2.
兼容标准CMOS工艺的高压器件设计与模拟   总被引:5,自引:4,他引:1  
在Synopsys TCAD软件环境下,模拟实现了与0 .5 μm标准CMOS工艺兼容的高压CMOS器件,其中NMOS耐压达到10 8V,PMOS耐压达到- 6 9V.在标准CMOS工艺的基础上添加三块掩膜版和五次离子注入即可完成高压CMOS器件,从而实现高、低压CMOS器件的集成.此高压兼容工艺适用于制作带高压接口的复杂信号处理电路.  相似文献   

3.
采用常规P阱CMOS工艺,实现了与CMOS工艺兼容的高压PMOS器件。制作的器件,其击穿电压为55 V,阈值电压0.92 V,驱动电流25 mA。对所设计的CMOS兼容高压PMOS器件的制造工艺、器件结构和测试等方面进行了阐述。该器件已成功应用于VFD平板显示系列电路。  相似文献   

4.
近年来,驱动类、音响类、接口类电路产品系列是CMOS集成电路发展的一个重要方向,这些电路中特有的高低压兼容结构是其重要的特点.相应地高低压兼容CMOS工艺技术应用也越来越广泛.本文研究了与常规CMOS工艺兼容的高压器件的结构与特性,在结构设计和工艺上做了大量的分析和实验,利用n-well和n管场注作漂移区,在没有增加任何工艺步骤的情况下,成功地将高压nMOS,pMOS器件嵌入在商用3.3/5V 0.5μm n-well CMOS工艺中.测试结果表明,高压大电流的nMOS管BVdssn达到23~25V,P管击穿BVdssp>19V.  相似文献   

5.
本文介绍一种与双极IC电路技术完全兼容的低压(CMOS)/高压(VDMOS)器件设计与制备工艺。VDMOS器件阈电压:1~2伏(根据注入剂量调节),漏击穿电压大于150伏。V_(GS)=5V时其跨导大于10m(?),导通电阻小于200Ω,最大输出电流约800mA。同时得到的NPN器件其β≥250,BV_(ceo)≥65V,BV_(CBO)≥90V。CMOS器件性能也合乎要求。利用这种工艺可制作任何低压和高压双极/MOS器件,这对于功率集成、高低压转换与驱动、等离子体显示等方面应用会有很多实用价值。  相似文献   

6.
近年来,驱动类、音响类、接口类电路产品系列是CMOS集成电路发展的一个重要方向,这些电路中特有的高低压兼容结构是其重要的特点.相应地高低压兼容CMOS工艺技术应用也越来越广泛.本文研究了与常规CMOS工艺兼容的高压器件的结构与特性,在结构设计和工艺上做了大量的分析和实验,利用n-well和n管场注作漂移区,在没有增加任何工艺步骤的情况下,成功地将高压nMOS,pMOS器件嵌入在商用3.3/5V 0.5μm n-well CMOS工艺中.测试结果表明,高压大电流的nMOS管BVdssn达到23~25V,P管击穿BVdssp>19V.  相似文献   

7.
研制了与0.5μm标准CMOS工艺完全兼容的薄栅氧高压CMOS器件.提出了具体的工艺制作流程-在标准工艺的基础上添加两次光刻和四次离子注入工程,并成功进行了流片试验.测试结果显示,高压NMOS耐压达到98V,高压PMOS耐压达到-66V.此结构的高压CMOS器件适用于耐压要求小于60V的驱动电路.  相似文献   

8.
薄栅氧高压CMOS器件研制   总被引:1,自引:1,他引:0  
研制了与 0 .5μm标准 CMOS工艺完全兼容的薄栅氧高压 CMOS器件 .提出了具体的工艺制作流程 -在标准工艺的基础上添加两次光刻和四次离子注入工程 ,并成功进行了流片试验 .测试结果显示 ,高压 NMOS耐压达到98V,高压 PMOS耐压达到 - 6 6 V .此结构的高压 CMOS器件适用于耐压要求小于 6 0 V的驱动电路 .  相似文献   

9.
许坚  孙伟峰  李海松   《电子器件》2008,31(2):469-472
为了设计一款100 V体硅N-LDMOS器件,通过借助Tsuprem-4和Medici软件详细讨论分析了高压N-LDMOS器件衬底浓度、漂移区参数、金属场极板长度等与击穿电压、开态电阻之间的关系,最终得到兼容体硅标准低压CMOS工艺的100 V体硅N-LDMOS最佳结构、工艺参数.折衷考虑到了击穿电压、开态电阻这一对矛盾体以满足设计指标.通过模拟曲线可知该高压器件的关态和开态的击穿电压都达到要求,开启电压为1.5 V,而且完全兼容国内体硅标准低压CMOS工艺,可以很好地应用于各种高压功率集成芯片.  相似文献   

10.
1200V MR D-RESURF LDMOS与BCD兼容工艺研究   总被引:1,自引:0,他引:1  
乔明  方健  肖志强  张波  李肇基 《半导体学报》2006,27(8):1447-1452
提出具有p埋层的1200V多区双RESURF(MR D-RESURF) LDMOS, 在单RESURF(S-RESURF)结构的n漂移区表面引入多个p掺杂区,并在源区下引入p埋层,二者的附加场调制器件原来的场,以改善其场分布;同时由于电荷补偿,提高了漂移区n型杂质的浓度,降低了导通电阻.开发1200V高压BCD(BJT,CMOS,DMOS)兼容工艺,在标准CMOS工艺的基础上增加pn结对通隔离,用于形成DMOS器件D-RESURF的p-top注入两步工序,实现了BJT,CMOS与高压DMOS器件的单片集成.应用此工艺研制出一种BCD单片集成的功率半桥驱动电路,其中LDMOS,nMOS,pMOS,npn的耐压分别为1210,43.8,-27和76V.结果表明,此兼容工艺适用于高压领域的电路设计中.  相似文献   

11.
设计了一种低温漂CMOS基准电压源,应用于LED驱动芯片中.采用基本的带隙基准电压源原理,并对结构进行了改进,减小了失调电压对输出的影响,同时可以提供多路输出,满足LED驱动芯片中多个基准电压的需求.基于CSMC 0.5μm CMOS工艺对所设计电路进行了模拟仿真.常温(25℃)下,电源电压为4V时电路具有稳定的三路输出:200mV、600mV和1V,温度在-45~85℃变化时,温度系数为16.9ppm/℃,PSRR大于-70dB@1kHz.  相似文献   

12.
In this paper, a low‐power CMOS interface circuit is designed and demonstrated for capacitive sensor applications, which is implemented using a standard 0.35‐μm CMOS logic technology. To achieve low‐power performance, the low‐voltage capacitance‐to‐pulse‐width converter based on a self‐reset operation at a supply voltage of 1.5 V is designed and incorporated into a new interface circuit. Moreover, the external pulse signal for the reset operation is made unnecessary by the employment of the self‐reset operation. At a low supply voltage of 1.5 V, the new circuit requires a total power consumption of 0.47 mW with ultra‐low power dissipation of 157 μW of the interface‐circuit core. These results demonstrate that the new interface circuit with self‐reset operation successfully reduces power consumption. In addition, a prototype wireless sensor‐module with the proposed circuit is successfully implemented for practical applications. Consequently, the new CMOS interface circuit can be used for the sensor applications in ubiquitous sensor networks, where low‐power performance is essential.  相似文献   

13.
A new low‐voltage CMOS interface circuit with digital output for piezo‐resistive transducer is proposed. An input current sensing configuration is used to detect change in piezo‐resistance due to applied pressure and to allow low‐voltage circuit operation. A simple 1‐bit first‐order delta‐sigma modulator is used to produce an output digital bitstream. The proposed interface circuit is realized in a 0.35 µm CMOS technology and draws less than 200 µA from a single 1.5 V power supply voltage. Simulation results show that the circuit can achieve an equivalent output resolution of 9.67 bits with less than 0.23% non‐linearity error.  相似文献   

14.
提出了一种低电压、低功耗、中等精度的带隙基准源,针对电阻分流结构带隙基准源在低电源电压下应用的不足作出了一定的改进,整体电路结构简单且便于调整,同时尽可能地减少了功耗.该电路采用UMC 0.18 μm Mixed Mode 1.8 V CMOS工艺实现.测试结果表明,电路在1 V电源电压下,在-20~30℃的温度范围内,基准电压的温度系数为20×10-6/℃,低频时的电源电压抑制比为-54 dB,1 V电源电压下电路总功耗仅为3μW.  相似文献   

15.
A new multiple-valued current-mode MOS integrated circuit is proposed for high-speed arithmetic systems at low supply voltage. Since a multiple-valued source-coupled logic circuit with dual-rail complementary inputs results in a small signal-voltage swing while providing a constant driving current, the switching speed of the circuit is improved at low supply voltage. As an application to arithmetic systems, a 200 MHz 54×51-b pipelined multiplier using the proposed circuits with a 1.5 V supply voltage is designed with a 0.8-μm standard CMOS technology. The performance of the proposed multiplier is evaluated to be about 1.4 times faster than that of a corresponding binary implementation under the normalized power dissipation. A prototype chip is also fabricated to confirm the basic operation of the multiple-valued arithmetic circuit  相似文献   

16.
This paper presents a CMOS voltage controlled ring oscillator (VCO) with temperature compensation circuit suitable for low-cost and low-power MEMS gas sensor. This compensated ring oscillator is dedicated to Chopper Stabilized CMOS Amplifier (CHS-A). To operate at low frequency, a control voltage generated by a CMOS bandgap reference (BGR) is described and the measurement results of the fabricated chips are presented. The output voltage of the reference is set by resistive subdivision. In order to achieve small area and low power consumption, n-well resistors are used. This design features a reference voltage of 1 V. The chip is fabricated in AMS 0.35 μm CMOS process with an area of 0.032 mm2. Operating at 1.25 V, the output frequency is within 200?±?l0 kHz over the temperature range of ?25 °C to 80 °C with power consumption of 810 μW.  相似文献   

17.
This paper presents a CMOS voltage controlled ring oscillator with temperature compensation circuit suitable for low-cost and low-power gas sensor. To operate at low frequency, a control voltage generated by a CMOS bandgap reference is described and the measurement results of the fabricated chips are presented. The output voltage of the reference is set by resistive subdivision. In order to achieve small area and low power consumption, n-well resistors are used. This design features a reference voltage of 1 V. The chip is fabricated in AMS 0.35 μm CMOS process with an area of 0.032 mm2. Operating at 1.25 V, the output frequency is within 200 ± l0 kHz over the temperature range of ?25 to 80 °C with a power consumption of 810 μW.  相似文献   

18.
为使DC/DC开关电源的功率开关管及时地导通或截止,需要设计专用的输出驱动电路,基于整个开关电源系统低功耗的考虑,开关电源可以采用同步整流的拓扑结构。该拓扑结构需要一个电压自举的输出驱动电路,本文首先提出了一种有自举功能的BiCMOS工艺的输出驱动电路,在此基础上,采用电流源和电流沉串联的方式改进了前面提出的输出驱动电路,通过消除CMOS电路的瞬态短路导通现象,不仅降低了该电路模块的功耗,而且起到了保护的作用,经HSPICE模拟表现,开关电源的输入电压Vin为10V控制器内部电压(VL)为5V,开关频率为200kHz时,改进驱动电路的功耗降低了约11.5%,同时避免了瞬态短路导通现象。  相似文献   

19.
This letter describes circuit techniques for obtaining divide-by-four (divide4) frequency dividers (FDs) from CMOS ring-oscillator based injection locked frequency dividers (ILFDs). The circuit is made of a two-stage differential CMOS ring oscillator and is based on MOS switches directly coupled to the differential outputs of the ring oscillator. At the supply voltage of 1.8V and at the incident power of 0dBm, for a dual-band ILFD, the divide4 ILFD can provide a locking range of 6.3% from 5.39 to 6.12GHz at low band and 5.9% from 8.84 to 9.38GHz at high band when the dc bias of MOS switches Vinj changes from 0.7 to 1.1V  相似文献   

20.
低于1×10-6/℃的低压CMOS带隙基准电流源   总被引:1,自引:0,他引:1  
提出了一种新颖的CMOS带隙基准电流源的二阶曲率补偿技术,通过增加一个运算跨导放大器(OTA),使带隙基准参考电路的电流特性与理论分析相符合,实现低温度系数(TC)的参考电流。该电路采用SMIC0.13μm标准CMOS工艺,可在1.2 V的电源电压下工作,有效面积为0.045 mm2。仿真结果表明,在-40~85℃温度范围内参考电流的温度系数为0.5×10-6/℃;当电源电压为1.1 V时,电路依然可以正常工作,电源电压调整率为1 mV/V。  相似文献   

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