Two-dimensional pixel image lag simulation and optimization in a 4-T CMOS image sensor

Pixel image lag in a 4-T CMOS image sensor is analyzed and simulated in a two-dimensional model.Strategies of reducing image lag are discussed from transfer gate channel threshold voltage doping adjustment,PPD N-type doping dose/implant tilt adjustment and transfer gate operation voltage adjustment for signal electron transfer.With the computer analysis tool ISE-TCAD,simulation results show that minimum image lag can be obtained at a pinned photodiode n-type doping dose of 7.0×10~(12) cm~(-2),an implant ...     

W/TiN Gate Thin-Film Fully-Depleted SOI CMOS Devices

TiN gate thin-film fully-depleted SOI CMOS devices are fabricated and discussed.Key process technologies are demonstrated.Compared with the dual polysilicon gate devices,the channel doping concentration of nMOS and pMOS can be reduced without changing threshold voltage (VT)，which enhances the mobility.Symmetrical VT is achieved by nearly the same VT implant dose because of the near mid-gap workfunction of TiN gate.The SCE effect is improved when the thin-film thickness is reduced.     

An LDMOS with large SOA and low specific on-resistance

An LDMOS with nearly rectangular-shape safe operation area (SOA) and low specific on-resistance is proposed. By utilizing a split gate, an electron accumulation layer is formed near the surface of the n-drift region to improve current conduction capability during on-state operation. As a result, the specific on-resistance can be lowered down to 74.7 mΩ·cm² for a 600 V device from simulation. Furthermore, under high-voltage and high-current conditions, electrons and holes flow as majority carriers in the n-drift region and p-type split gate, respectively. Due to charge compensation occurring between holes and electrons, the local electric field is reduced and impact ionization is weakened in the proposed device. Therefore, a higher on-state breakdown voltage at large V_GS is obtained and snap-back is suppressed as well.     

用于降低高速CMOS图像传感器电荷转移时间的工艺技术

This paper proposes pixel process techniques to reduce the charge transfer time in high speed CMOS image sensors.These techniques increase the lateral conductivity of the photo-generated carriers in a pinned photodiode(PPD) and the voltage difference between the PPD and the floating diffusion(FD) node by controlling and optimizing the N doping concentration in the PPD and the threshold voltage of the reset transistor,respectively.The techniques shorten the charge transfer time from the PPD diode to the FD node effectively.The proposed process techniques do not need extra masks and do not cause harm to the fill factor.A sub array of 3264 pixels was designed and implemented in the 0.18 m CIS process with five implantation conditions splitting the N region in the PPD.The simulation and measured results demonstrate that the charge transfer time can be decreased by using the proposed techniques.Comparing the charge transfer time of the pixel with the different implantation conditions of the N region,the charge transfer time of 0.32 s is achieved and 31% of image lag was reduced by using the proposed process techniques.     

Top gate ZnO-Al2O3 thin film transistors fabricated using a chemical bath deposition technique

ZnO thin films were prepared by a simple chemical bath deposition technique using an inorganic solution mixture of ZnCl₂ and NH₃ on glass substrates and then were used as the active material in thin film transistors (TFTs). The TFTs were fabricated in a top gate coplanar electrode structure with high-k Al₂O₃ as the gate insulator and Al as the source, drain and gate electrodes. The TFTs were annealed in air at 500 ℃ for 1 h. The TFTs with a 50 μm channel length exhibited a high field-effect mobility of 0.45 cm²/(V·s) and a low threshold voltage of 1.8 V. The sub-threshold swing and drain current ON-OFF ratio were found to be 0.6 V/dec and 10⁶, respectively.     

A novel sub 20 nm single gate tunnel field effect transistor with intrinsic channel forultra low power applications

We propose a nanoscale single gate ultra thin body intrinsic channel tunnel field effect transistor using the charge plasma concept for ultra low power applications. The characteristics of TFETs (having low leakage) are improved by junctionless TFETs through blending advantages of Junctionless FETs (with high on current). We further improved the characteristics, simultaneously simplifying the structure at a very low power rating using an InAs channel. We found that the proposed device structure has reduced short channel effects and parasitics and provides high speed operation even at a very low supply voltage with low leakage. Simulations resulted in I_OFF of ～ 9 × 10^-16A/μm, I_ON of ～20 μA/μm, I_ON/I_OFF of ～2 × 10¹⁰, threshold voltage of 0.057 V, subthreshold slope of 7 mV/dec and DIBL of 86 mV/V for PolyGate/HfO₂/InAs TFET at a temperature of 300 K, gate length of 20 nm, oxide thickness of 2 nm, film thickness of 10 nm, low-k spacer thickness of 10 nm and V_DD of 0.2 V.     

Theoretical Analysis and Simulation of BJFET Obstructive Characteristics

A new bipolar junction field-effect transistor (BJFET) was described. The theoretical analysis and computer simulation of BJFET obstructive characteristic are achieved. The gate bias voltage affects the BJFET obstructive voltage greatly. The BJFET obstructive characteristic is relevant to structure parameters of channel width W and channel length L. The decrease-bias-voltage operation can weaken the device obstructive characteristic. The forward turn in device forward obstructive region can also affect the BJFET obstructive characteristic. BJFET has a good high temperature obstructive characteristic and can be applying to high temperature status as high voltage switch devices.     

Ultrathin CdSe nanowire field-effect transistors

We report the fabrication, and electrical and optical characterization, of solution-liquid-solid (SLS) grown CdSe nanowire field-effect transistors. Ultrathin nanowires (7–12 nm diameters) with lengths between 1 μm and 10 μm were grown by the SLS technique. Al-CdSe-Al junctions are then defined over oxidized Si substrate using photolithography. The nanowires, which were very resistive in the dark, showed pronounced photoconductivity even with a visible light source with resistance decreasing by a factor of 2–100 for different devices. Field-effect devices fabricated by a global backgating technique showed threshold voltages between −7.5 V and −2.5 V and on-to-off channel current ratios between 10³ and 10⁶ at room temperature. Channel current modulation with gate voltage is observed with the current turning off for negative gate bias, suggesting unintentional n-type doping. Further, optical illumination resulted in the loss of gate control over the channel current of the field-effect transistor.     

Development of 17 kV 4H-SiC PiN diode

The design, fabrication, and electrical characteristics of a 4H-SiC PiN diode with breakdown voltage higher than 17 kV are presented. The three-zone JTE has been used in the fabrication. Numerical simulations have been performed to optimize the parameters of the edge termination technique. The epilayer properties of the N-type are 175 μm with a doping of 2×10¹⁴cm^-3. With the three-zone JTE, a typical breakdown voltage of 17 kV has been achieved.     

Polymers as masks for Ion implantation

Polymers such as polyimides and photoresists, commonly used in semiconductor processing, have been investigated as high resolution masks for ion implantation. Thin films consisting of these materials were subjected to various implant doses of H⁺, Ne⁺ and Ar⁺ ions and the post implantation surface morphologies investigated. Polyimides maintained their integrity under severe H⁺ and Ne⁺ implant doses as high as 2.4 × 10¹⁶ cm⁻² and 1.0 × 10¹⁶ cm⁻², respectively, whereas photoresists began to degrade at implant doses of 9.6 × 10¹⁵ cm⁻² and 1.9 × 10¹⁵ cm⁻², respectively. When polyimide was H⁺ implanted with doses up to 10¹⁶ cm⁻² its dielectric constant and breakdown strength remained unchanged at 3.5 and 150 V/μm, respectively. However, a gradual increase in the dielectric constant was observed for doses above this level. It was also observed that under the influence of H⁺ implants with beam current densities exceeding 10⁻⁷ A-cm⁻² a hardening of the polyimide occurs, resulting in reduction of the etching rate in an O₂ plasma. The stopping powers of various polymers for H⁺ implants have been measured. The results show that the experimental energy loss rate for protons in these materials lies between 75–100 keV/μm.     

分割映射的单幅彩色图像去雾方法

针对传统暗通道先验去雾方法在进行大气散射函 数估计时容易出现块状模糊效应的问题,提出了一种 基于分割映射的单幅彩色图像去雾方法。首先对前端采集图像进行近景与远景区域分 割,并基于分 割区域进行亮度信息的分段映射,通过分段计算获取大气散射函数的预测估计值;接着,采 用传统的导向 滤波方法对大气散射函数的估计值进行优化分析,进一步增强图像的边缘信息,改善在大面 积天空颜色情 况下图像边缘的块状模糊效应,提升含雾图像在突变区域的去雾效果。针对实际采集 的含雾图像进 行去雾效果分析和对比,分别基于图像的对比度改善量e、色彩自然度(CN I)、颜色丰富程度(CCI)以及计算耗时等4方面进行定量对比。分析结果表明, 本文方法很好地改善了图像的去雾效果,并进一步提升了运行的实时性。     

微光图像与红外图像融合技术研究

图像融合技术在微光和红外图像处理中得到了广泛的应用.为了深入理解图像融合技术以及融合后的图像质量,首先分析了微光和红外图像的融合技术,对微光和红外图像进行了预处理,分析了微光和红外成像过程、图像增强技术、特征提取方法、图像配准等.重点研究了拉普拉斯图像融合、对比度调制融合、基于小波分解的图像融合技术.最后通过实验对这几种融合技术进行了比较,结果显示融合后的图像质量得到了改善,突出了目标轮廓和细节,方便了目标识别.     

基于融合的红外图像预处理技术

介绍了一种基于图像融合的红外图像预处理技术。分析了红外成像过程中引入的噪声类型,采用修正的阿尔法均值滤波方法来抑制噪声并利用边缘检测来增强目标的边缘成分,通过融合的处理方法来合并处理后的红外图像。实验表明该方法能够有效地增强复杂背景下的红外图像,从而有利于后续的目标识别处理。     

基于梯度结构的星载红外图像和全色图像配准方法

针对红外图像与全色图像的不同的成像特性,提出了一种基于图像的梯度结构信息的匹配算法.首先对原始的红外和全色图像分别进行梯度计算,得到图像的梯度强度图;对梯度图进行结构相似性度量,获得图像间同名点对.然后采用RANSAC算法剔除误匹配的同名点.最后利用同名点对构建三角网小面元,并进行变换而得到配准图像.实验结果表明,算法可以有效地利用红外图像中地物的结构信息,匹配精度高.     

一种基于图像灰度信息和方差信息的图像分割方法

针对C-V方法对非二值图像分割不理想,运行效率不高的问题,提出一种改进的C-V方法。在C-V方法只运用图像灰度信息的基础上,加入基于图像局部方差的信息,并且设置加权参数k,通过k来控制基于图像的灰度信息和方差信息的驱动力在整个图像分割驱动力中的比重,使得改进C-V方法能利用图像区域灰度信息和区域方差信息对非二值图像进行分割,同时应用隐式方案的数值实现方式对改进方法进行数值实现。图像分割实验结果表明,该方法能够更为准确地提取非二值图像边界,减少迭代次数。     

结合图像特征比的红外与可见光图像融合算法

针对现有图像融合算法得到的融合图像清晰度不高以及边缘模糊等问题,提出了一种结合图像特征比的红外与可见光的图像融合算法,通过小波变换将图像进行分解,并通过计算低频分量中空间频率比与能量比,来对低频分量中的有效信号进行保留,而对高频分量则是通过边缘检测算法计算出高频分量中的边缘信号比,来对高频分量的边缘信号进行保留;实验结果表,该算法能够得到相比其他算法更为清晰的融合图像,具有一定的实用价值。     

一种新的基于图像增强的融合算法

针对一般融合算法在图像预处理上存在的不足,将图像融合引入图像预处理中,使待融合图像不仅得到增强,且不损失其他信息,为下一步图像融合奠定良好的基础,在此基础上对图像进行融合,其标准差、平均梯度、熵等图像评价指标都优于直接对图像进行融合,达到预期效果.     

运用小波图像融合技术增强痕迹偏振图像

针对单幅痕迹偏振图像存在的灰度反差微弱、痕迹特征残缺等缺陷,提出运用小波图像融合技术对多幅痕迹偏振图像进行融合处理,以增强痕迹图像视觉效果的策略。结合痕迹物证检验工作的需要,对低频子带图像采取基于区域窗口的梯度平方和较大法,而高频子带图像采取基于区域窗口的系数绝对值极大法,并将此方案应用于衣物上的轮胎痕迹偏振图像的增强处理。实验结果表明,经过融合处理后的轮胎痕迹偏振图像无论在主观视觉效果,还是在客观评价数据上都获得了期望的增强效果,满足痕迹物证司法鉴定的技术要求。     

一种保留图像边缘信息的图像复原方法

针对图像复原的同时要求保留图像边缘信息的矛盾,利用图像的梯度模,提出了一种保留图像边缘信息的图像复原方法。本方法对图像修复的同时,具有保护图像边缘的作用。实验表明本方法在去除噪声和信噪比上取得了较好的效果。     

夜视环境下激光助视成像与红外热像的融合

以夜视环境下激光助视成像和红外热成像为研究对象,提出了一种基于非向下采样Contourlet变换和分割模板的图像融合方法.通过引入脉冲耦合神经网络对两幅输入图像进行分割,利用类间方差比判断分割效果的优劣并选取分割模板.在NSCT域中,根据分割模板对激光助视成像和红外热成像的高低频系数进行分区域处理,得到低频和高频融合系数.最后对融合系数进行NSCT逆变换得到融合图像.实验结果表明本文方法能够在融合图像中最大程度呈现出夜视环境下激光助视成像的细节信息和红外热像的目标信息.