一种对数域电流模式积分器及其在高频滤波中的应用

提出了一种新颖的对数城电流模式积分器。该积分器的时间常数由参考偏置电流控制。用该积分器设计了二阶带通滤波器和0．1dB纹波三阶Chebyshev低通滤波器。计算机仿真表明，所设计的滤波器实际频响特性几乎是理想的，而且高频谐波失真很小，通频带灵敏度很低，频率在很宽的范围内可控。电路由双极型晶体管和接地电容构成，适合于全集成实现。     

一种应用于调频接收机，功耗为2.52mW，具有72dB动态范围的连续时间ΔΣ调制器

本文提出一个采用三阶滤波器,三位量化器的连续时间ΔΣ 调制器。该调制器对环路延迟,时钟抖动,以及RC时间常数变化具有鲁棒性。在积分器设计中,采用了增益带宽积扩展结构的运放,提高了滤波器的线性度。该芯片使用130nmCMOS工艺设计,可以应用在调频接收机中。测试结果表明,在带宽为500 kHz,时钟为26MHz条件下,该调制器实现了72dB的动态范围和70.7dB的信噪失真比,在1.2V电压下消耗2.52mW功耗。     

应用于WLAN／WiMAX的新型双模双通带微带滤波器

提出了一种新型应用于WLAN／WiMAX的对称T型开路支节加载的双模双通带滤波器,并对其进行了奇偶模分析,电场分布和电流分布分析。该滤波器的两个通带分别由奇模和偶模产生,且具有3个传输零点,带内插损分别为O．76dB／1．13dB,带内反射分别为-19．2dB／-15．1dB,在3．75—7．33GHz内,其衰减达到-20dB以下,具有高选择性和宽阻带的特性,且滤波器的卖测结果与仿真结果非常吻合。该双模滤波器具有非常小的尺寸,大小为14．03minx31．48mm,即0．15λg×0．34λg,所以该双模滤波器在工程领域非常具有应用价值。     

CMOS低中频有源复数带通滤波器设计

设计并实现了基于0.18 μm CMOS工艺的2.4 GHz无线传感网(Wireless Sensor Network)射频接收机低中频有源复数带通滤波器.该滤波器采用基于积分器单元的复数带通滤波器结构,同时实现镜像抑制和信号滤波的功能.仿真结果表明,复数带通滤波器的中心频率为2 MHz,通带带宽为2.4 MHz,通带电压增益约为12.5 dB,镜像抑制大于30 dB,相邻信道阻带衰减大于40 dB,噪声系数小于15 dB,消耗电流为5 mA.通过系统验证,本设计各项性能均满足无线传感网射频接收机的设计要求.     

多输出端电流模式全差分积分器实现二阶带通滤波器

提出了用多输出端电流模式全差分积分器(MCDI)实现二阶带通滤波器的方法。分析了输入级为PMOS管的MCDI及所提出的滤波器的特性，由该类型积分器所构成的滤波器，不仅具有较高的信噪比性能，而且能达到通过调节积分器的偏置电流值的大小能使得其所构成的带通滤波器的中心频率可在很宽的范围内调控的目的。应用台积电(TSMC)2层多晶硅、4层金属(2P4M)混合信号(mixed-mode signal)3．3V电源电压、0．35μ m、CMOS工艺参数仿真得到的带通滤波器的功耗仅为0．28mW左右，仿真结果表明滤波器设计正确、有效。     

一种超高频高Q值CMOS带通滤波器设计

介绍了一种基于Nauta跨导一电容积分器的CMOS集成滤波器设计。在滤波器设计过程中,利用改进的Nauta导具有可调增益、高线性度、宽频域特点,使滤波器可工作在UHF频段并有高品质因数Q,仿真结果表明,所设计的滤波器采用Cllarted Semiconductor Manuhcturing（CSM）0．35um CMOS工艺,工作电压为3V,Q值可达到40-100,当中心频率为433MHz,Q值为40时,无杂散动态范围（SFDR）约为61．4dB,并可通过调节电路偏压达到对中心频率ωc和Q的调谐。     

基于多输出端电流模式全差分积分器的梯形滤波器实现

本文提出了利用低电压多输出端电流模式全差分积分器（MCDI）综合连续时间电流模式滤波器的方法。首先对所设计的无源梯形滤波器用信号流图形（SFG）进行综合，然后用MCDI实现该SFG，分析并模拟了MCDI及所提出的滤波器的特性，应用3.3V、0.5μm、CMOS工艺参数仿真得到的1dB波纹四阶Chebyshev低通滤波器功耗仅为1mW左右，且其截止频率可在很宽的范围内调控，此外，这种滤波器还具有结构简单，对称性好，失真小等优点，适于全集成。     

基于开关电流双线性积分器的IFLF小波滤波器设计

根据连续时间滤波器设计理论,提出了一种基于开关电流双线性积分器和IFLF结构的取样数据小波滤波器设计方法。利用麦克劳林级数逼近小波频域函数,采用开关电流双线性积分器作为基本单元设计出传递函数为频域逼近函数的IFLF结构小波滤波器。通过调节滤波器时钟频率获得任意尺度小波函数实现连续小波变换。实验结果表明了该方法设计小波滤波器具有电路结构简单,小波函数尺度易于调节,通带灵敏度低的特点。     

一种20mW12位5MHz信号带宽连续时间∑-Δ调制器

在SMIC0．18μmCMOS工艺条件下,设计了一个可应用于无线通讯和视频领域的高带宽低功耗∑-△调制器。该调制器采用连续时间环路滤波器,较之传统的开关电容滤波器,连续时间滤波器可大大降低功耗。其中,积分器补偿可减小运放有限单位增益带宽的影响。换句话说,在同等速度下也可以减小功耗。另外,加法器和量化器是通过跨导单元和梯形电阻结合在一起的,能在很高的频率下很好地工作。在采样时钟为200MHz和过采样率为20的条件下,该调制器采用单环3阶4位量化结构。Hspice仿真验证表明,调制器达到5MHz的信号带宽和75dB的动态范围;在1．8V电源电压下,其总功耗为20mW。     

微波窄带带通滤波器的设计

分析了微带线窄带滤波器设计的基本理论,借助AgilentADS仿真软件完成了中心频率位于L波段的窄带带通滤波器的设计。该滤波器选用切比雪夫的原型结构,并由耦合微带线构成,其通带为1．9GHz～2．1GHz,通带内衰减小于1．5dB,起伏小于0．5dB,在1．7GHz和2．3GHz衰减大于20dB,端口反射系数小于-15dB。版图仿真结果满足滤波器设计要求。     

一种基于平衡式对数域积分器的高阶滤波器

提出了一个新的工作在甲乙类状态的平衡式对数域积分器 ,用跨导线性原理分析得到其传递函数。基于该积分器电路 ,采用无源网络模拟法设计出一个 1 d B波纹的五阶切比雪夫对数域低通滤波器。PSpice仿真结果表明 ,这种新型对数域滤波器能在低电压条件下工作 ,并具有高频、宽调谐范围和低失真等特点。     

Continuous-Time 4th Order Butterworth Low-Pass Filter for Video Frequency Applications

In this paper, a continuous-time 4th order Butterworth low-pass filter based on current-mode processing is presented for applications over the video frequency range. A new type of integrator in which both voltage and currents may be integrated is presented and used as the main active block. The filter has been implemented using a very low-cost 2.4 m CMOS process (Mietec). The whole circuit occupies 2.8 mm² and consumes 19 mW from a ±1.5 V supply. Experimental results are given for a 4.5 MHz to 12 MHz tunable low-pass filter with 58 dB of dynamic range at 10 MHz.     

A 1.1 mW 87 dB dynamic range ΔΣ modulator for audio applications

This paper presents a 1.1 mW 87 dB dynamic range third order AS modulator implemented in 0.18 μm CMOS technology for audio applications.By adopting a feed-forward multi-bit topology,the signal swing at the output of the first integrator can be suppressed.A simple current mirror single stage OTA with 34 dB DC gain working under 1 V power supply is used in the first integrator.The prototype modulator achieves 87 dB DR and 83.8 dB peak SNDR across the bandwidth from 100 Hz to 24 kHz with 3 kHz input signal.     

一种用于音频系统的1.1mW 87dB动态范围的ΔΣ调制器

本文描述了一款应用于音频系统的1.1mW 87dB动态范围的 Delta-Sigma 调制器的设计,设计采用0.18um CMOS工艺。由于采用带有前馈支路的多比特结构,第一级积分器的输出摆幅得到有效压缩。第一级积分器采用结构简单,直流增益仅34dB,工作在1V电压下的电流镜型跨导放大器。在3KHz信号输入下,该调制器可在100Hz~24KHz的频率范围内达到83.8dB的峰值SNDR和87dB的动态范围。     

Design of High Dynamic Range Fully Integratable Translinear Filters

This paper addresses the non-linear noise and dynamic-range properties of bipolar and MOS (both in weak and in strong inversion) translinear integrators, following a systematic top-down approach. Several design principles to achieve an optimal dynamic range are derived. A qualitative comparison of a bipolar or weak-inversion class-AB translinear integrator and the well-known linear g _m – C integrator reveals that the former is an interesting candidate, especially for low-voltage and/or low-power operation. As an example, a ±1.65-V bipolar translinear integrator is presented that makes dynamic-range optimization possible by adjusting just one bias current. Its application in an audio filter yields a 63-dB dynamic range and a virtual dynamic range of 76 dB, while the current consumption can be as low as 310 nA.     

MOSFET capacitor filters using unity gain CMOS current conveyors

A CMOS current conveyor and a MOSFET-capacitor integrator are presented. High frequency integrated filters can be constructed based on this integrator. Simulation results demonstrate that a third order lowpass ladder filter can achieve a wide bandwidth up to 1.0 MHz.<>     

Measured hyperbolic-sine (sinh) CMOS results: A high-order 10 Hz–1 kHz notch filter for 50/60 Hz noise

This paper presents proof-of-concept measured results from CMOS hyperbolic-sine (sinh) filters fabricated in a commercially available 0.35 µm CMOS technology. Results from two chips are reported: a practical sinh integrator and a high order (8th) notch filter dedicated to 50/60 Hz noise rejection and synthesized by means of the proposed integrator. Linearity, frequency and noise measurements are reported. The notch frequency of the 8th order filter can be tuned over almost two decades. Its attenuation exceeds 70 dB for the target frequency range of 20–60 Hz and its dynamic range (for THD<4%) amounts to 89 dB while consuming 8 µW from a 2 V power supply level. For an increased power consumption of 74 µW its dynamic range (for THD<4%) exceeds 100 dB.     

A micropower fourth-order elliptical switched-capacitor low-pass filter

A micropower fourth-order elliptical switched-capacitor (SC) low-pass filter for biomedical applications has been designed and measured. The charge transfer error of an SC integrator using a transconductance amplifier is discussed. Also first-order noise and PSRR calculations are performed and compared with the results of simulations and measurements. The measurements show that by careful optimization of the gain bandwidth, slew rate, and gain of the amplifiers, high-performance low-power SC filters can be constructed. The cutoff frequency of the filter is 5 kHz, the ripple in the passband is 0.27 dB, and stopband rejection is 49 dB. The power consumption of the filter is 190 /spl mu/W with /spl plusmn/2.5-V power supplies. The dynamic range of the filter is 75 dB, and the total harmonic distortion over the whole passband range is below 0.25% for a 2-V/SUB pp/ input signal. The PSRR of the filter is above 40 dB at frequencies below 3 kHz.     

Low-voltage fully differential switched-current filters

An accurate high-frequency switched-current integrator based on low-voltage fully-differential folded-cascode current copiers is presented. A five-pole lowpass ladder filter has been integrated using a 1.2 μm n-well CMOS process without floating precision linear capacitors. Experimental results show an accurate filter response for sampling frequencies up to 5 MHz. Using a nominal 3.3 V power supply, the measured dynamic range is 66 dB and the power dissipation is 10 mW/pole