SOC测试系统将成为主流IC测试设备

SOC(系统级芯片)测试对IC ATE(集成电路自动测试设备)制造商提出了挑战,同时也提供了新的发展机遇.目前,各种系统级芯片不断面世,包括数字蜂窝电话芯片、PC图形芯片、电缆调制解调器芯片、千兆以太网交换器芯片、网络控制器芯片以及各种多媒体器件.这预示了SOC测试将是未来几年ATE市场中的一个新增长点.SOC对测试设备要求非常高,它要求设备能测试芯片上的数字逻辑电路、模拟电路和存储器.低成本、多功能SOC测试设备对集成电路制造商有更大的吸引力,因为这种设备的测试能力能替代多台单功能IC ATE.     

低功耗方法在SoC芯片设计中的应用

SOC芯片设计在集成电路设计中占据重要位置,低功耗设计是SoC设计过程中的重要环节。本文首先全面分析了CMOS电路的功耗组成和功耗估计的相关理论,随后从各个设计层次详细分析了SOC芯片低功耗设计的理论及其实现方法。     

安捷伦与华大携手成立SOC测试基地

安捷伦科技与中国华大集成电路设计中心(www.cidc.com.cn)于1月16日在北京签订合作协议，携手成立北京地区第一个系统级芯片(SOC)测试服务基地。该基地将发挥中国华大领先的工程验证经验和批量测试能力，采用安捷伦93000 SOC测试系统，为北京地区提供对含有微处理器、高速数字、内嵌式内存和模拟信号等各种复杂组合的SOC测试能力，为北京地区及周边的集成电路IC）设计公司提供一流的SOC测试服务，促进中国芯片产业的技术提升。发展IC产业是中国“十五”计划中重点项目之一，而SOC则代表了当前IC设计发展的主流。据中国半导体行业协…     

从SOC到NOC的集成电路设计技术发展

遵循摩尔定律的预言,半导体集成电路工艺技术持续高速向深亚微米工艺发展,大规模集成电路设计技术是发展过程中需要解决的关键问题.基于片上总线的SOC设计技术解决了大规模集成电路的设计难点,但是片上总线的应用带来了可扩展性差、平均通信效率低等问题.近几年研究提出全新的集成电路体系结构NOC,是将计算机网络技术移植到芯片设计中,从体系结构上彻底解决了SOC设计技术存在的问题.因此,NOC将成为集成电路下一代主流设计技术.     

SOC设计:IC产业链设计史上的重大革命

集成电路芯片设计是IC产业链的龙头,而系统芯片(SOC)集中了芯片设计的先进技术。本文论述了SOC芯片的最新设计技术和焦点技术,包括嵌入式CPU,IP模块设计以及芯片的验证和测试等,展望了当前SOC芯片设计的发展趋势。     

SoC设计的关键技术

系统级芯片设计技术作为当今超大规模集成电路的发展趋势，是21世纪集成电路技术的主流，但是这种新技术的产生面临着一些设计问题和挑战。本文介绍了SoC的主要设计技术，并阐述了SOC设计中存在的一些技术挑战等。     

SOC中的MBIST设计

随着超大规模集成电路的发展,设计的集成度越来越高,基于IP的SOC设计正在成为IC设计的主流.为了确保SOC的功能正确,可测性设计(Design for Test,简称DFT)显得尤为关键.DFT设计包括扫描设计、JTAG设计和BIST设计.另外,当前SOC芯片中集成了大量的存储器,为了确保存储器没有故障,基于存储器的...     

SOC设计方法学(一)

本文通过对集成电路Ic技术发展现状的讨论和历史回顾,特别是通过对电子整机设计技术发展趋势的探讨,引入系统芯片(System on chip,简称SOC)的定义、主要特点及其设计方法学等基本概念,并着重探讨面向SOC的新一代集成电路设计方法学的主要研究内容和发展趋势.     

SOC基于LFSR的混合模式测试

随着集成电路深亚微米制造技术和设计技术迅速发展,系统芯片(SOC)作为一种解决方案得到了越来越广泛的应用。SOC的测试中,内建自测试(Built.In Self-Test,BIST)成为人们研究的热点。文中对SOC的设计特点及其BIST中的混合模式测试进行了探讨。     

纳米CMOS集成电路设计技术和发展趋势

论述了日美等国纳米CMOS集成电路半导体制造工艺的现状和发展趋势,分析说明国外半导体制造技术的战略和发展状况;结合90 nm CMOS工艺设计的超大规模SOC芯片的实践,对纳米CMOS集成电路设计技术进行分析;阐述SOC设计面临的技术难题,并对今后的发展趋势进行了预测。     

Development of the readout system for waveguide multilayer optical card

Waveguide multilayer optical card （WMOC） is a novel storage device of three-dimensional optical information. An advanced readout system fitting for the WMOC is introduced in this paper. The hardware mainly consists of the light source for reading, WMOC, motorized stages addressing unit, microscope imaging unit, CCD detecting unit and PC controlling ＆ processing unit. The movement of the precision motorized stage is controlled by the computer through Visual Basic （VB） language in software. A control panel is also designed to get the layer address and the page address through which the position of the motorized stages can be changed. The WMOC readout system is easy to manage and the readout result is directly displayed on computer monitor.     

Nanoimprint Lithography -A Next Generation High Volume Lithography Technique

IntroductionNanoimprint Lithography is a well-acknowl-edged low cost, high resolution, large area pattern-ing process. It includes the most promising methods,high-pressure hot embossing lithography (HEL) [2],UV-cured imprinting (UV-NIL) [3] and micro contactprinting (m-CP, MCP) [4]. Curing of the imprintedstructures is either done by subsequent UV-lightexposure in the case of UV-NIL or by cooling downbelow the glass transition temperature of the ther-moplastic material in case of HEL…     

Collinear phase-matching study of terahertz-wave generation via difference frequency mixed in GaAs and Inp

The collinearly phase-matching condition of terahertz-wave generation via difference frequency mixed in GaAs and InP is theoretically studied. In collinear phase-matching, the optimum phase-matching wave hands of these two crystals are calculated. The optimum phase-matching wave bands in GaAs and lnP are 0.95-1.38μm and 0.7-0.96μm respectively. The influence of the wavelength choice of the pump wave on the coherent length in THz-wave tuning is also discussed. The influence of the temperature alteration on the phase-matching and the temperature tuning properties in GaAs crystal are calculated and analyzed. It can serve for the following experiments as a theoretical evidence and a reference as well.     

Effects of the alloy compositions on the phonon-polaritons in ternary mixed crystals

Composition dependence of bulk and surface phonon-polaritons in ternary mixed crystals are studied in the framework of the modified random-element-isodisplacement model and the Bom-Huang approximation. The numerical results for Several Ⅱ - Ⅵ and Ⅲ- Ⅴ compound systems are performed, and the polariton frequencies as functions of the compositions for ternary mixed crystals AlxGa1-xAs, GaPxAS1-x, ZnSxSe1-x, GaAsxSb1-x, GaxIn1-xP, and ZnxCd1-xS as examples are given and discussed. The results show that the dependence of the energies of two branches of bulk phonon-polaritons which have phonon-like characteristics, and surface phonon-polaritons on the compositions of ternary mixed crystals are nonlinear and different from those of the corresponding binary systems.     

Influence of PVK ： NPB hole transporting layer on the characteristics of organic light-emitting devices

A doping system consisting of NPB and PVK is employed as a composite hole transporting layer （CHTL）. By adjusting the component ratio of the doping system, a series of devices with different concentration proportion of PVK ： NPB are constracted. The result shows that doping concentration of NPB enhances the competence of hole transporting ability, and modifies the recombination region of charge as well as affects the surface morphology of doped film. Optimum device with a maximum brightness of 7852 cd/m^2 and a power efficiency of 1.75 lm/W has been obtained by choosing a concentration proportion of PVK ： NPB at 1：3.     

New insert layer structure OLEDs

An insert layer structure organic electroluminescent device（OLED） based on a new luminescent material （Zn（salen）） is fabricated. The configuration of the device is ITO/CuPc/NPD/Zn（salen）/Liq/LiF/A1/CuPc/NPD/Zn（salen）/Liq/LiF/A1. Effective insert electrode layers comprising LiF（1nm）/Al（5 nm） are used as a single semitransparent mirror, and bilayer cathode LiF（1 nm）/A1（100 nm） is used as a reflecting mirror. The two mirrors form a Fabry-Perot microcavity and two emissive units. The maximum brightness and luminous efficiency reach 674 cd/m^2 and 2.652 cd/A, respectively, which are 2.1 and 3.7 times higher than the conventional device, respectively. The superior brightness and luminous efficiency over conventional single-unit devices are attributed to microcavity effect.     

Analysis of error performance on Turbo coded FDPIM

Due to variable symbol length of digital pulse interval modulation（DPIM）, it is difficult to analyze the error performances of Turbo coded DPIM. To solve this problem, a fixed-length digital pulse interval modulation（FDPIM） method is provided. The FDPIM modulation structure is introduced. The packet error rates of uncoded FDPIM are analyzed and compared with that of DPIM. Bit error rates of Turbo coded FDPIM are simulated based on three kinds of analytical models under weak turbulence channel. The results show that packet error rate of uncoded FDPIM is inferior to that of uncoded DPIM. However, FDPIM is easy to be implemented and easy to be combined, with Turbo code for soft-decision because of its fixed length. Besides, the introduction of Turbo code in this modulation can decrease the average power about 10 dBm, which means that it can improve the error performance of the system effectively.     

A method for calculating the center position of collimated light

It is a key problem to accurately calculate beam spots＇ center of measuring the warp by using a collimated laser. A new method, named double geometrical center method （DGCM）, is put forward for the first time. In this method, a plane wave perpendicularly irradiates an aperture stop, and a charge couple device （CCD） is employed to receive the diffraction-beam spots, then the geometrical centers of the fast and the second diffraction-beam spots are calculated respectively, and their mean value is regarded as the center of datum beam. In face of such adverse instances as laser intension distributing defectively, part of the image being saturated, this method can still work well. What＇s more, this method can detect whether an unacceptable error exits in the courses of image receiving, processing and calculating. The experimental results indicate the precision of this method is high.     

Resolution Enhancement Technology:Integrated Process Solutions using OPC

DUV lithography, using the 248 nm wavelength, is a viable manufacturing option for devices with features at 130 nm and less. Given the low kl value of the lithography, integrated process development is a necessary method for achieving acceptable process latitude. The application of assist features for rule based OPC requires the simultaneous optimization of the mask, illumination optics and the resist.Described in this paper are the details involved in optimizing each of these aspects for line and space imaging.A reference pitch is first chosen to determine how the optics will be set. The ideal sigma setting is determined by a simple geometrically derived expression. The inner and outer machine settings are determined, in turn,with the simulation of a figure of merit. The maximum value of the response surface of this FOM occurs at the optimal sigma settings. Experimental confirmation of this is shown in the paper.Assist features are used to modify the aerial image of the more isolated images on the mask. The effect that the diffraction of the scattering bars (SBs) has on the image intensity distribution is explained. Rules for determining the size and placement of SBs are also given.Resist is optimized for use with off-axis illumination and assist features. A general explanation of the material' s effect is discussed along with the affect on the through-pitch bias. The paper culminates with the showing of the lithographic results from the fully optimized system.     

Cost-effective test solutions for smart card and other integrated flash applications

From its emergence in the late 1980s as a lower cost alternative to early EEPROM technologies, flash memory has evolved to higher densities and speedsand rapidly growing acceptance in mobile applications.In the process, flash memory devices have placed increased test requirements on manufacturers. Today, as flash device test grows in importance in China, manufacturers face growing pressure for reduced cost-oftest, increased throughput and greater return on investment for test equipment. At the same time, the move to integrated flash packages for contactless smart card applications adds a significant further challenge to manufacturers seeking rapid, low-cost test.