共查询到18条相似文献,搜索用时 156 毫秒
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采用反应磁控溅射并在氧氛围下进行后退火处理的方式,制备了氧化钒薄膜.尝试了在氧化钒上以不同衬底温度和溅射功率等工艺条件溅射金属薄膜电极.通过对氧化钒-金属接触的电流-电压(I-V)测试的数据进行分析拟合,研究了氧化钒薄膜表面性质和测试偏压的变化对I-V特性曲线欧姆系数的影响.结果表明在化学计量比约为VO2.15的非晶氧化钒薄膜上,溅射的金属电极随着溅射功率和测试偏压的提高,I-V特性曲线的线性度得到了逐步的改善.通过比较Ni/Cr,Ti及Al不同金属电极的接触性能,提出了合理的欧姆接触工艺条件以及电极工作电压范围. 相似文献
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相变存储器作为下一代具有竞争力的新型存储器,其基础和核心是相变存储介质.为了制备基于VO2薄膜的非易失性相变存储器,首先采用等离子体增强化学气相沉积法在氟掺杂二氧化锡(FTO)导电玻璃衬底上沉积一层厚度为100 nm的TiO2薄膜,再通过直流磁控溅射法制备VO2薄膜,并在TiOJFTO复合薄膜上形成VO2/TiO2/FTO微结构,用X射线衍射仪(XRD)、扫描电子显微镜(SEM)、四探针测试仪和半导体参数测试仪表征分析微结构的结晶和非易失性相变存储特性.结果表明,N2和O2的体积流量比为60∶40时,在TiO2/FTO上可生长出晶向为〈110〉的高质量VO2薄膜,在VO2/TiO2/FTO微结构两侧反复施加不同的脉冲电压,可观测到微结构具有非易失性相变存储特性,在67,68和69℃温度下的相变阈值电压分别为8.5,6.5和5.5V,相比多层膜结构的相变阈值电压降低了约37%. 相似文献
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在被釉氧化铝陶瓷基片上,采用真空电阻蒸发法和等离子体增强化学气相沉积法制备了Au/NiCr电极薄膜及氮化硅(SiNx)介质薄膜,并对薄膜进行光刻图形化,制成了Au/NiCr/SiNx/Au/NiCr结构的MIM电容器。研究了所制电容器的介电性能、介温性能和I-V特性等电学性能。结果表明:所得MIM电容器具有很低的介电损耗(1MHz时tanδ为0.00192)及很高的电压稳定性;在–55~+150℃的范围内其1MHz时的电容温度系数为258×10–6/℃;另外,其I-V特性曲线显示出较好的对称性,漏电流密度较低,可承受较高的电压。 相似文献
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利用溶胶-凝胶旋涂镀膜法结合热处理工艺在FTO玻璃上制备了ZnO薄膜,并通过X射线衍射(XRD)、扫描电子镜(SEM)对其晶相及表面形貌进行了表征;以酞菁染料ZnPc和窄禁带半导体PbS量子点(Q-PbS)为敏化剂,分别制备了FTO/ZnO/ZnPc电极、FTO/ZnO/Q-PbS电极和FTOZnO/Q-PbS/ZnPc电极,结果表明,ZnPc和Q-PbS对ZnO纳米颗粒膜产生了良好的敏化作用,且两者的复合敏化效果最好;制备了FTO/ZnO/Q-PbS/ZnPc为光阳极的染料敏化太阳能电池(DSSC),在模拟太阳光下,电池的开路电压为304mV,短路电流为1.42mA,光电转换效率为0.696%,填充因子为0.348。 相似文献
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基于溶液旋涂法、高压退火工艺,制备了非晶铟镓锌氧化物(IGZO)薄膜、铟锌氧化物(IZO)薄膜和双层IGZO/IZO薄膜,研究了这些薄膜的电学特性。结果表明,在相同制作工艺下,IGZO单层薄膜的电流随外加恒流源时间的偏移不明显,而双层IGZO/IZO薄膜的电流随外加恒流源时间的偏移较大。退火温度在240 ℃~300 ℃范围内,电流的偏移量随温度升高而减小,回滞幅度也减小。薄膜的界面态对薄膜器件的I-V特性有较大影响,升高退火温度可改善IGZO/IZO双层薄膜界面特性。 相似文献
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《电子技术与软件工程》2016,(6)
采用溶胶-凝胶法,分别在普通玻璃、石英玻璃、FTO导电玻璃上制备CuWO_4薄膜,接着在FTO上制备BiVO_4薄膜和BiVO_4/CuWO_4复合薄膜,通过XRD、SEM、UVVis等测试方法对这些薄膜表征和评价。结果表明:在FTO基体上能得到纯相的CuWO_4和BiVO_4薄膜,以及BiVO_4/CuWO_4复合薄膜;与单层的BiVO_4膜相比,BiVO_4/CuWO_4复合薄膜对可见光的吸收范围有了大幅的提升。 相似文献
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氧化锌宽禁带半导体薄膜的发光及其p-n结特性 总被引:3,自引:0,他引:3
报道了用直流反应溅射法制备的氧化锌薄膜的近紫外发射以及热处理条件对受激发射谱的影响。同时用化学反应辅助掺杂方法生长了 p型和 n型 Zn O薄膜 ,研究了 Zn O/ Si异质结和氧化锌同质 p-n结的电压 -电流特性 (I-V特性 ) 相似文献
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Molecular beam epitaxy grown 0.5-μm and 2.0-μm thick undoped ZnSe on semi-insulating (100) GaAs substrates were prepared for metal-semiconductor-metal (MSM) photodetector devices. The MSM photodetectors consisted of interdigitated metal fingers with 2, 3, and 4 μm width/spacing on a wafer. A multilayer resist process was employed using polyimide and SiO2 thin films before the pattern generation to aid in a special low temperature (LT) lift-off process. Dark current-voltage (I-V), DC photo I-V, high frequency I-V, spectral response, and frequency response techniques were employed for testing the device performance. The cryogenic processed metallization provided an improved interface between metal and semiconductor interface. The breakdown voltage in these devices is dependent on the electrode width/spacing and not on film thickness. Dark current remained at around 1 pA for a bias of ±10 V. The devices exhibited a high spectral responsivity of 0.6 (A/W) at a wavelength of 460 nm at 5 V applied bias. A maximum spectral responsivity of 1 (A/W) at an applied bias of 5 V was obtained in these devices indicating an internal gain mechanism. This internal gain mechanism is attributed to hole accumulation in ZnSe epilayers 相似文献
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Polycrystalline II–VI semiconductor materials such as oxygenated CdS have a wide and tunable band gap (≥2.5 eV) which plays an important role in increasing the light absorption capacity of CdTe absorber. In this study, the ultra-thin CdS:O and CdTe films were deposited by the sputtering technique and the optimum condition of deposition power is investigated. The prepared ultra-thin films were characterized by X-ray diffraction (XRD), scanning electron microscopy (SEM), energy dispersive X-ray (EDX) analysis, X-ray photoelectron spectroscopy (XPS), UV–vis spectrometry, Hall Effect and current–voltage measurements techniques. The complete cell was then fabricated by the sputtering technique with a novel configuration of ‘glass/FTO/ZnO:Sn/CdS:O/CdTe/C:Cu/Ag’. To avoid the pin hole effect, the high resistive ZnO:Sn layer was deposited as a buffer layer in between the FTO and CdS:O films. It has been observed that the cell performance parameters are found to be varied with deposition power of CdO:S films and an overall conversion efficiency of 10.27% was achieved. 相似文献
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A new optoelectronic integrated device is proposed for a light-amplifying optical switch (LAOS). The device is composed of an optical field-effect transistor (OPFET) in series with a light source which may be either a double heterostructure light-emitting diode (LED) or laser diode (LD). A quantitative circuit model for the proposed LAOS is presented and theoretical investigation is carried out for developing a current-voltage (I-V) relation for the device. It is shown analytically that switching action takes place from a low current state to a high current state through a region of negative differential resistance (NDR) when a voltage greater than the breakover voltage is applied 相似文献
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《Electron Device Letters, IEEE》1981,2(8):198-200
The effects of undoped layer thickness on the dark and illuminated I-V characteristics of hydrogenated amorphous silicon Schottky barrier solar cells are investigated. Schottky barrier (S.B.) metals having different work function (Cr and Pd) were deposited on the 0.22 µm - 1.45 µm thick a-Si:H films. Photovoltaic performance, Jsc , Voc , FF and efficiency, are independent of thickness of the undoped layer if film thickness is larger than the depletion region width. Jsc and Voc are controlled by S.B. metal and FF is independent of S.B. metal. Dark I-V characteristics depend on both S.B. metal and device thickness suggesting a barrier controlled space charge limited phenomena. Variation of turn-on (threshold) voltage with undoped layer thickness can be applied to the design of switching and memory devices. 相似文献
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A new physical model of determining the static I-V curve of the light amplifying optical switch (LAOS) is derived. The model is based on deriving the currents of the HPT and the feedback current of the LAOS. The feedback currents for optical and/or electrical feedback are determined by solving the continuity equation in the collector and the base of the HPT. A negative resistance region in the I-V curve is obtained and controlled by varying the feedback coefficient of the device and the Early effect coefficient. The main factors affecting the negative resistance region are the feedback coefficient, Early effect, the recombination currents in the emitter-base space-charge region, and the ratio of the collector to base doping. The switching voltage of the device is also calculated for different parameters 相似文献