蓝宝石衬底上槽栅型X波段增强型AlGaN/GaN HEMT

研制了一款X波段增强型AlGaN/GaN高电子迁移率晶体管(HEMT)。在3英寸(1英寸=2.54 cm)蓝宝石衬底上采用低损伤栅凹槽刻蚀技术制备了栅长为0.3μm的增强型AlGaN/GaN HEMT。所制备的增强型器件的阈值电压为0.42 V,最大跨导为401 mS/mm,导通电阻为2.7Ω·mm。器件的电流增益截止频率和最高振荡频率分别为36.1和65.2 GHz。在10 GHz下进行微波测试,增强型AlGaN/GaN HEMT的最大输出功率密度达到5.76 W/mm,最大功率附加效率为49.1%。在同一材料上制备的耗尽型器件最大输出功率密度和最大功率附加效率分别为6.16 W/mm和50.2%。增强型器件的射频特性可与在同一晶圆上制备的耗尽型器件相比拟。     

Dual-gate AlGaN/GaN modulation-doped field-effect transistors with cut-off frequencies f/sub T/>60 GHz

We demonstrate dual-gate AlGaN/GaN modulation-doped field-effect transistors (MODFETs) with gate-lengths of 0.16 /spl mu/m and 0.35 /spl mu/m for the first and second gates, respectively. The dual-gate device exhibits a current-gain cut-off frequency f/sub T/>60 GHz, and can simultaneously achieve a high breakdown voltage of >+100 V. In comparison to single-gate devices with the same gate length 0.16 /spl mu/m, dual-gate FETs can significantly increase breakdown voltages, largely increasing the maximum allowable drain bias for high power application. The continuous wave (CW) output power is in excess of 3.5 W/mm at 8.2 GHz. The corresponding large-signal gain is 12 dB and the power added efficiency is 45%. The dual-gate device with different gate lengths shows the capability of providing simultaneous high cut-off frequencies, and high breakdown voltages for broadband power amplifiers.     

High performance 0.35 μm gate-length monolithicenhancement/depletion-mode metamorphicIn0.52Al0.48As/In0.53Ga0.47As HEMTs on GaAs substrates

Monolithic integration of enhancement (E)- and depletion (D)-mode metamorphic In_0.52Al_0.48As/In_0.53Ga_0.47 As/GaAs HEMTs with 0.35 μm gate-length is presented for the first time. Epilayers are grown on 3-inch SI GaAs substrates using molecular beam epitaxy. A mobility of 9550 cm²/V-s and a sheet density of 1.12×10^{12 -2} are achieved at room temperature. Buried Pt-gate was employed for E-mode devices to achieve a positive shift in the threshold voltage. Excellent characteristics are achieved with threshold voltage, maximum drain current, and extrinsic transconductance of 100 mV, 370 mA/mm and 660 mS/mm, respectively for E-mode devices, and -550 mV, 390 mA/mm and 510 mS/mm, respectively for D-mode devices. The unity current gain cutoff frequencies of 75 GHz for E-mode and 80 GHz for D-mode are reported     

2 V-operated InGaP-AlGaAs-InGaAs enhancement-mode pseudomorphic HEMT

A low-voltage single power supply enhancement-mode InGaP-AlGaAs-InGaAs pseudomorphic high-electron mobility transistor (PHEMT) is reported for the first time. The fabricated 0.5/spl times/160 /spl mu/m/sup 2/ device shows low knee voltage of 0.3 V, drain-source current (I/sub DS/) of 375 mA/mm and maximum transconductance of 550 mS/mm when drain-source voltage (V/sub DS/) was 2.5 V. High-frequency performance was also achieved; the cut-off frequency(F/sub t/) is 60 GHz and maximum oscillation frequency(F/sub max/) is 128 GHz. The noise figure of the 160-/spl mu/m gate width device at 17 GHz was measured to be 1.02 dB with 10.12 dB associated gain. The E-mode InGaP-AlGaAs-InGaAs PHEMT exhibits a high output power density of 453 mW/mm with a high linear gain of 30.5 dB at 2.4 GHz. The E-mode PHEMT can also achieve a high maximum power added efficiency (PAE) of 70%, when tuned for maximum PAE.     

单片集成GaAs增强／耗尽型赝配高电子迁移率晶体管

介绍了单片集成GaAs增强／耗尽型赝配高电子迁移率晶体管（PHEMT）工艺。借助栅金属的热处理过程,形成了热稳定性良好的Pt／Ti／Pt／Au栅。AFM照片结果表明Pt金属膜表面非常平整,2nm厚度膜的粗糙度RMS仅为0．172nm。通过实验,我们还得出第一层Pt金属膜的厚度和退火后的下沉深度比大概为1：2。制作的增强型／耗尽型PHEMT的闽值电压（定义于1mA／mm）、最大跨导、最大饱和漏电流密度、电流增益截止频率分别是＋0．185／-1．22V、381．2／317．5mS／mm、275／480mA／mm、38／34GHz。增强型器件在4英寸圆片上的阈值电压标准差为19mV。     

High breakdown voltage (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P/InGaAs quasi-enhancement-mode pHEMT with field-plate technology

A high breakdown voltage and a high turn-on voltage (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P/InGaAs quasi-enhancement-mode (E-mode) pseudomorphic HEMT (pHEMTs) with field-plate (FP) process is reported for the first time. Between gate and drain terminal, the transistor has a FP metal of 1 /spl mu/m, which is connected to a source terminal. The fabricated 0.5/spl times/150 /spl mu/m/sup 2/ device can be operated with gate voltage up to 1.6 V owing to its high Schottky turn-on voltage (V/sub ON/=0.85 V), which corresponds to a high drain-to-source current (I/sub ds/) of 420 mA/mm when drain-to-source voltage (V/sub ds/) is 3.5 V. By adopting the FP technology and large barrier height (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P layer design, the device achieved a high breakdown voltage of -47 V. The measured maximum transconductance, current gain cutoff frequency and maximum oscillation frequency are 370 mS/mm, 22 GHz , and 85 GHz, respectively. Under 5.2-GHz operation, a 15.2 dBm (220 mW/mm) and a 17.8 dBm (405 mW/mm) saturated output power can be achieved when drain voltage are 3.5 and 20 V. These characteristics demonstrate that the field-plated (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P E-mode pHEMTs have great potential for microwave power device applications.     

Comparisons of microwave performance between single-gate anddual-gate MODFETs

Both a 1.2-μm and a 0.3-μm gate length, n⁺-GaAs/InGa/n⁺-AlGaAs double-heterojunction MODFET have been fabricated with single-gate and dual-gate control electrodes. Extrinsic DC transconductance of 500 mS/mm has been achieved from a 0.3-μm single-gate MODFET. The device also has a current gain cutoff frequency f_T of 43 GHz and 14-dB maximum stable gain at 26 GHz with the stability factor k as low as 0.6 from the microwave S-parameter measurements. At low-frequency dual-gate MODFETs demonstrate higher gain than the single-gate MODFETs. However, the k of dual-gate MODFETs approaches unity at a faster rate. Power gain roll-off slopes of 3-, 6-, and 12-dB/octave have been observed for the dual-gate MODFETs     

GaAs Dual-Gate FET for Operation Up to K-Band

A high-frequency equivalent circuit model of a GaAs dual-gate FET and analytical expressions for the input/output impedances, transconductance, unilateral gain, and stability factor are presented in this paper. It is found that the gain of a dual-gate FET is higher than that of a single-gate FET at low frequency, but it decreases faster as frequency increases because of the capacitive shunting effect of the second gate. A dual-gate power FET suitable for variable gain amplifier applications up to K-band has been developed. At 10 GHz, a I.2-mm gatewidth device has achieved an output power of 1.1 W with 10.5-dB gain and 31-percent power-added efficiency. At 20 GHz, the same device delivered an output power of 340 mW with 5.3-dB gain. At K-band, a dynamic gain control range of up to 45 dB was obtained with an insertion phase change of no more than +-2 degrees for the first 10 dB of gain control.     

High-Temperature Operation of AlGaN/GaN HEMTs Direct-Coupled FET Logic (DCFL) Integrated Circuits

This letter presents the high-temperature performance of AlGaN/GaN HEMT direct-coupled FET logic (DCFL) integrated circuits. At 375 degC, enhancement-mode (E-mode) AlGaN/GaN HEMTs which are used as drivers in DCFL circuits exhibit proper E-mode operation with a threshold voltage (V_TH) of 0.24 V and a peak current density of 56 mA/mm. The monolithically integrated E/D-mode AlGaN/GaN HEMTs DCFL circuits deliver stable operations at 375 degC: An E/D-HEMT inverter with a drive/load ratio of 10 exhibits 0.1 V for logic-low noise margin (NM_L) and 0.3 V for logic-high-noise margin (NM_H) at a supply voltage (V_DD) of 3.0 V; a 17-stage ring oscillator exhibits a maximum oscillation frequency of 66 MHz, corresponding to a minimum propagation delay ( tau_pd) of 446 ps/stage at V_DD of 3.0 V     

Single-voltage-supply highly efficient E/D dual-gate pseudomorphicdouble-hetero HEMT's with platinum buried gates

Highly efficient enhance/depletion (E/D) dual-gate HEMT's for use in high-power linear amplifiers with a single biasing supply are demonstrated. These devices include platinum buried gates to realize a single biasing supply. A double-heterostructure and a GaAs/InGaAs/GaAs superlattice channel were adopted to obtain a good linearity and a large gain. An E/D dual-gate field effect transistors (FET) structure is also adopted to improve the gain and efficiency. High output power of 24 dBm, high power gain of 24 dB, and high power-added-efficiency of 46% for the gate width of 4-mm sample were obtained under conditions with a 1.5-GHz Japan Personal Digital Cellular (PDC) standard and with a +3.5 V single biasing supply     

Design and simulation of a novel E-mode GaN MIS-HEMT based on a cascode connection for suppression of electric field under gate and improvement of reliability

We proposed a novel AlGaN/GaN enhancement-mode (E-mode) high electron mobility transistor (HEMT) with a dual-gate structure and carried out the detailed numerical simulation of device operation using Silvaco Atlas. The dual-gate device is based on a cascode connection of an E-mode and a D-mode gate. The simulation results show that electric field under the gate is decreased by more than 70% compared to that of the conventional E-mode MIS-HEMTs (from 2.83 MV/cm decreased to 0.83 MV/cm). Thus, with the discussion of ionized trap density, the proposed dual-gate structure can highly improve electric field-related reliability, such as, threshold voltage stability. In addition, compared with HEMT with field plate structure, the proposed structure exhibits a simplified fabrication process and a more effective suppression of high electric field.     

DC and RF Characteristics of AlGaN/GaN/InGaN/GaN Double-Heterojunction HEMTs

We present the detailed dc and radio-frequency characteristics of an Al_0.3Ga_0.7N/GaN/In_0.1Ga_0.9 N/GaN double-heterojunction HEMT (DH-HEMT) structure. This structure incorporates a thin (3 nm) In_0.1Ga_0.9N notch layer inserted at a location that is 6-nm away from the AlGaN/GaN heterointerface. The In_0.1Ga_0.9N layer provides a unique piezoelectric polarization field which results in a higher potential barrier at the backside of the two-dimensional electron gas channel, effectively improving the carrier confinement and then reducing the buffer leakage. Both depletion-mode (D-mode) and enhancement-mode (E-mode) devices were fabricated on this new structure. Compared with the baseline AlGaN/GaN HEMTs, the DH-HEMT shows lower drain leakage current. The gate leakage current is also found to be reduced, owing to an improved surface morphology in InGaN-incorporated epitaxial structures. DC and small- and large-signal microwave characteristics, together with the linearity performances, have been investigated. The channel transit delay time analysis also revealed that there was a minor channel in the InGaN layer in which the electrons exhibited a mobility slightly lower than the GaN channel. The E-mode DH-HEMTs were also fabricated using our recently developed CF₄-based plasma treatment technique. The large-signal operation of the E-mode GaN-based HEMTs was reported for the first time. At 2 GHz, a 1times100 mum E-mode device demonstrated a maximum output power of 3.12 W/mm and a power-added efficiency of 49% with single-polarity biases (a gate bias of +0.5 V and a drain bias of 35 V). An output third-order interception point of 34.7 dBm was obtained in the E-mode HEMTs     

0.3-μm gate-length enhancement mode InAlAs/InGaAs/InPhigh-electron mobility transistor

The fabrication and performance of ultra-high-speed 0.3-μm gate-length enhancement-mode high-electron-mobility transistors (E-HEMT's) are reported. By using a buried platinum-gate technology and incorporating an etch-stop layer in the heterostructure design, submicron E-HEMT devices exhibiting both high-threshold voltages and excellent threshold voltage uniformity have been achieved. The devices demonstrate a threshold voltage of +171 mV with a standard deviation of only 9 mV. In addition, a maximum DC extrinsic transconductance of 697 mS/mm is measured at room temperature. The output conductance is 22 mS/mm, which results in a maximum voltage gain (g_m/g₀ ) of 32. The devices show excellent RF performance, with a unity current-gain cutoff frequency (f_t) of 116 GHz and a maximum frequency of oscillation (f_max) of 229 GHz. To the best of the authors' knowledge, these are the highest reported frequencies for lattice-matched E-HEMT's on InP     

GaAs基单片集成InGaP/AlGaAs/InGaAs增强/耗尽型PHEMTs

提出了一种新结构单片集成增强/耗尽型(E/D)InGaP/AlGaAs/InGaAs赝配高电子迁移率晶体管(PHEMTs).外延层材料通过分子束外延技术生长,在室温下,其电子迁移率和二维电子气浓度分别为5410cm2/(V·s)和1.34×1012cm-2.首次提出了普通光学接触曝光分步制作增强与耗尽型的栅技术方法.研制出了单片集成E/D型PHEMTs,获得良好的直流和交流特性,最大饱和漏电流密度分别为300和340mA/mm,跨导为350和300mS/mm,阈值电压为0.2和-0.4V,增强型的fT和fmax为10.3和12.4GHz,耗尽型的fT和fmax为12.8和14.7GHz.增强/耗尽型PHEMTs的栅漏反向击穿电压都为-14V.     

Monolithically integrated enhancement/depletion-mode AIGaN/GaN HEMT D flip-flop using fluorine plasma treatment

Depletion-mode and enhancement-mode AlGaN/GaN HEMTs using fluorine plasma treatment were integrated on one wafer. Direct-coupled FET logic circuits, such as an E/D HEMT inverter, NAND gate and D flip-flop, were fabricated on an AlGaN/GaN heterostructure. The D flip-flop and NAND gate are demonstrated in a GaN system for the first time. The dual-gate AlGaN/GaN E-HEMT substitutes two single-gate E-HEMTs for simplifying the NAND gate and shrinking the area, integrating with a conventional AlGaN/GaN D-HEMT and demonstrating a NAND gate. E/D-mode D flip-flop was fabricated by integrating the inverters and the NAND gate on the AlGaN/GaN heterostructure. At a supply voltage of 2 V, the E/D inverter shows an output logic swing of 1.7 V, a logic-low noise margin of 0.49 V and a logic-high noise margin of 0.83 V. The NAND gate and D flip-flop showed correct logic function demonstrating promising potential for GaN-based digital ICs.     

High-performance enhancement-mode AlGaN/GaN HEMTs using fluoride-based plasma treatment

We report a novel approach in fabricating high-performance enhancement mode (E-mode) AlGaN/GaN HEMTs. The fabrication technique is based on fluoride-based plasma treatment of the gate region in AlGaN/GaN HEMTs and post-gate rapid thermal annealing with an annealing temperature lower than 500/spl deg/C. Starting with a conventional depletion-mode HEMT sample, we found that fluoride-based plasma treatment can effectively shift the threshold voltage from -4.0 to 0.9 V. Most importantly, a zero transconductance (g/sub m/) was obtained at V/sub gs/=0 V, demonstrating for the first time true E-mode operation in an AlGaN/GaN HEMT. At V/sub gs/=0 V, the off-state drain leakage current is 28 /spl mu/A/mm at a drain-source bias of 6 V. The fabricated E-mode AlGaN/GaN HEMTs with 1 /spl mu/m-long gate exhibit a maximum drain current density of 310 mA/mm, a peak g/sub m/ of 148 mS/mm, a current gain cutoff frequency f/sub T/ of 10.1 GHz and a maximum oscillation frequency f/sub max/ of 34.3 GHz.     

Extremely high transconductance Ge/Si0.4Ge0.6p-MODFET's grown by UHV-CVD

Ge-channel modulation-doped field-effect transistors (MODFET's) with extremely high transconductance are reported. The devices were fabricated on a compressive-strained Ge/Si_0.4Ge_0.6 heterostructure with a Hall mobility of 1750 cm²/Vs (30,900 cm²/Vs) at room temperature (77 K). Self-aligned, T-gate p-MODFET's with L_g=0.1 μm displayed an average peak extrinsic transconductance (g(m_ext)) of 439 mS/mm, at a drain-to-source bias voltage (V_ds) of -0.6 V, with the best device having a value of g(m_ext)=488 mS/mm. At 77 K, values as high as g(m_ext)=687 mS/mm were obtained at a bias voltage of only V_ds=-0.2 V. These devices also displayed a unity current gain cutoff frequency (f_T) of 42 GHz and maximum frequency of oscillation (f_max) of 86 GHz at V_ds=-0.6 V and -1.0 V, respectively     

F等离子体处理增强型及耗尽型AlGaN/GaN HEMT集成的D触发器

耗尽型和F等离子体处理增强型高电子迁移率晶体管（HEMT）被集成在同一圆片上。增强型/耗尽型 HEMT反向器、与非门以及D触发器等直接耦合场效应晶体管逻辑电路被制作在AlGaN/GaN异质结上。D触发器在GaN体系中首次被实现。在电源电压为2伏的条件下,增强型/耗尽型反向器显示输出逻辑摆幅为1.7伏,逻辑低噪声容限为0.49伏,逻辑高噪声容限为0.83伏。与非门和D触发器的功能正确,证实了GaN基数字电路的发展潜力。     

F等离子体处理增强型及耗尽型AlGaN/GaN HEMT集成SRAM单元电路和电平转换电路

我们设计并且制备了GaN基增强型/耗尽型（E/D 模）直接耦合6管静态随机存取存储器（SRAM）单元电路和电平转换电路。利用氟等离子处理工艺,使用适中的AlGaN势垒层厚度异质结材料,增强型和耗尽型铝镓氮/氮化镓 HEMTs被集成在了同一个晶片上。六管SRAM单元由对称的两个E/D模反相器和增强型开关管组成。在1V的工作电压下,SRAM单元电路的输出高电平和低电平分别为0.95V和0.07V。电平转换电路的工作电压为+6V和-6V,通过4个串联的镍-铝镓氮/氮化镓肖特基二极管使电压降低。通过轮流控制电平转换电路的两个反相器模块的开关状态,电平转换电路输出两路电压,分别为-0.5V和-5V。电平转换器的翻转电压为0.76V。SRAM单元电路和电平转换电路都能正确地工作,展现了氮化镓基E/D模数字和模拟集成电路的潜力。提出了几条设计上的考虑,以避免阈值电压的漂移对电路工作造成的影响。     

30 nm T-gate enhancement-mode InAlN/AlN/GaN HEMT on SiC substratesfor future high power RF applications

The DC and RF performance of 30 nm gate length enhancement mode (E-mode) InAlN/AlN/GaN high electron mobility transistor (HEMT) on SiC substrate with heavily doped source and drain region have been investigated using the Synopsys TCAD tool. The proposed device has the features of a recessed T-gate structure, InGaN back barrier and Al₂O₃ passivated device surface. The proposed HEMT exhibits a maximum drain current density of 2.1 A/mm, transconductance g_m of 1050 mS/mm, current gain cut-off frequency f_t of 350 GHz and power gain cut-off frequency f_max of 340 GHz. At room temperature the measured carrier mobility (μ), sheet charge carrier density (n_s) and breakdown voltage are 1580 cm²/(V·s), 1.9×10¹³ cm^-2, and 10.7 V respectively. The superlatives of the proposed HEMTs are bewitching competitor or future sub-millimeter wave high power RF VLSI circuit applications.