共查询到18条相似文献,搜索用时 187 毫秒
1.
2.
3.
4.
5.
6.
7.
针对传统全差分运算放大器电路存在输入输出摆幅小和共模抑制比低的问题,提出了一种高共模抑制比轨到轨全差分运算放大器电路。电路的输入级采用基于电流补偿技术的互补差分输入对,实现较大的输入信号摆幅;中间级采用折叠式共源共栅结构,获得较大的增益和输出摆幅;输出级采用共模反馈环路控制的A类输出结构,同时对共模反馈环路进行密勒补偿,提高电路的共模抑制比和环路稳定性。提出的全差分运算放大器电路基于中芯国际(SMIC) 0.13μm CMOS工艺设计,结果表明,该电路在3.3 V供电电压下,负载电容为5 pF时,可实现轨到轨的输入输出信号摆幅;当输入共模电平为1.65 V时,直流增益为108.9 dB,相位裕度为77.5°,单位增益带宽为12.71 MHz;共模反馈环路增益为97.7 dB,相位裕度为71.3°;共模抑制比为237.7 dB,电源抑制比为209.6 dB,等效输入参考噪声为37.9 nV/Hz1/2@100 kHz。 相似文献
8.
低噪声高共模抑制比的运算放大器是将套筒式共源共栅结构、差分输出和共模负反馈相结合,设计出的一种新型运算放大器.基于SMIC0.18 μm工艺模型对电路进行设计,仿真结果表明该电路的开环增益为82.3 dB,相位裕度为66°,共模抑制比为122 dB,增益平坦带宽为15 MHz,噪声为7.781 nV/sqrt (Hz),达到设计要求. 相似文献
9.
10.
11.
结合电荷泵型LED驱动器的工作要求,从减小输出电压纹波、稳定输出电压出发,设计了一款误差放大器。该误差放大器具有较大的工作电压范围,使电荷泵型LED驱动器高效率低噪声工作。基于CHRT0.35μm CMOS MIXED SIGNAL TECHNOLOGY进行仿真,结果表明,在2.7~5V工作电压范围内,开环电压增益约等于72dB,相位裕度约等于65°,单位增益带宽约等于4.6MHz,共模抑制比CMRR约等于113dB,电源抑制比PSRR约等于100dB。 相似文献
12.
设计了一个共源共栅运算跨导放大器,并成功地将其应用在一款超低功耗LDO线性稳压器芯片中。该设计提高了电源抑制比(PSRR),并具有较高的共模抑制比(CMRR)。电路结构简单,静态电流低。该芯片获得了高达99 dB的电源抑制比。 相似文献
13.
14.
采用电压控制的伪电阻结构,设计了一款具有超低频下截止频率调节功能的带通可变增益放大器(VGA),由于该结构具有可调节超大的等效电阻和反馈电容使VGA的下截止频率可以调节.提出了一种改进的甲乙类运算跨导放大器(OTA)结构,采用新颖的浮动偏置设计,在满足高压摆率的条件下,有效提高共源共栅结构的电压输出范围.将伪电阻用于OTA的共模反馈,克服了阻性共模检测结构负载效应的问题.该VGA电路采用TSMC 0.18 μm标准工艺设计和流片,测试结果表明,1.2V电源电压下,其下截止频率调节范围为1.3~ 244 Hz,增益为49.2,44.2,39.2 dB,带宽为3.4,3.9,4.4 kHz,消耗电流为3.9 μA,共模抑制比达75.2 dB. 相似文献
15.
《Solid-State Circuits, IEEE Journal of》1982,17(6):1008-1013
Describes a precision switched-capacitor sampled-data instrumentation amplifier using NMOS polysilicon gate technology. It is intended for use as a sample-and-hold amplifier for low level signals in data acquisition systems. The use of double correlated sampling technique achieves high power supply rejection, low DC offset, and low 1/f noise voltage. Matched circuit components in a differential configuration minimize errors from switch channel charge injection. Very high common mode rejection (120 dB) is obtained by a new sampling technique which prevents the common mode signal from entering the amplifier. This amplifier achieves 1 mV typical input offset voltage, greater than 95 dB PSRR, 0.15 percent gain accuracy, 0.01 percent gain linearity, and an RMS input referred noise voltage of 30 /spl mu/V/input sample. 相似文献
16.
A current-mode instrumentation amplifier consists of only two current follower differential input transconductance amplifiers is proposed in this paper. The proposed circuit of instrumentation amplifier is realized without using any passive components. Thus, the proposed circuit structure is very simple and suitable to the integrated circuit technology. The input impedance is low and output impedance is high, therefore the proposed circuit is easily cascadable. The gain of the proposed instrumentation amplifier is electronically controllable. The proposed circuit also enjoys the features of high common mode rejection ratio, wide bandwidth and low power consumption. Additionally, performance of the proposed circuit is tested under process, supply voltage and temperature variations. Furthermore, another circuit of instrumentation amplifier, which is capable of providing higher differential mode gain is also shown. The non-ideal and parasitic studies are included. HSPICE simulations are performed to validate the proposed circuits of instrumentation amplifier. 相似文献
17.
设计了有源高速差分示波器探头,实现了差分输入、单端输出功能。同时,设计了一个用于测试该差分探头的差模信号源。该差分探头的设计采用TI公司提供的共模抑制比可达80dB的可控增益芯片VCA822,实现了双端信号转单端信号以及差分探头1倍和10倍档的设置功能。差模信号源的设计采用了高速和低噪声全差分运算放大器LMH6550,实现了完全对称的差模信号源输出且共模电压可调功能。测量实验证明了本设计系统稳定且差分探头具有高共模抑制比,探头在DC~20MHz频带内的增益起伏不大于1dB,完全满足一般高校电工电子实验要求。 相似文献