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建立了一个基于电阻和电容的串扰分析模型,给出了干扰信号为线性倾斜信号时串扰的时域响应公式,得出了串扰峰值的估计公式,明确了干扰信号上升沿、互连线的电阻和耦合电容等对串扰的影响,并且利用Hyperlynx软件包进行仿真,仿真结果证明了理论分析的正确性. 相似文献
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针对高速数字电路PCB中传输线间串扰的严重性,从精确分析PCB中串扰噪声的角度出发,在传统的双线耦合模型的基础上,采用了一种三线串扰耦合模型。该模型由两条攻击线和一条受害线组成,两条攻击线位于受害线的两侧,线间采取平行耦合的方式。利用信号完整性仿真软件Hyperlynx对受害线上的近端串扰噪声和远端串扰噪声进行了仿真。仿真结果表明,不同的传输模式和传输线类型、信号层与地平面的距离、耦合长度、传输线间距和信号上升/下降沿等因素会对受害线上的近端串扰和远端串扰产生较大的影响。在分析仿真结果的基础上,总结出了高速PCB设计中抑制串扰的有效措施,对高速数字电路设计有一定的指导意义。 相似文献
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本文通过分析高频高速PCB上串扰产生的机理,以两条传输线之间的耦合电容和耦合电感等作为优化的参量,提出了一种改善信号串扰的差分线结构———T型差分传输线,采用正交实验方法研究 T型差分传输线结构的多个参数对远端串扰的影响,得出了改善信号远端串扰的最优组合方案,确定了这些参数对改善串扰的重要程度及主次顺序,利用HFSS对T型差分传输线和Tabbed Line进行仿真对比分析,仿真结果表明 T型差分传输线改善串扰的效果明显优于Tabbed Line。 相似文献
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为了定量研究动车组电源线对速度传感器信号线缆的串扰影响,提出了基于时域有限差分理论的耦合模型。基于该模型,在电源线上施加电快速瞬变脉冲群干扰,分析速度信号受扰后的失真情况,并通过仿真定量地分析了脉冲群的重复频率对速度传感器信号线内所传输的信号的影响,得出速度信号的误差与脉冲群的重复频率成线性关系的结论。 相似文献
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A coupled interconnect model is developed using even mode and odd mode capacitance analysis. Signal coupling is presented in terms of interconnect width, substrate thickness, interconnect line spacing, and frequency. Picosecond photoconductor based measurements of coupled transmission lines on the integrated circuit support the even and odd mode signal transmission simulation results. SPICE circuit simulation is used to demonstrate the model utility and explore the sensitivity of the self- and mutual capacitances and inductances in signal crosstalk. 相似文献
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针对集成电路中互连线之间的串扰问题,建立了一个基于电阻和电容的串扰分析模型,给出了干扰信号为线性倾斜信号时串扰的时域响应公式,并得出了串扰峰值的估算公式,明确了干扰信号上升沿对串扰的影响。利用该公式,能对全局互连性能的影响做出正确的估计,在互连布局前预先进行路由规划和资源选择。 相似文献
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传统的静态串扰噪声识别算法只验证耦合电容和噪声幅值信息,没有考虑噪声宽度对电路逻辑功能的影响,所以给出的结果过于保守,导致设计收敛的时间被延长。文章在传统算法的基础上增加了噪声宽度这一识别指标,克服了以往算法结果过于保守的缺点。实验表明,通过验证噪声幅值和宽度指标,算法准确地识别出对电路逻辑功能产生影响的静态串扰噪声,为IC设计的后端优化提供了准确信息。 相似文献
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Yonghee Im Roy K. 《Very Large Scale Integration (VLSI) Systems, IEEE Transactions on》2002,10(3):221-229
Current VLSI design techniques focus on four major goals: higher integration, faster speed, lower power, and shorter time-to-market. These goals have been accomplished mainly by deep submicron (DSM) technology along with voltage scaling. However, scaling down of feature size causes larger interwire capacitance which results in large crosstalk between interconnects. In this paper, we propose a novel predictable circuit architecture, named "optimized overlaying array-based architecture" (O/sup 2/ABA), especially suited for the deep submicron regime. O/sup 2/ABA achieves reduction in crosstalk by considering the current directions and by reducing interwire capacitance. The introduction of "unit cell" leads to regularity, which makes the performance predictable even before layout, and shortens design time. O/sup 2/ABA is compared with other design styles, such as custom design and standard cell approach, in terms of coupling capacitance, area, and delay. 相似文献
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Vector S -parameter measurements of the superconducting vortex flow transistor (VFT) are presented. The measurements were obtained for frequencies up to 100 MHz on VFTs that had a calculated transmit-time cutoff frequency of 5 GHz. An equivalent circuit model that includes calculations of the VFT transresistance, input inductance, and feedthrough capacitance is derived from these measurements. The measurements are limited to an upper frequency of 100 MHz due to crosstalk in the low-impedance system 相似文献
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Zeeff T.M. Hubing T.H. Van Doren T.P. 《Electromagnetic Compatibility, IEEE Transactions on》2005,47(2):388-392
Coupling between circuitry on printed circuit boards can be mitigated by a variety of well-known techniques. One such technique is to isolate circuitry in different areas of the printed circuit board by strategically placing a gap in the signal return plane. However, this technique is only effective at reducing common-impedance coupling, which is generally not a significant coupling mechanism at frequencies above 1 MHz. This paper investigates the effect of a gap located between and parallel to adjacent microstrip traces. The effect of the gap on the mutual inductance and mutual capacitance is evaluated. Laboratory measurements and numerical simulations show that gaps in the return plane are ineffective at reducing inductive and capacitive crosstalk in most configurations, and in some cases they increase the mutual coupling between printed circuit board traces. 相似文献