共查询到19条相似文献,搜索用时 109 毫秒
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目前主流的异质集成技术有单片异质外延生长、外延层转移和小芯片微米级组装。硅基异质集成主要是指以硅材料为衬底集成异质材料(器件)所形成的集成电路技术。它首先在军用微电子研究中得到重视,并逐渐在民用领域扩展。硅基异质集成技术正处于芯片级集成向晶体管级集成的发展初期,已有关于晶体管级和亚晶体管级集成的报道。本文重点研究了单片三维集成电路(3D SoC)、太赫兹SiGe HBT器件、超高速光互连封装级系统(SiP)、单片集成电磁微系统等硅基异质集成技术前沿,展现了硅基异质集成技术的发展趋势,及其在军用和民用通信、智能传感技术发展中所具有的重要意义。 相似文献
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系统级封装技术方兴未艾 总被引:2,自引:0,他引:2
本文论述系统级封装SiP与系统级芯片SoC的比较优势,重点介绍叠片式封装和晶圆级封装技术如何有效提高封装密度并解决了传统封装面临的带宽、互连延迟、功耗和总线性能等方面的难题。 相似文献
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TPMS IC是TPMS系统模块的关键核心器件,需要采用系统级封装(SiP)技术。对TPMS IC的一种新型SiP封装技术作了研究分析。在引线框架上引入电路板中介层,改善了芯片间电气互连与分布,增大了引入薄膜电阻电容元件的设计弹性。采用预成型模制部分芯片的封装技术,满足了IC与MEMS芯片不同的封装要求,还增强了SiP产品的可测试性和故障可分析性。采用敞口模封、灌装低应力弹性凝胶和传感器校准测试相结合的方法有效避免封装应力对MEMS压力传感器的影响。 相似文献
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系统级封装(System in Package,SiP)已经成为重要的先进封装和系统集成技术,是未来电子产品小型化和多功能化的重要技术路线,在微电子和电子制造领域具有广阔的应用市场和发展前景,发展也极为迅速。对目前SiP技术的研究现状和发展趋势进行了综述,重点关注了国际上半导体产业和重要的研究机构在SiP技术领域的研究和开发,对我国SiP技术的发展做了简单的回顾和展望。 相似文献
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L. D. Hutcheson 《Journal of Electronic Materials》1989,18(2):259-265
Conventional interconnect and switching technology is rapidly becoming a critical issue in the realization of systems using
high speed silicon and GaAs based technologies. In recent years clock speeds and on-chip density for VLSI/VHSIC technology
has made packaging these high speed chips extremely difficult. A strong case can be made for using optical interconnects for
on-chip/on-wafer, chip-to-chip and board-to-board high speed communications. GaAs Integrated Optoelectronic Circuits (IOC's)
are being developed in a number of laboratories for performing Input/Output functions at all levels. In this paper integrated
optoelectronic materials, electronics and optoelectronic devices are presented. IOC’s are examined from the standpoint of
what it takes to fabricate the devices and what performance can be expected. 相似文献
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Plant D.V. Kirk A.G. 《Proceedings of the IEEE. Institute of Electrical and Electronics Engineers》2000,88(6):806-818
This paper discusses short-distance optical interconnects for general-purpose distributed digital systems. We describe the technology required to optically interconnect elements that are distributed across multiple packaging layers. This includes chips on a board, boards in a backplane, and shelves within a bay. The focus of this paper will be on technology capable of supporting high-data-rate, two-dimensional, optical communication using two-dimensional parallel optical interconnects 相似文献
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集成电路芯片上光互连研究的新进展 总被引:1,自引:0,他引:1
讨论了集成电路向高集成度、高工作频率和高传输速率继续发展时 ,常规金属互连出现的困难以及集成电路芯片上光互连具有的潜在优势 .介绍了组成芯片上光互连的光发射器件、光接收器件和光传输器件等三种基本器件及其与硅集成电路集成的研究新进展 .最后展望了集成电路芯片上光互连的应用前景 . 相似文献
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在日益激烈竞争的电子工业中,高成本效益、高可靠性的电子封装方案不单是电子产品发展的主要驱动力,甚至往往成为当中的促成科技(EnablingTechnology),用于轻巧、细小的无线电/可携带式消费性电子产品中尤见适合。其中更理想的性能效益(cost/performanceratio)、更短的产品开发周期、集多功能于一身的消费性电子产品亦是崭新科技应用的主要原动力。要达到以上目标,相关的微电子封装方案与焊接技术的进步是不可或缺的:例如从金属线焊接技术发展到倒装芯片技术,及至近年的晶圆级封装技术;从外围焊接(peripheral)发展到数组焊接(area-array);从陶制基版发展到有机基版;从单芯片封装发展到复芯片封装的构装方案等。事实上,系统级封装比一般的封装方案拥有一定的优势。在报告中首先概述最近在系统级封装的发展情况与应用。另外,借此报告突显出跟供应链有关产业之间的密切协调是达到有效而迅速地执行系统级封装的关键。最后,在报告中进一步详述一个集顶尖封装设计、分析及可靠性评估技术的服务中心的好处,及如何对工业界从事原型设计发展到大量生产的协助。 相似文献
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A standard CMOS optical interconnect is proposed, including an octagonal-annular emitter, a field oxide,metal 1-PSG/BPSG-metal 2 dual waveguide, and an ultra high-sensitivity optical receiver integrated with a fingered P/N-well/P-sub dual photodiode detector. The optical interconnect is implemented in a Chartered 3.3-V 0.35-μm standard analog CMOS process with two schemes for the research of the substrate noise coupling effect on the optical interconnect performance: with or without a GND-guardring around the emitter. The experiment results show that the optical interconnect can work at 100 kHz, and it is feasible to implement optical interconnects in standard CMOS processes. 相似文献
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射频系统封装的发展现状和影响 总被引:1,自引:1,他引:0
电子产品小型化将进一步依赖微电子封装技术的进步.SiP(系统封装)所强调的是将一个尽可能完整的电子系统或子系统高密度地集成于单个封装体内,随着其技术的研究不断深入,封装规模不断扩大,其作用不断提升,它在射频领域中的应用特性也日趋突出,成为实现视频系统小型化、轻量化、高性能和高可靠的有效方法.针对当前RF SiP(射频系... 相似文献
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片内光通信技术综述 总被引:3,自引:3,他引:0
在纳米工艺水平下,传统的铜线互连已经很难满足集成电路芯片在延迟、带宽、功耗等方面的要求,片内通信问题已经成为集成电路设计的瓶径.文中根据片内光器件集成技术的最新进展,介绍了采用片内光互连代替电互连的最新技术及其性能方面的优势.文中重点总结了片内光互连的三种典型应用.首先,介绍了片内光时钟分布网络;其次,从应用的角度分析了光电总线结构相对于单纯电总线在性能上的提升;最后,介绍了一种新的片上光网络,它集成了片内电的包交换控制网络和宽带电路交换光网络.仿真和实验结果表明,光互连能够为高集成度纳米级芯片提供高带宽、低延迟,小功耗的片内通信服务. 相似文献
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Guoqing Hui Mikhail Nicholas A. David H. Philippe M. Eby G. 《Integration, the VLSI Journal》2007,40(4):434-446
Interconnect has become a primary bottleneck in the integrated circuit design process. As CMOS technology is scaled, the design requirements of delay, power, bandwidth, and noise due to the on-chip interconnects have become more stringent. New design challenges are continuously emerging, such as delay uncertainty induced by process and environmental variations. It has become increasingly difficult for conventional copper interconnect to satisfy these design requirements. On-chip optical interconnect has been considered as a potential substitute for electrical interconnect. In this paper, predictions of the performance of CMOS compatible optical devices are made based on current state-of-the-art optical technologies. Electrical and optical interconnects are compared for various design criteria based on these predictions. The critical dimensions beyond which optical interconnect becomes advantageous over electrical interconnect are shown to be approximately one-tenth of the chip edge length at the 22 nm technology node. 相似文献