基于OTA的有源Gm-C复数带通滤波器的设计

设计了一种基于OTA的有源Gm-C复数带通滤波器,用以实现射频前端芯片中的中频滤波和镜像抑制功能,该滤波器采用Gyrator结构,将低通原型滤波器中的集总电感用有源电感进行替换,并依据复数变换理论,对浮地电容和接地电容进行复数变换,实现带通滤波器.滤波器中心频率为4.1 MHz,1 dB带宽2 MHz,带内增益13.27 dB,1.5倍带宽处抑制在40 dB以上,镜像抑制度40 dB.Gm-C滤波器集成度高,功耗低,适合于高频应用,是当前集成中频滤波器的热点.     

基于衬底驱动技术的0.8 V三阶椭圆 OTA-C滤波器

基于衬底驱动MOS技术,设计了一种0.8 V高性能全差分CMOS跨导运算放大器(OTA)。在互补输入差分对的衬底端施加信号,避开MOSFET阈值电压的限制,以达到超低压应用。在0.8 V的电源电压下,其直流开环增益为73.8 dB,单位增益带宽为16.4 MHz。基于该OTA,采用无源网络模拟法,设计实现了截止频率为5 MHz,通带波纹为0.5 dB的三阶椭圆OTA-C滤波器。仿真结果表明了所设计滤波器的正确性。     

CMOS低中频有源复数带通滤波器设计

设计并实现了基于0.18 μm CMOS工艺的2.4 GHz无线传感网(Wireless Sensor Network)射频接收机低中频有源复数带通滤波器.该滤波器采用基于积分器单元的复数带通滤波器结构,同时实现镜像抑制和信号滤波的功能.仿真结果表明,复数带通滤波器的中心频率为2 MHz,通带带宽为2.4 MHz,通带电压增益约为12.5 dB,镜像抑制大于30 dB,相邻信道阻带衰减大于40 dB,噪声系数小于15 dB,消耗电流为5 mA.通过系统验证,本设计各项性能均满足无线传感网射频接收机的设计要求.     

双模式复数滤波器电路设计

采用0.18μm CMOS工艺,实现了一款中心频率和带宽可调节的OTA-C复数滤波器.通过设置控制字,可以控制复数滤波器的带宽和中心频率,形成窄带和宽带两种模式.滤波器的带宽设计为5 MHz和25 MHz,中心频率分别为4 MHz和15.4 MHz.窄带滤波器镜像抑制大于30dB(测试),宽带滤波器镜像抑制大于40 dB(仿真).设计中,采用了基于VCO锁相环结构的片上频率修正电路.滤波器消耗的总电流分别为1.7 mA和2.5 mA.仿真结果与测试结果非常吻合.     

宽带声表面波滤波器的制作

本文报导采用两个换能器都进行了切趾加权和一多条耦合器结构的声表面波带通滤波器.滤波器的中心频率(f_0)为56MHz,相对带宽(△f_(3dB))为41%,矩形系数(3dB和40dB的带宽比)为1.41,带内波纹(△R)为±0.6dB,阻带抑制(SS)为-42dB和插入损耗(IL_(min))为27dB.为了使宽带滤波器具有很低的矩形系数,采用了衍射损耗补偿技术.改进的滤波器的性能参数为f_O=50MHz,△f_(3dB)=47.6%,矩形系数(3dB和30dB的带宽比)=1.12,△R=±0.7dB,SS=-37dB和IL_(min)=31dB.     

一种线性相位LC滤波器的设计

为解决滤波器带外抑制和通带内相位波动之间的矛盾,该文介绍了一种线性相位LC滤波器的设计方法,通过对滤波器传输零点特性进行分析,根据指标要求灵活设计电路拓扑结构和零点位置,采用内、外均衡电路级联网络两种方法,来实现具有高矩形、线性相位特性的滤波器。设计了中心频率21.4 MHz、0.5 dB带宽大于10 MHz、矩形系数(45 dB/0.5 dB)小于2、带内相位波动绝对值小于5°和中心频率1 300 MHz、1 dB带宽大于200 MHz、矩形系数(35 dB/1 dB)小于2、带内相位波动绝对值小于5°两款滤波器。该方法工程实用化强,便于调试和制作,可应用于幅相特性要求高的微波系统中,提高了系统性能指标。     

适用于TD-SCDMA/TD-LTE协议发射机的可变带宽低通滤波器北大核心CSCD

采用UMC 0.18μm CMOS工艺,实现了一种符合TD-SCDMA/TD-LTE协议要求的发射机的可变带宽滤波器,设计选择七阶切比雪夫低通滤波器,采用有源电阻电容(active-RC)全差分滤波器结构,通过一阶滤波器级联三个二阶Tow-ThomasⅡ型滤波器结构构成,用译码器控制电容阵列调节带宽,带宽设置为1.6MHz、3MHz、5MHz、10MHz和15MHz五种可切换值。滤波器芯片面积为1 059μm×867μm。测试结果表明,在1.8V电源电压下电路功耗为13mA,各个带宽符合设计要求,滤波器二倍频衰减度可以达到50dB以上,线性度指标三阶输入交调点(Input 3rd order intercept point,IIP3)为-4.385dBm。     

适用于TD-SCDMA/TD-LTE协议发射机的可变带宽低通滤波器

采用UMC 0.18μm CMOS工艺,实现了一种符合TD-SCDMA/TD-LTE协议要求的发射机的可变带宽滤波器,设计选择七阶切比雪夫低通滤波器,采用有源电阻电容(active-RC)全差分滤波器结构,通过一阶滤波器级联三个二阶Tow-ThomasⅡ型滤波器结构构成,用译码器控制电容阵列调节带宽,带宽设置为1.6MHz、3MHz、5MHz、10MHz和15MHz五种可切换值。滤波器芯片面积为1 059μm×867μm。测试结果表明,在1.8V电源电压下电路功耗为13mA,各个带宽符合设计要求,滤波器二倍频衰减度可以达到50dB以上,线性度指标三阶输入交调点(Input 3rd order intercept point,IIP3)为-4.385dBm。     

可切换带宽的可调频率带通滤波器设计

提出了一种可切换固定带宽的可调频率带通滤波器新结构,且实现了在带宽切换前后都能保持固定带宽的特性。基于谐振线间的耦合系数提取算法,参考滤波器综合理论,设计并加工了工作频段为1.3～1.45 GHz的开环微带谐振可切换带宽的可调频率带通滤波器。测试结果表明,在整个工作频段内,3 dB 带宽在切换前后分别为120 MHz、100 MHz 和80 MHz,对应的插入损耗各是-2.9 dB、-2.4 dB、-2.6 dB,测试结果与仿真结果吻合良好。该滤波器具有结构简单、加工难度低、体积小、馈电控制简单等优点。     

有源镜像抑制复数滤波器设计

采用SMIC 0.18μm CMOS工艺设计实现了一款3阶有源RC复数滤波器.该滤波器适用于无线传感网射频接收机.滤波器中心频率为3MHz,带宽为250kHz/500kHz/1MHz/2MHz可配置,仿真结果显示,滤波器通带增益约为10dB,镜像抑制大于35dB,噪声系数小于45dB,三阶交调点(IIP3)优于28.5dBm,消耗电流为0.9mA.经仿真验证,该设计各项性能均满足无线传感网射频接收机要求.     

三阶级联复数有源RC带通滤波器

采用0.18μmCMOS工艺设计了一款应用在无线传网中的三阶级联有源RC复数带通滤波器,同时设计了自动频率调谐电路(AFT)。该滤波器采用的是切比雪夫逼近函数予以实现。在5比特数字控制码开关电容阵列的控制下,AFT电路即可完成对主体滤波器电路频率变化的校正。仿真结果显示,滤波器的中心频率稳定在2MHz,通带带宽为2MHz,镜像抑制比大于34dB,相邻信道阻带衰减大于34dB,通带纹波小于1dB,消耗电流为2.3mA,工作电源电压为1.8V。     

0.13 μm CMOS宽带大动态范围六阶跨导电容低通滤波器

提出了一种适用于宽带大动态范围应用的六阶跨导电容低通滤波器。该滤波器为Chebyshev类型,采用开环级联结构来实现。通过一组开关电容阵列来补偿由工艺温度等因素引入的截止频率的偏差。实际测试结果表明,该滤波器的-3dB截止频率可调范围为30～100MHz,在500mVp-p输入信号幅度下,IM3为-48dB。电源电压为3V时,消耗电流25mA,芯片面积为0.5mm2。该滤波器采用TSMC0.13μm CMOS工艺实现。     

低功耗Zigbee收发器镜像抑制滤波器设计

分析镜像抑制和带外衰减的要求,设计了适用于2.4 GHz Zigbee无线收发前端的镜像抑制滤波器.电路采用7阶巴特沃思OTA-C双二次结构.通过线性变换实现复数滤波.采用交叉耦合输入跨导器,扩大了输入线性范围.为减小滤波器频率偏差,设计了一种锁相环频率修调电路.电路利用0.18 μm CMOS工艺实现.测试结果表明,复数滤波器带宽2.54MHz,镜像抑制大于35 dB,偏移3.5 MHz抑制超过50 dB.在1.8 V电源电压下电流为0.86 mA.     

A 12-mW 264-MHz high linearity sharp roll-off CMOS opamp-RC low-pass filter for MB-OFDM UWB systems

This paper presents a high linearity wideband sharp roll-off Opamp-RC low-pass filter (LPF) for Ultra wideband (UWB) applications. The proposed LPF is composed of three biquads’ transfer functions with different Q-factors in series. Sharp roll-off is attributed to the steep slope of the peaking of a biquad transfer function with a high Q-factor. The superposition of these biquads also helps extend the bandwidth of the overall LPF transfer function without the cost of extra power dissipation. The effects of biquad arrangements on noise and linearity performances are investigated. A simple operational amplifier (op-amp) is adopted to ensure high frequency characteristics and high linearity performance for the designed filter. The LPF is implemented in 0.13-μm IBM CMOS process from 1.5 V supply. The measured cutoff frequency is 264 MHz with the pass-band ripple of less than 1 dB. Digital frequency tuning is implemented with 40% of tuning range around the cutoff frequency. The amount of out-of-band rejection at 290 MHz and at twice cutoff frequency is 12 dB and about 50 dB, respectively. Good linearity with IIP3 of 23 dBm is obtained. The 6th-order LPF dissipates only 12 mW with the active chip size of 400 × 640 μm².     

A 3 V 10 MHz pseudo-differential SC bandpass filter using gainenhancement replica amplifier

This paper describes the design strategy and implementation of a high frequency low voltage pseudo-differential SC filter which use opamps with gain enhancement replica amplifier. Experimental results of a biquad SC bandpass with a center frequency of 10 MHz and a Q of 10 are presented. The realized opamp has an open-loop unity-gain bandwidth of 850 MHz, a phase margin of about 62°, and a dc gain of 50 dB. The prototype filter dissipates 23 mW from a 3 V supply and occupies 0.3 mm ² in a 0.8 μm N-well single-poly, double-metal CMOS process     

双轴同轴型微波介质滤波器的仿真与设计

在介绍双轴同轴型谐振微波介质滤波器结构及工作原理基础上,利用理论公式计算与HFSS10.0三维有限元仿真的混合设计方法,设计了满足性能要求(插入损耗为–3dB以上;–3dB带宽为18MHz以上)的微波介质滤波器。滤波器试样实际测试结果表明,该设计方法正确可行,测试结果与仿真结果有很好的一致性,最终设计出的滤波器插入损耗为–2.83dB,–3dB带宽为35MHz。     

一种可编程高线性CMOSOTA的设计

采用SMIC 0.18 μm工艺,±0.9 V电源电压,提出了一种可编程高线性全对称伪差分 CMOS OTA 电路.提出的伪差 分输入级电路基于基本伪差分(PD)结构并采用 HD3 前馈技术消除三阶谐波失真,输出级采用可编程电流放大器实现.使用 Cadence 软件的 Spectre 仿真器进行电路仿真可得,Gm值三个...     

A 12-Pole Narrowband Highly Selective High-Temperature Superconducting Filter for the Application in the Third-Generation Wireless Communications

An ultra-selective high-temperature superconducting bandpass filter was designed and fabricated to satisfy the demands of the third-generation wireless communications. This filter was designed to have 12-pole quasi-elliptic response with 4.68-MHz bandwidth in the third-generation communications band (a fractional bandwidth of 0.0023). Full-wave simulations were conducted by using Sonnet software. A novel, compact, and low radiation resonator with a high-quality (Q) factor value was developed to reduce the parasitical coupling. In order to satisfy the demand of high band-edge steepness, three pairs of transmission zeros at finite frequencies were introduced in the cascaded quadruplet coupling structure. The filter was fabricated on a 2-in-diameter 0.43-mm-thick sapphire wafer with double-sided YBCO films. The measurements showed that the passband center frequency (f₀) of the filter is 2.038 GHz at 67 K with a midband insertion loss of 0.67 dB and the return loss better than 15 dB. The measured response of the filter also exhibited ultra-high band-edge steepness of 140-220 dB/MHz. Better than 60 dB of out-of-band rejections for frequencies very close to the band edge (|f-f₀|>2.7 MHz), better than 90 dB at frequencies 7.5 MHz away from the center frequency and up to 100 dB of wideband rejections were achieved     

Design and Analysis of Tunable Voltage Differencing Inverting Buffered Amplifier (VDIBA) with Enhanced Performance and Its Application in Filters

This paper proposes a high performance tunable Voltage Differencing Inverting Buffered Amplifier (VDIBA) where transconductance of VDIBA is enhanced by using programmable positive feedback technique and bandwidth is enhanced by using resistive compensation technique. The enhanced performance of proposed VDIBA is demonstrated by presenting detailed frequency analysis. Furthermore, it is verified that transconductance of proposed VDIBA can be enhanced up to 10.6 mS at tuning current (Ic) of 100 µA. Moreover, resistive compensation technique enhance bandwidth of propose circuit up to 263 MHz. To illustrate the effectiveness of proposed circuit, voltage mode universal biquad filter is designed as an application example. The pole frequency of proposed filter is tunable in range of 10.5–83.4 MHz. The proposed VDIBA and its filter applications are designed and simulated using TSMC 0.18 µm CMOS technology in Cadence virtuoso schematic composer at ± 0.6 V supply voltage.     

GPS接收机镜像信号抑制

分析了GPS接收机镜像信号抑制的要求,设计应用于低中频GPS接收机的镜像抑制复数滤波器.滤波器基于OTA-C双二次结构,通过线性变换实现频率搬移.采用了带源极负反馈的全差分跨导器以扩大输入线性范围.设计了基于环形振荡器的数字调谐锁相环以减小滤波器频率偏差.电路采用0.18μm CMOS工艺实现.测试结果表明,滤波器带宽为3.1MHz,偏移5MHz抑制为50dB,频率修调误差小于±1.5%.镜像抑制大于35dB.1.8V电源电压下滤波器和修正电路电流分别为0.82mA和0.23mA.