磁控溅射方法制备(CoCr/Pt)20纳米多层膜及表征

采用磁控溅射方法制备了性能优良的以Pt为缓冲层的(CoCr/Pt)20纳米多层膜,研究了溅射气压对(CoCr/Pt)20纳米多层膜的微结构和磁性的影响.结果表明,Ar溅射气压对(CoCr/Pt)20纳米多层膜的微结构、垂直磁各向异性和矫顽力有很大的影响.所有样品的有效各向异性常数Ke.＞0,具有垂直磁各向异性.X射线衍射结果显示,小角衍射峰很锐,样品有良好的周期性层状结构.随着Ar溅射气压增加,样品垂直膜面的矫顽力增加,但样品有效磁各向异性常数减小.原子力显微镜照片显示,随着Ar溅射气压增加,其表面平均晶粒尺寸和粗糙度均增加,这是导致多层膜的垂直矫顽力增加和有效磁各向异性常数减小的因素.     

磁控溅射方法制备(CoCr/Pt)20纳米多层膜及表征

采用磁控溅射方法制备了性能优良的以Pt为缓冲层的(CoCr/Pt)20纳米多层膜,研究了溅射气压对(CoCr/Pt)20纳米多层膜的微结构和磁性的影响. 结果表明，Ar溅射气压对(CoCr/Pt)20纳米多层膜的微结构、垂直磁各向异性和矫顽力有很大的影响. 所有样品的有效各向异性常数Keff＞0，具有垂直磁各向异性. X射线衍射结果显示，小角衍射峰很锐，样品有良好的周期性层状结构. 随着Ar溅射气压增加，样品垂直膜面的矫顽力增加,但样品有效磁各向异性常数减小. 原子力显微镜照片显示，随着Ar溅射气压增加，其表面平均晶粒尺寸和粗糙度均增加，这是导致多层膜的垂直矫顽力增加和有效磁各向异性常数减小的因素.     

不同底层对CoFeB/Pt多层膜垂直磁各向异性的影响研究

采用磁控溅射方法在玻璃基片上制备了以Ru,Cu,Pt和Ta为底层的Co Fe B/Pt多层膜样品,研究了各底层对Co Fe B/Pt多层膜的反常霍尔效应的影响。发现Ru和Cu作为Co Fe B/Pt多层膜的底层在保持样品的垂直磁各向异性方面的作用远不如Pt和Ta底层,而且样品的霍尔电阻比Pt和Ta做底层要小。Ta作为Co Fe B/Pt多层膜的底层与Pt作为底层相比能够更好地和多层膜晶格匹配,并且在400℃退火后反常霍尔效应得到增强。霍尔电阻提高近80%,矫顽力达到了5.7×10~3 A·m~(–1),有望作为垂直自由层应用到磁隧道结构中。     

超细Co/Cu纳米多层膜磁性研究

利用磁控溅射方法制备了纳米Co/Cu多层膜。利用扫描探针显微镜(SPM)观测了其表面形貌和磁畴结构,并通过振动样品磁强计(VSM)测量了磁性。结果表明,薄膜的微结构和磁性随非磁性层厚度的变化有着非常显著的变化。超细Co颗粒构造的多层膜样品,颗粒尺寸逐渐增大,磁畴尺寸先减小后增大,最后发生明显的聚集。磁性金属和非磁性金属的比例对多层膜之间的交换耦合相互作用有显著影响。平行膜面方向上的饱和场明显小于垂直膜面方向。当体积比约为1∶80时,平行膜面方向饱和场为95.9 kA/m,垂直方向饱和场为328.1 kA/m。此时两个方向上的饱和场、剩磁、矫顽力和磁滞损耗均为最小值。     

磁控溅射制备Co1-xPtx:C复合纳米颗粒薄膜的研究

采用组合靶，利用磁控共溅射技术制备了Co1-xPtx：C复合纳米颗粒薄膜，并从实验和理论上对不同Pt浓度CoPt：C薄膜的组分、微结构、磁性能、组分和微结构与磁性能之间的关系以及薄膜的应用进行了初步研究。发现CoPt粒子取向和磁性能与CoPt：C薄膜中的Pt浓度有密切关系，在较高Pt浓度的CoPt：C薄膜中观察到垂直各向异性现象。通过改变Pt浓度，可以获得粒子粒径小于10nm、矫顽力可控、垂直磁晶各向异性较高的薄膜。晶格结构和晶粒之间的作用力可认为是影响CoPt：C薄膜磁性能的主要因素。     

光盘反射层纳米A1膜性能研究

利用原子力显微镜（AFM）和椭圆偏振仪研究了溅射条件对纳米Al薄膜性能的影响。研究表明，随溅射Ar气压的增大，纳米Al膜的表面粗糙度增加，折射率降低，反射率减小，这与薄膜的结构变化密切相关；随溅射功率的增大，纳米Al膜的表面粗糙度增加，而其光学常数的变化则不明显。     

溶胶pH值对CoFe_2O_4/SiO_2复合薄膜结构和磁性能的影响

采用sol-gel法制备了纳米CoFe2O4/SiO2复合薄膜(样品)。利用X射线衍射仪、原子力显微镜、振动样品磁强计对样品的结构、形貌和磁性能进行了研究。结果表明:随着溶胶pH值的减小,样品中CoFe2O4的平均晶粒尺寸变小,CoFe2O4晶粒沿(111)晶面择优取向生长。样品的矫顽力随着平均晶粒尺寸的减小明显变大,当溶胶pH值为0.29时,垂直和平行膜面的矫顽力分别为290 kA.m–1和250 kA.m–1,样品具有较明显的垂直磁各向异性。当溶胶pH值为0.59时,样品垂直和平行膜面的剩磁比(Mr/Ms)分别为53.2%和51.5%。     

纳米氧化层对坡莫合金薄膜性能的影响

采用磁控溅射的方法制备了Ta/NiFe/Ta磁电阻薄膜,分别将CoFe-NOL和Al2O3插层引入NiFe薄膜,研究纳米氧化层(NOL)对NiFe薄膜性能的影响。实验结果表明:将CoFe-NOL引入NiFe薄膜,CoFe-NOL对NiFe薄膜性能有重要影响,并且CoFe-NOL在薄膜中的位置不同影响效果也不同;CoFe-NOL处于Ta/NiFe界面时,由于破坏了NiFe薄膜的织构,导致了NiFe薄膜的各向异性磁电阻(AMR)值的减小和矫顽力的上升;CoFe-NOL处于NiFe/Ta界面时,则不会破坏NiFe薄膜的织构,其AMR值和矫顽力基本没有变化。将Al2O3插层引入NiFe薄膜,由于Al2O3插层的"镜面反射"作用,合适厚度的Al2O3插层可以改善薄膜的微结构,提高薄膜的磁电阻值,改善薄膜的磁性能。当Al2O3插层厚度为1.5 nm时,NiFe薄膜有最佳的微结构和性能。     

TbFex薄膜的成分控制及其对磁结构的影响

利用直流磁控溅射工艺制备了TBFex薄膜，通过改变溅射气压调节薄膜的成分，利用磁力显微镜研究了薄膜成分对畴结构的影响，最后从理论上讨论Ar气压对磁致伸缩薄膜TBFex成分的影响，并建立了理论模型。结果表明：Ar气压在相当大的范围内影响着TBFex膜的成分，当气压从0．2Pa增加到0．6Pa时，Tb原子数百分比从30％增加到45％，磁力显微镜（MFM）观察到当TB含量减少时，在零场下的磁化强度由与膜面垂直方向变为平行于薄膜平面方向。     

GdFeCo/AlN/DyFeCo静磁耦合多层薄膜磁化方向转变的研究

对 Gd Fe Co/Al N/Dy Fe Co静磁耦合多层薄膜变温磁化方向变化进行了研究。结果表明读出层 Gd Fe Co随温度上升从平面磁化转变成垂直磁化 ,转变过程中受饱和磁化强度 (Ms)和有效各向异性常数影响 ,但主要受饱和磁化强度 (Ms)的影响。在高温时读出层的磁化强度很小 ,退磁场能减小 ,在静磁耦合作用下 ,使 Gd Fe Co读出层的磁化方向发生转变 ,而且磁化方向的转变在较小的温度范围内变化较快。     

Performance improvement in tensile-strained In/sub 0.5/Al/sub 0.5/As/In/sub x/Ga/sub 1-x/As/In/sub 0.5/Al/sub 0.5/As metamorphic HEMT

This paper proposes a In/sub 0.5/Al/sub 0.5/As/In/sub x/Ga/sub 1-x/As/In/sub 0.5/Al/sub 0.5/As (x=0.3-0.5-0.3) metamorphic high-electron mobility transistor with tensile-strained channel. The tensile-strained channel structure exhibits significant improvements in dc and RF characteristics, including extrinsic transconductance, current driving capability, thermal stability, unity-gain cutoff frequency, maximum oscillation frequency, output power, power gain, and power added efficiency.     

Very low-noise Al/sub 0.3/Ga/sub 0.7/As/Ga/sub 0.65/In/sub 0.35/As/GaAs single quantum-well pseudomorphic HEMTs

AlGaAs/GaInAs/GaAs pseudomorphic HEMTs with an InAs mole fraction as high as 35% in the channel has been successfully fabricated. The device exhibits a maximum extrinsic transconductance of 700 mS/mm. At 18 GHz, a minimum noise figure of 0.55 dB with 15.0 dB associated gain was measured. At 60 GHz, a minimum noise figure as low as 1.6 dB with 7.6 dB associated gain was also obtained. This is the best noise performance yet reported for GaAs-based HEMTs.<>     

A 12 /spl times/ 12 In/sub 0.53/Ga/sub 0.47/As-In/sub 0.52/Al/sub 0.48/As avalanche photodiode array

We report a 12 /spl times/ 12 In/sub 0.53/Ga/sub 0.47/As-In/sub 0.52/Al/sub 0.48/As avalanche photodiode (APD) array. The mean breakdown voltage of the APD was 57.9 V and the standard deviation was less than 0.1 V. The mean dark current was /spl sim/2 and /spl sim/300 nA, and the standard deviation was /spl sim/0.19 and /spl sim/60 nA at unity gain (V/sub bias/ = 13.5 V) and at 90% of the breakdown voltage, respectively. External quantum efficiency was above 40% in the wavelength range from 1.0 to 1.6 /spl mu/m. It was /spl sim/57% and /spl sim/45% at 1.3 and 1.55 /spl mu/m, respectively. A bandwidth of 13 GHz was achieved at low gain.     

Al/sub 0.3/Ga/sub 0.7/As/In/sub x/Ga/sub 1-x/As (0/spl les/x/spl les/0.25) doped-channel field-effect transistors (DCFET's)

The properties of both lattice-matched and strained doped-channel field-effect transistors (DCFET's) have been investigated in AlGaAs/In/sub x/Ga/sub 1-x/As (0/spl les/x/spl les/0.25) heterostructures with various indium mole fractions. Through electrical characterization of grown layers in conjunction with the dc and microwave device characteristics, we observed that the introduction of a 150-/spl Aring/ thick strained In/sub 0.15/Ga/sub 0.85/As channel can enhance device performance, compared to the lattice-matched one. However, a degradation of device performance was observed for larger indium mole fractions, up to x=0.25, which is associated with strain relaxation in this highly strained channel. DCFET's also preserved a more reliable performance after biased-stress testings.<>     

Morphological and electrical characterization of SixCryCzBv thin films

Si_xCr_yC_zB_v thin films with several compositions have been studied for integration of high precision resistors in 0.8 μm BICMOS technology. These resistors, integrated in the back-end of line, have the advantage to provide high level of integration and attractive electrical behavior in temperature, for analog devices. The film morphology and the structure have been investigated through transmission electron microscopy analysis and have been then related to the electrical properties on the base of the percolation theory. According to this theory, and in agreement with experimental results, negative thermal coefficient of resistance (TCR) has been obtained for samples with low Cr content, corresponding to a crystalline volume fraction below the percolation threshold.Samples with higher Cr content exhibit, instead, a variation of the TCR as a function of film thickness: negative TCR values are obtained for thickness lower than 5 nm, corresponding to a crystalline volume fraction below the percolation threshold; positive TCR are obtained for larger thickness, indicating the establishment of a continuous conductive path between the Cr rich grains. This property seems to be determinant in order to assure the possibility to obtain thin film resistors almost independent on the temperature.     

Highly linear Al/sub 0.3/Ga/sub 0.7/N-Al/sub 0.05/Ga/sub 0.95/N-GaN composite-channel HEMTs

We report an Al/sub 0.3/Ga/sub 0.7/N-Al/sub 0.05/Ga/sub 0.95/N-GaN composite-channel HEMT with enhanced linearity. By engineering the channel region, i.e., inserting a 6-nm-thick AlGaN layer with 5% Al composition in the channel region, a composite-channel HEMT was demonstrated. Transconductance and cutoff frequencies of a 1 /spl times/100 /spl mu/m HEMT are kept near their peak values throughout the low- and high-current operating levels, a desirable feature for linear power amplifiers. The composite-channel HEMT exhibits a peak transconductance of 150 mS/mm, a peak current gain cutoff frequency (f/sub T/) of 12 GHz and a peak power gain cutoff frequency (f/sub max/) of 30 GHz. For devices grown on sapphire substrate, maximum power density of 3.38 W/mm, power-added efficiency of 45% are obtained at 2 GHz. The output third-order intercept point (OIP3) is 33.2 dBm from two-tone measurement at 2 GHz.     

Comparison between Pt/TiO2/Pt and Pt/TaOX/TaOY/Pt based bipolar resistive switching devices

Nonvolatile memories have emerged in recent years and have become a leading candidate towards replacing dynamic and static random-access memory devices. In this article, the performances of TiO₂ and TaO₂ nonvolatile memristive devices were compared and the factors that make TaO₂ memristive devices better than TiO₂ memristive devices were studied. TaO₂ memristive devices have shown better endurance performances (10⁸ times more switching cycles) and faster switching speed (5 times) than TiO₂ memristive devices. Electroforming of TaO₂ memristive devices requires~4.5 times less energy than TiO₂ memristive devices of a similar size. The retention period of TaO₂ memristive devices is expected to exceed 10 years with sufficient experimental evidence. In addition to comparing device performances, this article also explains the differences in physical device structure, switching mechanism, and resistance switching performances of TiO₂ and TaO₂ memristive devices. This article summarizes the reasons that give TaO₂ memristive devices the advantage over TiO₂ memristive devices, in terms of electroformation, switching speed, and endurance.     

Broadband microwave noise characteristics of high-linearity composite-channel Al/sub 0.3/Ga/sub 0.7/N/Al/sub 0.05/Ga/sub 0.95/N/GaN HEMTs

We report broadband microwave noise characteristics of a high-linearity composite-channel HEMT (CC-HEMT). Owing to the novel composite-channel design, the CC-HEMT exhibits high gain and high linearity such as an output third-order intercept point (OIP3) of 33.2 dBm at 2 GHz. The CC-HEMT also exhibits excellent microwave noise performance. For 1-/spl mu/m gate-length devices, a minimum noise figure (NF/sub min/) of 0.7 dB and an associated gain (G/sub a/) of 19 dB were observed at 1 GHz, and an (NF/sub mi/) of 3.3 dB and a G/sub a/ of 10.8 dB were observed at 10 GHz. The dependence of the noise characteristics on the physical design parameters, such as the gate-source and gate-drain spacing, is also presented.