信号频率的卷积窗比值新算法

针对传统窗函数的特性引起经典频谱校正法测频精度较低这一技术瓶颈,给出了运用卷积运算构造新窗函数的方法。以矩形卷积窗函数为例,在长度相同的条件下说明了新窗函数的优良特性;针对该新窗函数提出了基于最小二乘逼近的比值新算法,对实际的多频率信号进行频率测量研究。结果表明：该新算法可以实现信号频率的高精度测量,这种通过最小二乘逼近将复杂窗函数应用到比值校正法中的思路具有理论与工程应用价值。     

32阶FIR滤波器的FPGA实现

阐述了有限冲击响应（FIR）低通滤波器的窗函数设计方法,利用并行分布式算法在现场可编程门阵列上实现了32阶FIR低通滤波器。采用Altera公司中Stratix系列芯片内部的ROM实现了一种基于查找表结构的FIR数字滤波器,从而将卷积运算变换成一种查表后的加法运算,提高了运算速度,节省了逻辑单元。仿真结果表面,基于并行分布式算法．的FIR滤波器最大处理速度可以达到200MHz。     

有限冲击响应数字滤波器的DSP实现

数字滤波是信号处理过程的主要方式,FIR数字滤波器以其系统稳定和易实现线性相位应用更为广泛。设计了采用窗函数法的FIR数字带通滤波器,在DSP中采用单采样模式,在每一个采样周期内只产生一个信号输出值,实时处理采样后的信号。通过MATLAB进行滤波器的仿真,修改滤波器的参数使其达到设计指标。利用窗函数法设立的FIR数字滤波器,是获得较好的主瓣最大能量和旁瓣衰减意义下的最佳设计方法。     

基于并行成型滤波技术的高速QPSK调制设计

对于传统的QPSK方案应用于高速率码信号调制与解调时的一个关键的难点就是成型滤波算法中卷积运算的实现困难,其大量的高速计算要求大量的高速乘法及加法器件,本文采用基于并行查表法来实现数字滤波器,推导了其具体的实现方法。     

适合单片机实时处理的简单FIR滤波器设计

介绍了一种以Matlab7.0为辅助设计工具,采用窗函数法结合零、极点调整法和试探法设计的滤除工频50 Hz干扰的FIR滤波器的设计与实现。该滤波器运算简单、计算量小,非常适合通用单片机进行实时处理,同时具有低通滤波和50 Hz陷波功能。实验结果表明该滤波器对心电信号中的50 Hz工频干扰和高频干扰具有很好的滤波效果。     

基于DSP的测量数据预处理

本次设计的是通过DSP来实现滤波功能的FIR滤波器。FIR滤波器的实现可以有窗函数设计法,频率抽样设计法,等波纹逼近计算机辅助设计法等方法。本次设计采用窗函数法设计,这种设计的方法原理是单位脉冲响应序列hd(n)与窗函数w(n)的卷积和。抓住这个原理用软件语言在CCS5000上实现了滤波功能。     

基于循环缓冲区FIR滤波器的设计

数字滤波技术主要包括滤波器设计及滤波过程的实现两方面内容。文中阐述了FIR滤波器基本结构,结合实例用Matlab来确定FIR滤波器系数,分析了循环缓冲区算法原理。在该算法的基础上,结合设计的滤波器实现对输入混合信号的FIR数字滤波,最后给出了滤波前后输入输出信号波形仿真。     

乘窗信号谱分解及其数据修复

针对图像信号缺损问题提出一种新的修复方法,用乘窗函数描述信号缺损,将数据修复转化为频域反卷积运算,使问题得以简化和规范化.由于任何形状缺损的位置均可转变成窗函数统一描述,因此算法可用于修复任意形状的斑块缺损.文中结合实例讨论了缺损形状大小和缺失量对修复效果的影响,同时指出算法在边界处有一定的自动衔接功能.     

基于FIR数字滤波器的Matlab设计

阐述了FIR数字滤波器的窗函数设计方法,并利用Matlab语言实现了滤波器的设计与仿真。Matlab语言可以方便、快捷地设计具有严格线性相位的FIR系统,可节省大量的编程时间,提高编程效率,且参数的修改也十分方便。随着版本的不断提高,Matlab在数字滤波技术中会发挥更大的作用。     

一种基于窗函数法设计FIR数字滤波器的新算法

在用窗函数法设计FIR数字滤波器时,设计的优化主要通过调整窗函数来进行的。文中提出一种新的优化算法,其基本思想是在窗函数和滤波器阶数不变的情况下,通过迭代运算寻找一个最佳的频率响应函数,对此频率响应函数的傅里叶反变换进行加窗所设计出的滤波器的频率响应相对于理想频率响应的逼近误差最小。文中对算法的运用和改进作了说明,并给出一个设计实例。     

FIR数字滤波器的一种快速算法

FIR数字滤波器本质上是一种线性卷积的运算,当数字滤波器的阶次N很大时,计算量很大,计算速度很慢,达不到系统对实时性的要求。文章介绍了一种数字信号处理算法,该算法将线性卷积运算转换成加法运算,利用加法运算进行求解,避免了数据堆积,加快了运算速度,从而使数字滤波器处理过程实时、快速。     

High Performance Reconfigurable FIR Filter Architecture Using Optimized Multiplier

In mobile communication systems and multimedia applications, need for efficient reconfigurable digital finite impulse response (FIR) filters has been increasing tremendously because of the advantage of less area, low cost, low power and high speed of operation. This article presents a near optimum low- complexity, reconfigurable digital FIR filter architecture based on computation sharing multipliers (CSHM), constant shift method (CSM) and modified binary-based common sub-expression elimination (BCSE) method for different word-length filter coefficients. The CSHM identifies common computation steps and reuses them for different multiplications. The proposed reconfigurable FIR filter architecture reduces the adders cost and operates at high speed for low-complexity reconfigurable filtering applications such as channelization, channel equalization, matched filtering, pulse shaping, video convolution functions, signal preconditioning, and various other communication applications. The proposed architecture has been implemented and tested on a Virtex 2 xc2vp2-6fg256 field-programmable gate array (FPGA) with a precision of 8-bits, 12-bits, and 16-bits filter coefficients. The proposed novel reconfigurable FIR filter architecture using dynamically reconfigurable multiplier block offers good area and speed improvement compared to existing reconfigurable FIR filter implementations.     

Image source identification with known post-processed based on convolutional neural network

Image source identification is important to verify the origin and authenticity of digital images. However, when images are altered by some post-processing, the performance of the existing source verification methods may degrade. In this paper, we propose a convolutional neural network (CNN) to solve the above problem. Specifically, we present a theoretical framework for different tampering operations, to confirm whether a single operation has affected photo response non-uniformity (PRNU) contained in images. Then, we divide these operations into two categories: non-influential operation and influential operation. Besides, the images altered by the combination of non-influential and influential operations are equal to images that have only undergone a single influential operation. To make our introduced CNN robust to both non-influential operation and influential operation, we define a multi-kernel noise extractor that consists of a high-pass filter and three parallel convolution filters of different sizes. The features generated by the parallel convolution layers are then fed to subsequent convolutional layers for further feature extraction. The experimental results provide the effectiveness of our method.     

全相位DFT数字滤波器的设计与实现

本文提出了全相位数据空间的概念,并基于DFT/IDFT滤波导出了一种新型的零相位滤波器——全相位DFT(APDFT)数字滤波器.本文给出了它的脉冲响应与相应的DFT滤波响应向量之间的正、反变换公式,证明了这种滤波器的一些重要性质.APDFT方法兼有窗函数法和频率采样法的优点,是一种设计FIR滤波器的新方法.理论分析和模拟实验证实,其总体性能优于传统方法.APDFT数字滤波器除可用通常的卷积结构实现外,也可用一种直接频域网络实现.本文给出了这种网络结构及其简化算法.这种网络具有实时自设计功能.它可以构成时变系统用于滤波器传递函数实时可变的场合,可以方便地集成为一个长度和频响均可编程的通用零相位数字滤波器,而且还可用于实现严格互补子带滤波.     

ARMA implementation of diffraction operators with inverse-rootsingularities

The integral of a time-domain diffraction operator which has an integrable inverse-root singularity and an infinite tail is numerically differentiated to get a truncated digital form of the operator. This truncated difference operator effectively simulates the singularity but is computationally inefficient and produces a convolutional truncation ghost. The authors therefore use a least-squares method to model an equivalent autoregressive moving-average (ARMA) filter on the difference operator. The recursive convolution of the ARMA filter with a wavelet has no truncation ghost and an error below 1% of the peak diffraction amplitude. Design and application of the ARMA filter reduces computer (CPU) time by 42% over that repaired with direct convolution. A combination of filter design at a coarse spatial sampling, angular interpolation of filter coefficients to a finer sampling, and recursive application reduces CPU time by 83% over direct convolution or 80% over Fourier convolution, which also has truncation error     

基于全流程并行加速的改进数字下变频器设计

针对宽带通信雷达探测系统中高速率数据处理难度较大的问题,设计了一种全流程并行化处理的高速率数字下变频器,混频模块采用并行化的流水线坐标旋转数字计算机（CORDIC)对来自A/D的高速采样数据进行分组处理,以降低单个通道的数据率;抽取滤波模块采用多相滤波器进一步将高阶卷积网络进行并行化分解,减少不必要的乘累加运算。实验结果表明：最大处理速率由原先的131MHz提高到了255MHz,改进设计利用现有硬件条件大幅度提高了处理速度,减少了通带内信号的衰减。     

Convolution,correlation, and sampling theorems for the offset linear canonical transform

The offset linear canonical transform (OLCT), which is a time-shifted and frequency-modulated version of the linear canonical transform, has been shown to be a powerful tool for signal processing and optics. However, some basic results for this transform, such as convolution and correlation theorems, remain unknown. In this paper, based on a new convolution operation, we formulate convolution and correlation theorems for the OLCT. Moreover, we use the convolution theorem to investigate the sampling theorem for the band-limited signal in the OLCT domain. The formulas of uniform sampling and low-pass reconstruction related to the OLCT are obtained. We also discuss the design method of the multiplicative filter in the OLCT domain. Based on the model of the multiplicative filter in the OLCT domain, a practical method to achieve multiplicative filtering through convolution in the time domain is proposed.     

Generalized discrete Hartley transforms

The discrete Hartley transform is generalized into four classes in the same way as the generalized discrete Fourier transform. Fast algorithms for the resulting transforms are derived. The generalized transforms are expected to be useful in applications such as digital filter banks, fast computation of the discrete Hartley transform for any composite number of data points, fast computations of convolution, and signal representation. The fast computation of skew-circular convolution by the generalized transforms for any composite number of data points is discussed in detail     

A fast algorithm for FIR digital filtering with a sum-of-triangles weighting function

A doubly recursive algorithm for time domain convolution with a piecewise linear weighting function is presented that combines the speed of a recursive (IIR) digital filter with the flexibility and ease of design of a nonrecursive (FIR) digital filter. The approach approximates the desired FIR weighting function by a sum-of-triangles weighting function. ForL triangles (or triangle pairs for a linear phase filter) the algorithm is of orderLN. The approximation improves with the number of triangles. A significant advantage of the algorithm compared to FFT filtering or direct convolution is that there is no necessity of a tradeoff between frequency response accuracy and computation time per output point as the data spacing decreases in the filtered signal. The computational complexity is dependent on the number of triangles chosen, not the width of the weighting function, so the algorithm is especially effective for filters with an inherently wide FIR weighting function.     

基于FPGA的高阶FIR滤波器设计

对于高阶FIR滤波器,由于运算量较大,采用软件等方式无法达到实时处理的要求。文中提出了采用FPGA实现快速卷积结构的高阶FIR滤波器,推导出将大点数FFT分解为二维FFT变换的公式。根据上述理论在采用Verilog HDL语言设计了基于一维转二维FFT的快速卷积结构高阶FIR滤波器。实验表明,该基于FPGA的高阶FIR滤波器具有精度高、速度快、资源消耗少、调试方便、易于集成等优点,并可达到工程实践的要求。